1 /*
2  * Copyright (c) 2006-2024 RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2022-02-22     airm2m       first version
9  */
10 #include "board.h"
11 #include "drv_common.h"
12 #include "drv_gpio.h"
13 #include "drv_usart_v2.h"
14 
15 uint32_t SystemCoreClock;
16 extern const uint32_t __isr_start_address;
17 
18 
19 const uint32_t __attribute__((section (".app_info")))
20     g_CAppInfo[256] =
21 {
22     __APP_START_MAGIC__,
23     sizeof(g_CAppInfo),
24     0,
25     0,
26 };
27 
SystemInit(void)28 void SystemInit(void)
29 {
30 #ifdef __USE_XTL__
31     SYSCTRL->FREQ_SEL = 0x20000000 | SYSCTRL_FREQ_SEL_HCLK_DIV_1_2 | (1 << 13) | SYSCTRL_FREQ_SEL_CLOCK_SOURCE_EXT | SYSCTRL_FREQ_SEL_XTAL_192Mhz;
32 #else
33     SYSCTRL->FREQ_SEL = 0x20000000 | SYSCTRL_FREQ_SEL_HCLK_DIV_1_2 | (1 << 13) | SYSCTRL_FREQ_SEL_CLOCK_SOURCE_INC | SYSCTRL_FREQ_SEL_XTAL_192Mhz;
34 #endif
35     SCB->VTOR = (uint32_t)(&__isr_start_address);
36     SYSCTRL->CG_CTRL1 = SYSCTRL_APBPeriph_ALL;
37     SYSCTRL->SOFT_RST1 = SYSCTRL_APBPeriph_ALL;
38     SYSCTRL->PHER_CTRL &= ~(1 << 20);
39     SYSCTRL->SOFT_RST2 &= ~SYSCTRL_USB_RESET;
40     SYSCTRL->LOCK_R |= SYSCTRL_USB_RESET;
41     __enable_irq();
42 }
43 
SystemCoreClockUpdate(void)44 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency */
45 {
46     SystemCoreClock = HSE_VALUE * (((SYSCTRL->FREQ_SEL & SYSCTRL_FREQ_SEL_XTAL_Mask) >> SYSCTRL_FREQ_SEL_XTAL_Pos) + 1);
47 }
48 
rt_hw_board_init(void)49 void rt_hw_board_init(void)
50 {
51     GPIO_Config(GPIOC_03, 0, 0);
52     GPIO_Config(GPIOD_14, 0, 0);
53     GPIO_Config(GPIOD_15, 0, 0);
54     __NVIC_SetPriorityGrouping(7 - __NVIC_PRIO_BITS);
55     SystemCoreClockUpdate();
56 #ifdef RT_USING_HEAP
57     rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
58 #endif
59     rt_hw_systick_init();
60     DMA_GlobalInit();
61     Uart_GlobalInit();
62     DMA_TakeStream(DMA1_STREAM_1);/* for qspi */
63     CoreTick_Init();
64 #ifdef RT_USING_PIN
65     rt_hw_pin_init();
66 #endif
67 
68     /* USART driver initialization is open by default */
69 #ifdef RT_USING_SERIAL
70     rt_hw_usart_init();
71 #endif
72 
73     /* Set the shell console output device */
74 #if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
75     rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
76 #endif
77 
78     /* Board underlying hardware initialization */
79 #ifdef RT_USING_COMPONENTS_INIT
80     rt_components_board_init();
81 #endif
82 
83 }
84 
85 
86