1 /* 2 * Copyright (c) 2022 OpenLuat & AirM2M 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy of 5 * this software and associated documentation files (the "Software"), to deal in 6 * the Software without restriction, including without limitation the rights to 7 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 8 * the Software, and to permit persons to whom the Software is furnished to do so, 9 * subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in all 12 * copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 16 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 17 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 18 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 */ 21 22 23 #ifndef __AIR105_UART_H 24 #define __AIR105_UART_H 25 26 #ifdef __cplusplus 27 extern "C" { 28 #endif 29 30 /* Includes ------------------------------------------------------------------*/ 31 #include "air105.h" 32 33 /** 34 * @brief UART Init Structure definition 35 */ 36 37 typedef struct 38 { 39 uint32_t UART_BaudRate; /*!< This member configures the UART communication baud rate. 40 The baud rate is computed using the following formula: 41 - IntegerDivider = ((PCLKx) / (16 * (UART_InitStruct->UART_BaudRate))) 42 - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */ 43 44 uint32_t UART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 45 This parameter can be a value of @ref UART_Word_Length */ 46 47 uint32_t UART_StopBits; /*!< Specifies the number of stop bits transmitted. 48 This parameter can be a value of @ref UART_Stop_Bits */ 49 50 uint32_t UART_Parity; /*!< Specifies the parity mode. 51 This parameter can be a value of @ref UART_Parity 52 @note When parity is enabled, the computed parity is inserted 53 at the MSB position of the transmitted data (9th bit when 54 the word length is set to 9 data bits; 8th bit when the 55 word length is set to 8 data bits). */ 56 57 } UART_InitTypeDef; 58 /** 59 * @} 60 */ 61 62 #define IS_UART_PERIPH(PERIPH) (((PERIPH) == UART0) || \ 63 ((PERIPH) == UART1) || \ 64 ((PERIPH) == UART2) || \ 65 ((PERIPH) == UART3)) 66 67 /** 68 * @brief UART FIFO Init Structure definition 69 */ 70 typedef struct 71 { 72 FunctionalState FIFO_Enable; 73 uint32_t FIFO_DMA_Mode; 74 uint32_t FIFO_RX_Trigger; 75 uint32_t FIFO_TX_Trigger; 76 uint32_t FIFO_TX_TriggerIntEnable; 77 }UART_FIFOInitTypeDef; 78 /** 79 * @} 80 */ 81 82 /** @defgroup UART_Word_Length 83 * @{ 84 */ 85 86 #define UART_WordLength_5b (0x00000000) 87 #define UART_WordLength_6b (0x00000001) 88 #define UART_WordLength_7b (0x00000002) 89 #define UART_WordLength_8b (0x00000003) 90 91 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WordLength_5b) || \ 92 ((LENGTH) == UART_WordLength_6b) || \ 93 ((LENGTH) == UART_WordLength_7b) || \ 94 ((LENGTH) == UART_WordLength_8b)) 95 /** 96 * @} 97 */ 98 99 /** @defgroup UART_Stop_Bits 100 * @{ 101 */ 102 103 #define UART_StopBits_1 (0x00000000) 104 #define UART_StopBits_1_5 (0x00000004) 105 #define UART_StopBits_2 (0x00000004) 106 #define IS_UART_STOPBITS(STOPBITS, DATALENGTH) (((STOPBITS) == UART_StopBits_1) || \ 107 ((STOPBITS) == UART_StopBits_1_5 && DATALENGTH == UART_WordLength_5b) || \ 108 ((STOPBITS) == UART_StopBits_2 && DATALENGTH != UART_WordLength_5b)) 109 /** 110 * @} 111 */ 112 113 /** @defgroup UART_Parity 114 * @{ 115 */ 116 117 #define UART_Parity_No (0x00000000) 118 #define UART_Parity_Even (0x00000018) 119 #define UART_Parity_Odd (0x00000008) 120 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_Parity_No) || \ 121 ((PARITY) == UART_Parity_Even) || \ 122 ((PARITY) == UART_Parity_Odd)) 123 /** 124 * @} 125 */ 126 127 /** @defgroup UART_Mode 128 * @{ 129 */ 130 131 #define UART_Mode_Rx ((uint16_t)0x0001) 132 #define UART_Mode_Tx ((uint16_t)0x0002) 133 #define IS_UART_MODE(MODE) ((((MODE) & (uint16_t)0xFFFC) == 0x00) && ((MODE) != (uint16_t)0x00)) 134 /** 135 * @} 136 */ 137 138 /** @defgroup UART_Set_Check_define 139 * @{ 140 */ 141 142 #define IS_UART_DATA(DATA) ((DATA) <= 0x000001FF) 143 #define IS_UART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21)) 144 145 /** 146 * @} 147 */ 148 149 /** @defgroup UART_Interrupt_definition 150 * @{ 151 */ 152 153 #define UART_IT_RX_RECVD (UART_IER_ERBFI) 154 #define UART_IT_TX_EMPTY (UART_IER_ETBEI) 155 #define UART_IT_LINE_STATUS (UART_IER_ELSI) 156 #define UART_IT_MODEM_STATUS (UART_IER_EDSSI) 157 158 /** 159 * @} 160 */ 161 162 163 /** @defgroup UART_Interrupt_identity 164 * @{ 165 */ 166 167 #define UART_IT_ID_MODEM_STATUS ((uint32_t)0x0000) 168 #define UART_IT_ID_NO_INTERRUPT ((uint32_t)0x0001) 169 #define UART_IT_ID_TX_EMPTY ((uint32_t)0x0002) 170 #define UART_IT_ID_RX_RECVD ((uint32_t)0x0004) 171 #define UART_IT_ID_LINE_STATUS ((uint32_t)0x0006) 172 #define UART_IT_ID_BUSY_DETECT ((uint32_t)0x0007) 173 #define UART_IT_ID_CHAR_TIMEOUT ((uint32_t)0x000C) 174 175 /** 176 * @} 177 */ 178 179 180 /** @defgroup UART_FIFO_Control_define 181 * @{ 182 */ 183 184 #define UART_FIFO_DEPTH (16) 185 186 #define UART_FIFO_RX ((uint32_t)0x0000) 187 #define UART_FIFO_TX ((uint32_t)0x0001) 188 189 #define UART_FIFO_DMA_Mode_0 ((uint32_t)0x0000) 190 #define UART_FIFO_DMA_Mode_1 ((uint32_t)0x0001) 191 192 #define UART_FIFO_RX_Trigger_1_Char ((uint32_t)0x0000) 193 #define UART_FIFO_RX_Trigger_1_4_Full ((uint32_t)0x0001) 194 #define UART_FIFO_RX_Trigger_1_2_Full ((uint32_t)0x0002) 195 #define UART_FIFO_RX_Trigger_2_CharLessFull ((uint32_t)0x0003) 196 197 #define UART_FIFO_TX_Trigger_Empty ((uint32_t)0x0000) 198 #define UART_FIFO_TX_Trigger_2_Chars ((uint32_t)0x0001) 199 #define UART_FIFO_TX_Trigger_1_4_Full ((uint32_t)0x0002) 200 #define UART_FIFO_TX_Trigger_1_2_Full ((uint32_t)0x0003) 201 202 /** 203 * @} 204 */ 205 206 207 /** @defgroup UART_Line_Status_Flag_define 208 * @{ 209 */ 210 #define UART_LINE_STATUS_RX_RECVD (UART_LSR_DR) 211 #define UART_LINE_STATUS_RX_OVERRUN_ERROR (UART_LSR_OE) 212 #define UART_LINE_STATUS_RX_PARITY_ERROR (UART_LSR_PE) 213 #define UART_LINE_STATUS_RX_FRAMING_ERROR (UART_LSR_FE) 214 #define UART_LINE_STATUS_RX_BREAK_INTERRUPT (UART_LSR_BI) 215 #define UART_LINE_STATUS_TX_HOLDING_REGISTER_EMPTY (UART_LSR_THRE) 216 #define UART_LINE_STATUS_TX_EMPTY (UART_LSR_TEMT) 217 #define UART_LINE_STATUS_RX_FIFO_ERROR (UART_LSR_PFE) 218 219 /** 220 * @} 221 */ 222 223 224 /** @defgroup UART_Modem_Status_Flag_define 225 * @{ 226 */ 227 #define UART_MODEM_STATUS_CTS_CHANGED (UART_MSR_DCTS) 228 #define UART_MODEM_STATUS_DSR_CHANGED (UART_MSR_DDSR) 229 #define UART_MODEM_STATUS_RI_CHANGED (UART_MSR_TERI) 230 #define UART_MODEM_STATUS_DCD_CHANGED (UART_MSR_DDCD) 231 #define UART_MODEM_STATUS_CTS (UART_MSR_CTS) 232 #define UART_MODEM_STATUS_DSR (UART_MSR_DSR) 233 #define UART_MODEM_STATUS_RI (UART_MSR_RI) 234 #define UART_MODEM_STATUS_DCD (UART_MSR_DCD) 235 /** 236 * @} 237 */ 238 239 240 /** @defgroup UART_Status_Flag_define 241 * @{ 242 */ 243 #define UART_STATUS_BUSY (UART_USR_BUSY) 244 #define UART_STATUS_TX_FIFO_NOT_FULL (UART_USR_TFNF) 245 #define UART_STATUS_TX_FIFO_EMPTY (UART_USR_TFE) 246 #define UART_STATUS_RX_FIFO_NOT_EMPTY (UART_USR_RFNE) 247 #define UART_STATUS_RX_FIFO_FULL (UART_USR_RFF) 248 249 250 251 /** 252 * @} 253 */ 254 255 void UART_DeInit(UART_TypeDef* UARTx); 256 void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct); 257 void UART_StructInit(UART_InitTypeDef* UART_InitStruct); 258 void UART_ITConfig(UART_TypeDef* UARTx, uint32_t UART_IT, FunctionalState NewState); 259 void UART_SendData(UART_TypeDef* UARTx, uint8_t Data); 260 uint8_t UART_ReceiveData(UART_TypeDef* UARTx); 261 void UART_FIFOInit(UART_TypeDef* UARTx, UART_FIFOInitTypeDef* UART_FIFOInitStruct); 262 void UART_FIFOStructInit(UART_FIFOInitTypeDef* UART_FIFOInitStruct); 263 void UART_FIFOReset(UART_TypeDef* UARTx, uint32_t UART_FIFO); 264 void UART_FIFOCmd(UART_TypeDef* UARTx,FunctionalState NewState); 265 void UART_SetRTS(UART_TypeDef* UARTx); 266 void UART_ResetRTS(UART_TypeDef* UARTx); 267 void UART_SetDTR(UART_TypeDef* UARTx); 268 void UART_ResetDTR(UART_TypeDef* UARTx); 269 void UART_SendBreak(UART_TypeDef* UARTx); 270 void UART_AutoFlowCtrlCmd(UART_TypeDef* UARTx, FunctionalState NewState); 271 void UART_IrDACmd(UART_TypeDef* UARTx, FunctionalState NewState); 272 273 uint32_t UART_GetLineStatus(UART_TypeDef* UARTx); 274 uint32_t UART_GetModemStatus(UART_TypeDef* UARTx); 275 uint32_t UART_GetITIdentity(UART_TypeDef* UARTx); 276 277 Boolean UART_IsTXEmpty(UART_TypeDef* UARTx); 278 Boolean UART_IsTXHoldingRegisterEmpty(UART_TypeDef* UARTx); 279 280 Boolean UART_IsRXFIFOFull(UART_TypeDef* UARTx); 281 Boolean UART_IsRXFIFONotEmpty(UART_TypeDef* UARTx); 282 Boolean UART_IsTXFIFOEmpty(UART_TypeDef* UARTx); 283 Boolean UART_IsTXFIFONotFull(UART_TypeDef* UARTx); 284 Boolean UART_IsBusy(UART_TypeDef* UARTx); 285 286 void UART_DMAGenerateSoftAck(UART_TypeDef* UARTx); 287 288 void UART_TXHaltCmd(UART_TypeDef* UARTx, FunctionalState NewStatus); 289 void UART_FIFOAccessModeCmd(UART_TypeDef* UARTx, FunctionalState NewStatus); 290 uint8_t UART_FIFOTxRead(UART_TypeDef* UARTx); 291 292 293 #ifdef __cplusplus 294 } 295 #endif 296 297 #endif // __AIR105_UART_H 298 299 /************************** (C) COPYRIGHT Megahunt *****END OF FILE****/ 300