1 /* Define to prevent recursive inclusion -------------------------------------*/ 2 #ifndef __AIR32F10x_ADC_H 3 #define __AIR32F10x_ADC_H 4 5 #ifdef __cplusplus 6 extern "C" { 7 #endif 8 9 /* Includes ------------------------------------------------------------------*/ 10 #include "air32f10x.h" 11 12 /** @addtogroup air32f10x_StdPeriph_Driver 13 * @{ 14 */ 15 16 /** @addtogroup ADC 17 * @{ 18 */ 19 20 /** @defgroup ADC_Exported_Types 21 * @{ 22 */ 23 24 /** 25 * @brief ADC Init structure definition 26 */ 27 28 typedef struct 29 { 30 uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or 31 dual mode. 32 This parameter can be a value of @ref ADC_mode */ 33 34 FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in 35 Scan (multichannels) or Single (one channel) mode. 36 This parameter can be set to ENABLE or DISABLE */ 37 38 FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in 39 Continuous or Single mode. 40 This parameter can be set to ENABLE or DISABLE. */ 41 42 uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog 43 to digital conversion of regular channels. This parameter 44 can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ 45 46 uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right. 47 This parameter can be a value of @ref ADC_data_align */ 48 49 uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted 50 using the sequencer for regular channel group. 51 This parameter must range from 1 to 16. */ 52 }ADC_InitTypeDef; 53 /** 54 * @} 55 */ 56 57 /** @defgroup ADC_Exported_Constants 58 * @{ 59 */ 60 61 #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ 62 ((PERIPH) == ADC2) || \ 63 ((PERIPH) == ADC3)) 64 65 #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ 66 ((PERIPH) == ADC3)) 67 68 /** @defgroup ADC_mode 69 * @{ 70 */ 71 72 #define ADC_Mode_Independent ((uint32_t)0x00000000) 73 #define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) 74 #define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) 75 #define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) 76 #define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) 77 #define ADC_Mode_InjecSimult ((uint32_t)0x00050000) 78 #define ADC_Mode_RegSimult ((uint32_t)0x00060000) 79 #define ADC_Mode_FastInterl ((uint32_t)0x00070000) 80 #define ADC_Mode_SlowInterl ((uint32_t)0x00080000) 81 #define ADC_Mode_AlterTrig ((uint32_t)0x00090000) 82 83 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ 84 ((MODE) == ADC_Mode_RegInjecSimult) || \ 85 ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ 86 ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ 87 ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ 88 ((MODE) == ADC_Mode_InjecSimult) || \ 89 ((MODE) == ADC_Mode_RegSimult) || \ 90 ((MODE) == ADC_Mode_FastInterl) || \ 91 ((MODE) == ADC_Mode_SlowInterl) || \ 92 ((MODE) == ADC_Mode_AlterTrig)) 93 /** 94 * @} 95 */ 96 97 /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion 98 * @{ 99 */ 100 101 #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */ 102 #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */ 103 #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */ 104 #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */ 105 #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */ 106 #define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */ 107 108 #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */ 109 #define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */ 110 111 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */ 112 #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */ 113 #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */ 114 #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */ 115 #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */ 116 #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */ 117 118 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ 119 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ 120 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ 121 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ 122 ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ 123 ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ 124 ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ 125 ((REGTRIG) == ADC_ExternalTrigConv_None) || \ 126 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ 127 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ 128 ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ 129 ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ 130 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ 131 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) 132 /** 133 * @} 134 */ 135 136 /** @defgroup ADC_data_align 137 * @{ 138 */ 139 140 #define ADC_DataAlign_Right ((uint32_t)0x00000000) 141 #define ADC_DataAlign_Left ((uint32_t)0x00000800) 142 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ 143 ((ALIGN) == ADC_DataAlign_Left)) 144 /** 145 * @} 146 */ 147 148 /** @defgroup ADC_channels 149 * @{ 150 */ 151 152 #define ADC_Channel_0 ((uint8_t)0x00) 153 #define ADC_Channel_1 ((uint8_t)0x01) 154 #define ADC_Channel_2 ((uint8_t)0x02) 155 #define ADC_Channel_3 ((uint8_t)0x03) 156 #define ADC_Channel_4 ((uint8_t)0x04) 157 #define ADC_Channel_5 ((uint8_t)0x05) 158 #define ADC_Channel_6 ((uint8_t)0x06) 159 #define ADC_Channel_7 ((uint8_t)0x07) 160 #define ADC_Channel_8 ((uint8_t)0x08) 161 #define ADC_Channel_9 ((uint8_t)0x09) 162 #define ADC_Channel_10 ((uint8_t)0x0A) 163 #define ADC_Channel_11 ((uint8_t)0x0B) 164 #define ADC_Channel_12 ((uint8_t)0x0C) 165 #define ADC_Channel_13 ((uint8_t)0x0D) 166 #define ADC_Channel_14 ((uint8_t)0x0E) 167 #define ADC_Channel_15 ((uint8_t)0x0F) 168 #define ADC_Channel_16 ((uint8_t)0x10) 169 #define ADC_Channel_17 ((uint8_t)0x11) 170 171 #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) 172 #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) 173 174 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ 175 ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ 176 ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ 177 ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ 178 ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ 179 ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ 180 ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ 181 ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ 182 ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) 183 /** 184 * @} 185 */ 186 187 /** @defgroup ADC_sampling_time 188 * @{ 189 */ 190 191 #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) 192 #define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) 193 #define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) 194 #define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) 195 #define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) 196 #define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) 197 #define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) 198 #define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) 199 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ 200 ((TIME) == ADC_SampleTime_7Cycles5) || \ 201 ((TIME) == ADC_SampleTime_13Cycles5) || \ 202 ((TIME) == ADC_SampleTime_28Cycles5) || \ 203 ((TIME) == ADC_SampleTime_41Cycles5) || \ 204 ((TIME) == ADC_SampleTime_55Cycles5) || \ 205 ((TIME) == ADC_SampleTime_71Cycles5) || \ 206 ((TIME) == ADC_SampleTime_239Cycles5)) 207 /** 208 * @} 209 */ 210 211 /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion 212 * @{ 213 */ 214 215 #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */ 216 #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */ 217 #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */ 218 #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */ 219 #define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */ 220 221 #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */ 222 #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */ 223 #define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */ 224 225 #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */ 226 #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */ 227 #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */ 228 #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */ 229 #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */ 230 231 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ 232 ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ 233 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ 234 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ 235 ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ 236 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ 237 ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ 238 ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ 239 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ 240 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ 241 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ 242 ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ 243 ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) 244 /** 245 * @} 246 */ 247 248 /** @defgroup ADC_injected_channel_selection 249 * @{ 250 */ 251 252 #define ADC_InjectedChannel_1 ((uint8_t)0x14) 253 #define ADC_InjectedChannel_2 ((uint8_t)0x18) 254 #define ADC_InjectedChannel_3 ((uint8_t)0x1C) 255 #define ADC_InjectedChannel_4 ((uint8_t)0x20) 256 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ 257 ((CHANNEL) == ADC_InjectedChannel_2) || \ 258 ((CHANNEL) == ADC_InjectedChannel_3) || \ 259 ((CHANNEL) == ADC_InjectedChannel_4)) 260 /** 261 * @} 262 */ 263 264 /** @defgroup ADC_analog_watchdog_selection 265 * @{ 266 */ 267 268 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) 269 #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) 270 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) 271 #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) 272 #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) 273 #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) 274 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) 275 276 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ 277 ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ 278 ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ 279 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ 280 ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ 281 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ 282 ((WATCHDOG) == ADC_AnalogWatchdog_None)) 283 /** 284 * @} 285 */ 286 287 /** @defgroup ADC_interrupts_definition 288 * @{ 289 */ 290 291 #define ADC_IT_EOC ((uint16_t)0x0220) 292 #define ADC_IT_AWD ((uint16_t)0x0140) 293 #define ADC_IT_JEOC ((uint16_t)0x0480) 294 295 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00)) 296 297 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ 298 ((IT) == ADC_IT_JEOC)) 299 /** 300 * @} 301 */ 302 303 /** @defgroup ADC_flags_definition 304 * @{ 305 */ 306 307 #define ADC_FLAG_AWD ((uint8_t)0x01) 308 #define ADC_FLAG_EOC ((uint8_t)0x02) 309 #define ADC_FLAG_JEOC ((uint8_t)0x04) 310 #define ADC_FLAG_JSTRT ((uint8_t)0x08) 311 #define ADC_FLAG_STRT ((uint8_t)0x10) 312 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00)) 313 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ 314 ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ 315 ((FLAG) == ADC_FLAG_STRT)) 316 /** 317 * @} 318 */ 319 320 /** @defgroup ADC_thresholds 321 * @{ 322 */ 323 324 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) 325 326 /** 327 * @} 328 */ 329 330 /** @defgroup ADC_injected_offset 331 * @{ 332 */ 333 334 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) 335 336 /** 337 * @} 338 */ 339 340 /** @defgroup ADC_injected_length 341 * @{ 342 */ 343 344 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) 345 346 /** 347 * @} 348 */ 349 350 /** @defgroup ADC_injected_rank 351 * @{ 352 */ 353 354 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) 355 356 /** 357 * @} 358 */ 359 360 361 /** @defgroup ADC_regular_length 362 * @{ 363 */ 364 365 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) 366 /** 367 * @} 368 */ 369 370 /** @defgroup ADC_regular_rank 371 * @{ 372 */ 373 374 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) 375 376 /** 377 * @} 378 */ 379 380 /** @defgroup ADC_regular_discontinuous_mode_number 381 * @{ 382 */ 383 384 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) 385 386 /** 387 * @} 388 */ 389 390 /** 391 * @} 392 */ 393 394 /** @defgroup ADC_Exported_Macros 395 * @{ 396 */ 397 398 /** 399 * @} 400 */ 401 402 /** @defgroup ADC_Exported_Functions 403 * @{ 404 */ 405 406 void ADC_DeInit(ADC_TypeDef* ADCx); 407 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); 408 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); 409 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); 410 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); 411 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); 412 void ADC_ResetCalibration(ADC_TypeDef* ADCx); 413 FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx); 414 void ADC_StartCalibration(ADC_TypeDef* ADCx); 415 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx); 416 void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 417 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); 418 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); 419 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 420 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); 421 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 422 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); 423 uint32_t ADC_GetDualModeConversionValue(void); 424 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 425 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 426 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); 427 void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 428 void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 429 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); 430 void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); 431 void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); 432 void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); 433 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); 434 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); 435 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); 436 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); 437 void ADC_TempSensorVrefintCmd(FunctionalState NewState); 438 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); 439 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); 440 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); 441 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); 442 443 #ifdef __cplusplus 444 } 445 #endif 446 447 #endif /*__AIR32F10x_ADC_H */ 448 449 /** 450 * @} 451 */ 452 453 /** 454 * @} 455 */ 456 457 /** 458 * @} 459 */ 460 461