1 /* Includes ------------------------------------------------------------------*/
2 #include "air32f10x_adc.h"
3 #include "air32f10x_rcc.h"
4
5 /** @defgroup ADC
6 * @brief ADC driver modules
7 * @{
8 */
9
10 /** @defgroup ADC_Private_TypesDefinitions
11 * @{
12 */
13
14 /**
15 * @}
16 */
17
18 /** @defgroup ADC_Private_Defines
19 * @{
20 */
21
22 /* ADC DISCNUM mask */
23 #define CR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF)
24
25 /* ADC DISCEN mask */
26 #define CR1_DISCEN_Set ((uint32_t)0x00000800)
27 #define CR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF)
28
29 /* ADC JAUTO mask */
30 #define CR1_JAUTO_Set ((uint32_t)0x00000400)
31 #define CR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF)
32
33 /* ADC JDISCEN mask */
34 #define CR1_JDISCEN_Set ((uint32_t)0x00001000)
35 #define CR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF)
36
37 /* ADC AWDCH mask */
38 #define CR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0)
39
40 /* ADC Analog watchdog enable mode mask */
41 #define CR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF)
42
43 /* CR1 register Mask */
44 #define CR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF)
45
46 /* ADC ADON mask */
47 #define CR2_ADON_Set ((uint32_t)0x00000001)
48 #define CR2_ADON_Reset ((uint32_t)0xFFFFFFFE)
49
50 /* ADC DMA mask */
51 #define CR2_DMA_Set ((uint32_t)0x00000100)
52 #define CR2_DMA_Reset ((uint32_t)0xFFFFFEFF)
53
54 /* ADC RSTCAL mask */
55 #define CR2_RSTCAL_Set ((uint32_t)0x00000008)
56
57 /* ADC CAL mask */
58 #define CR2_CAL_Set ((uint32_t)0x00000004)
59
60 /* ADC SWSTART mask */
61 #define CR2_SWSTART_Set ((uint32_t)0x00400000)
62
63 /* ADC EXTTRIG mask */
64 #define CR2_EXTTRIG_Set ((uint32_t)0x00100000)
65 #define CR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF)
66
67 /* ADC Software start mask */
68 #define CR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000)
69 #define CR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF)
70
71 /* ADC JEXTSEL mask */
72 #define CR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF)
73
74 /* ADC JEXTTRIG mask */
75 #define CR2_JEXTTRIG_Set ((uint32_t)0x00008000)
76 #define CR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF)
77
78 /* ADC JSWSTART mask */
79 #define CR2_JSWSTART_Set ((uint32_t)0x00200000)
80
81 /* ADC injected software start mask */
82 #define CR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000)
83 #define CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF)
84
85 /* ADC TSPD mask */
86 #define CR2_TSVREFE_Set ((uint32_t)0x00800000)
87 #define CR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF)
88
89 /* CR2 register Mask */
90 #define CR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD)
91
92 /* ADC SQx mask */
93 #define SQR3_SQ_Set ((uint32_t)0x0000001F)
94 #define SQR2_SQ_Set ((uint32_t)0x0000001F)
95 #define SQR1_SQ_Set ((uint32_t)0x0000001F)
96
97 /* SQR1 register Mask */
98 #define SQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF)
99
100 /* ADC JSQx mask */
101 #define JSQR_JSQ_Set ((uint32_t)0x0000001F)
102
103 /* ADC JL mask */
104 #define JSQR_JL_Set ((uint32_t)0x00300000)
105 #define JSQR_JL_Reset ((uint32_t)0xFFCFFFFF)
106
107 /* ADC SMPx mask */
108 #define SMPR1_SMP_Set ((uint32_t)0x00000007)
109 #define SMPR2_SMP_Set ((uint32_t)0x00000007)
110
111 /* ADC JDRx registers offset */
112 #define JDR_Offset ((uint8_t)0x28)
113
114 /* ADC1 DR register base address */
115 #define DR_ADDRESS ((uint32_t)0x4001244C)
116
117 /**
118 * @}
119 */
120
121 /** @defgroup ADC_Private_Macros
122 * @{
123 */
124
125 /**
126 * @}
127 */
128
129 /** @defgroup ADC_Private_Variables
130 * @{
131 */
132
133 /**
134 * @}
135 */
136
137 /** @defgroup ADC_Private_FunctionPrototypes
138 * @{
139 */
140
141 /**
142 * @}
143 */
144
145 /** @defgroup ADC_Private_Functions
146 * @{
147 */
148
149 /**
150 * @brief Deinitializes the ADCx peripheral registers to their default reset values.
151 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
152 * @retval None
153 */
ADC_DeInit(ADC_TypeDef * ADCx)154 void ADC_DeInit(ADC_TypeDef* ADCx)
155 {
156 /* Check the parameters */
157 assert_param(IS_ADC_ALL_PERIPH(ADCx));
158
159 if (ADCx == ADC1)
160 {
161 /* Enable ADC1 reset state */
162 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
163 /* Release ADC1 from reset state */
164 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
165 }
166 else if (ADCx == ADC2)
167 {
168 /* Enable ADC2 reset state */
169 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
170 /* Release ADC2 from reset state */
171 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
172 }
173 else
174 {
175 if (ADCx == ADC3)
176 {
177 /* Enable ADC3 reset state */
178 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE);
179 /* Release ADC3 from reset state */
180 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE);
181 }
182 }
183 }
184
185 /**
186 * @brief Initializes the ADCx peripheral according to the specified parameters
187 * in the ADC_InitStruct.
188 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
189 * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
190 * the configuration information for the specified ADC peripheral.
191 * @retval None
192 */
ADC_Init(ADC_TypeDef * ADCx,ADC_InitTypeDef * ADC_InitStruct)193 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
194 {
195 uint32_t tmpreg1 = 0;
196 uint8_t tmpreg2 = 0;
197 /* Check the parameters */
198 assert_param(IS_ADC_ALL_PERIPH(ADCx));
199 assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
200 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
201 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
202 assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));
203 assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
204 assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
205
206 /*---------------------------- ADCx CR1 Configuration -----------------*/
207 /* Get the ADCx CR1 value */
208 tmpreg1 = ADCx->CR1;
209 /* Clear DUALMOD and SCAN bits */
210 tmpreg1 &= CR1_CLEAR_Mask;
211 /* Configure ADCx: Dual mode and scan conversion mode */
212 /* Set DUALMOD bits according to ADC_Mode value */
213 /* Set SCAN bit according to ADC_ScanConvMode value */
214 tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8));
215 /* Write to ADCx CR1 */
216 ADCx->CR1 = tmpreg1;
217
218 /*---------------------------- ADCx CR2 Configuration -----------------*/
219 /* Get the ADCx CR2 value */
220 tmpreg1 = ADCx->CR2;
221 /* Clear CONT, ALIGN and EXTSEL bits */
222 tmpreg1 &= CR2_CLEAR_Mask;
223 /* Configure ADCx: external trigger event and continuous conversion mode */
224 /* Set ALIGN bit according to ADC_DataAlign value */
225 /* Set EXTSEL bits according to ADC_ExternalTrigConv value */
226 /* Set CONT bit according to ADC_ContinuousConvMode value */
227 tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv |
228 ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1));
229 /* Write to ADCx CR2 */
230 ADCx->CR2 = tmpreg1;
231
232 /*---------------------------- ADCx SQR1 Configuration -----------------*/
233 /* Get the ADCx SQR1 value */
234 tmpreg1 = ADCx->SQR1;
235 /* Clear L bits */
236 tmpreg1 &= SQR1_CLEAR_Mask;
237 /* Configure ADCx: regular channel sequence length */
238 /* Set L bits according to ADC_NbrOfChannel value */
239 tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1);
240 tmpreg1 |= (uint32_t)tmpreg2 << 20;
241 /* Write to ADCx SQR1 */
242 ADCx->SQR1 = tmpreg1;
243 }
244
245 /**
246 * @brief Fills each ADC_InitStruct member with its default value.
247 * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized.
248 * @retval None
249 */
ADC_StructInit(ADC_InitTypeDef * ADC_InitStruct)250 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
251 {
252 /* Reset ADC init structure parameters values */
253 /* Initialize the ADC_Mode member */
254 ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
255 /* initialize the ADC_ScanConvMode member */
256 ADC_InitStruct->ADC_ScanConvMode = DISABLE;
257 /* Initialize the ADC_ContinuousConvMode member */
258 ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
259 /* Initialize the ADC_ExternalTrigConv member */
260 ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
261 /* Initialize the ADC_DataAlign member */
262 ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
263 /* Initialize the ADC_NbrOfChannel member */
264 ADC_InitStruct->ADC_NbrOfChannel = 1;
265 }
266
267 /**
268 * @brief Enables or disables the specified ADC peripheral.
269 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
270 * @param NewState: new state of the ADCx peripheral.
271 * This parameter can be: ENABLE or DISABLE.
272 * @retval None
273 */
ADC_Cmd(ADC_TypeDef * ADCx,FunctionalState NewState)274 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
275 {
276 /* Check the parameters */
277 assert_param(IS_ADC_ALL_PERIPH(ADCx));
278 assert_param(IS_FUNCTIONAL_STATE(NewState));
279 if (NewState != DISABLE)
280 {
281 /* Set the ADON bit to wake up the ADC from power down mode */
282 ADCx->CR2 |= CR2_ADON_Set;
283 }
284 else
285 {
286 /* Disable the selected ADC peripheral */
287 ADCx->CR2 &= CR2_ADON_Reset;
288 }
289 }
290
291 /**
292 * @brief Enables or disables the specified ADC DMA request.
293 * @param ADCx: where x can be 1 or 3 to select the ADC peripheral.
294 * Note: ADC2 hasn't a DMA capability.
295 * @param NewState: new state of the selected ADC DMA transfer.
296 * This parameter can be: ENABLE or DISABLE.
297 * @retval None
298 */
ADC_DMACmd(ADC_TypeDef * ADCx,FunctionalState NewState)299 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
300 {
301 /* Check the parameters */
302 assert_param(IS_ADC_DMA_PERIPH(ADCx));
303 assert_param(IS_FUNCTIONAL_STATE(NewState));
304 if (NewState != DISABLE)
305 {
306 /* Enable the selected ADC DMA request */
307 ADCx->CR2 |= CR2_DMA_Set;
308 }
309 else
310 {
311 /* Disable the selected ADC DMA request */
312 ADCx->CR2 &= CR2_DMA_Reset;
313 }
314 }
315
316 /**
317 * @brief Enables or disables the specified ADC interrupts.
318 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
319 * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled.
320 * This parameter can be any combination of the following values:
321 * @arg ADC_IT_EOC: End of conversion interrupt mask
322 * @arg ADC_IT_AWD: Analog watchdog interrupt mask
323 * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
324 * @param NewState: new state of the specified ADC interrupts.
325 * This parameter can be: ENABLE or DISABLE.
326 * @retval None
327 */
ADC_ITConfig(ADC_TypeDef * ADCx,uint16_t ADC_IT,FunctionalState NewState)328 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState)
329 {
330 uint8_t itmask = 0;
331 /* Check the parameters */
332 assert_param(IS_ADC_ALL_PERIPH(ADCx));
333 assert_param(IS_FUNCTIONAL_STATE(NewState));
334 assert_param(IS_ADC_IT(ADC_IT));
335 /* Get the ADC IT index */
336 itmask = (uint8_t)ADC_IT;
337 if (NewState != DISABLE)
338 {
339 /* Enable the selected ADC interrupts */
340 ADCx->CR1 |= itmask;
341 }
342 else
343 {
344 /* Disable the selected ADC interrupts */
345 ADCx->CR1 &= (~(uint32_t)itmask);
346 }
347 }
348
349 /**
350 * @brief Resets the selected ADC calibration registers.
351 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
352 * @retval None
353 */
ADC_ResetCalibration(ADC_TypeDef * ADCx)354 void ADC_ResetCalibration(ADC_TypeDef* ADCx)
355 {
356 /* Check the parameters */
357 assert_param(IS_ADC_ALL_PERIPH(ADCx));
358 /* Resets the selected ADC calibration registers */
359 ADCx->CR2 |= CR2_RSTCAL_Set;
360 }
361
362 /**
363 * @brief Gets the selected ADC reset calibration registers status.
364 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
365 * @retval The new state of ADC reset calibration registers (SET or RESET).
366 */
ADC_GetResetCalibrationStatus(ADC_TypeDef * ADCx)367 FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx)
368 {
369 FlagStatus bitstatus = RESET;
370 /* Check the parameters */
371 assert_param(IS_ADC_ALL_PERIPH(ADCx));
372 /* Check the status of RSTCAL bit */
373 if ((ADCx->CR2 & CR2_RSTCAL_Set) != (uint32_t)RESET)
374 {
375 /* RSTCAL bit is set */
376 bitstatus = SET;
377 }
378 else
379 {
380 /* RSTCAL bit is reset */
381 bitstatus = RESET;
382 }
383 /* Return the RSTCAL bit status */
384 return bitstatus;
385 }
386
387 /**
388 * @brief Starts the selected ADC calibration process.
389 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
390 * @retval None
391 */
ADC_StartCalibration(ADC_TypeDef * ADCx)392 void ADC_StartCalibration(ADC_TypeDef* ADCx)
393 {
394 /* Check the parameters */
395 assert_param(IS_ADC_ALL_PERIPH(ADCx));
396 /* Enable the selected ADC calibration process */
397 ADCx->CR2 |= CR2_CAL_Set;
398 }
399
400 /**
401 * @brief Gets the selected ADC calibration status.
402 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
403 * @retval The new state of ADC calibration (SET or RESET).
404 */
ADC_GetCalibrationStatus(ADC_TypeDef * ADCx)405 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx)
406 {
407 FlagStatus bitstatus = RESET;
408 /* Check the parameters */
409 assert_param(IS_ADC_ALL_PERIPH(ADCx));
410 /* Check the status of CAL bit */
411 if ((ADCx->CR2 & CR2_CAL_Set) != (uint32_t)RESET)
412 {
413 /* CAL bit is set: calibration on going */
414 bitstatus = SET;
415 }
416 else
417 {
418 /* CAL bit is reset: end of calibration */
419 bitstatus = RESET;
420 }
421 /* Return the CAL bit status */
422 return bitstatus;
423 }
424
425 /**
426 * @brief Enables or disables the selected ADC software start conversion .
427 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
428 * @param NewState: new state of the selected ADC software start conversion.
429 * This parameter can be: ENABLE or DISABLE.
430 * @retval None
431 */
ADC_SoftwareStartConvCmd(ADC_TypeDef * ADCx,FunctionalState NewState)432 void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
433 {
434 /* Check the parameters */
435 assert_param(IS_ADC_ALL_PERIPH(ADCx));
436 assert_param(IS_FUNCTIONAL_STATE(NewState));
437 if (NewState != DISABLE)
438 {
439 /* Enable the selected ADC conversion on external event and start the selected
440 ADC conversion */
441 ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set;
442 }
443 else
444 {
445 /* Disable the selected ADC conversion on external event and stop the selected
446 ADC conversion */
447 ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset;
448 }
449 }
450
451 /**
452 * @brief Gets the selected ADC Software start conversion Status.
453 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
454 * @retval The new state of ADC software start conversion (SET or RESET).
455 */
ADC_GetSoftwareStartConvStatus(ADC_TypeDef * ADCx)456 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
457 {
458 FlagStatus bitstatus = RESET;
459 /* Check the parameters */
460 assert_param(IS_ADC_ALL_PERIPH(ADCx));
461 /* Check the status of SWSTART bit */
462 if ((ADCx->CR2 & CR2_SWSTART_Set) != (uint32_t)RESET)
463 {
464 /* SWSTART bit is set */
465 bitstatus = SET;
466 }
467 else
468 {
469 /* SWSTART bit is reset */
470 bitstatus = RESET;
471 }
472 /* Return the SWSTART bit status */
473 return bitstatus;
474 }
475
476 /**
477 * @brief Configures the discontinuous mode for the selected ADC regular
478 * group channel.
479 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
480 * @param Number: specifies the discontinuous mode regular channel
481 * count value. This number must be between 1 and 8.
482 * @retval None
483 */
ADC_DiscModeChannelCountConfig(ADC_TypeDef * ADCx,uint8_t Number)484 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number)
485 {
486 uint32_t tmpreg1 = 0;
487 uint32_t tmpreg2 = 0;
488 /* Check the parameters */
489 assert_param(IS_ADC_ALL_PERIPH(ADCx));
490 assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
491 /* Get the old register value */
492 tmpreg1 = ADCx->CR1;
493 /* Clear the old discontinuous mode channel count */
494 tmpreg1 &= CR1_DISCNUM_Reset;
495 /* Set the discontinuous mode channel count */
496 tmpreg2 = Number - 1;
497 tmpreg1 |= tmpreg2 << 13;
498 /* Store the new register value */
499 ADCx->CR1 = tmpreg1;
500 }
501
502 /**
503 * @brief Enables or disables the discontinuous mode on regular group
504 * channel for the specified ADC
505 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
506 * @param NewState: new state of the selected ADC discontinuous mode
507 * on regular group channel.
508 * This parameter can be: ENABLE or DISABLE.
509 * @retval None
510 */
ADC_DiscModeCmd(ADC_TypeDef * ADCx,FunctionalState NewState)511 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
512 {
513 /* Check the parameters */
514 assert_param(IS_ADC_ALL_PERIPH(ADCx));
515 assert_param(IS_FUNCTIONAL_STATE(NewState));
516 if (NewState != DISABLE)
517 {
518 /* Enable the selected ADC regular discontinuous mode */
519 ADCx->CR1 |= CR1_DISCEN_Set;
520 }
521 else
522 {
523 /* Disable the selected ADC regular discontinuous mode */
524 ADCx->CR1 &= CR1_DISCEN_Reset;
525 }
526 }
527
528 /**
529 * @brief Configures for the selected ADC regular channel its corresponding
530 * rank in the sequencer and its sample time.
531 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
532 * @param ADC_Channel: the ADC channel to configure.
533 * This parameter can be one of the following values:
534 * @arg ADC_Channel_0: ADC Channel0 selected
535 * @arg ADC_Channel_1: ADC Channel1 selected
536 * @arg ADC_Channel_2: ADC Channel2 selected
537 * @arg ADC_Channel_3: ADC Channel3 selected
538 * @arg ADC_Channel_4: ADC Channel4 selected
539 * @arg ADC_Channel_5: ADC Channel5 selected
540 * @arg ADC_Channel_6: ADC Channel6 selected
541 * @arg ADC_Channel_7: ADC Channel7 selected
542 * @arg ADC_Channel_8: ADC Channel8 selected
543 * @arg ADC_Channel_9: ADC Channel9 selected
544 * @arg ADC_Channel_10: ADC Channel10 selected
545 * @arg ADC_Channel_11: ADC Channel11 selected
546 * @arg ADC_Channel_12: ADC Channel12 selected
547 * @arg ADC_Channel_13: ADC Channel13 selected
548 * @arg ADC_Channel_14: ADC Channel14 selected
549 * @arg ADC_Channel_15: ADC Channel15 selected
550 * @arg ADC_Channel_16: ADC Channel16 selected
551 * @arg ADC_Channel_17: ADC Channel17 selected
552 * @param Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16.
553 * @param ADC_SampleTime: The sample time value to be set for the selected channel.
554 * This parameter can be one of the following values:
555 * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
556 * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
557 * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
558 * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles
559 * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles
560 * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles
561 * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles
562 * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles
563 * @retval None
564 */
ADC_RegularChannelConfig(ADC_TypeDef * ADCx,uint8_t ADC_Channel,uint8_t Rank,uint8_t ADC_SampleTime)565 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
566 {
567 uint32_t tmpreg1 = 0, tmpreg2 = 0;
568 /* Check the parameters */
569 assert_param(IS_ADC_ALL_PERIPH(ADCx));
570 assert_param(IS_ADC_CHANNEL(ADC_Channel));
571 assert_param(IS_ADC_REGULAR_RANK(Rank));
572 assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
573 /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
574 if (ADC_Channel > ADC_Channel_9)
575 {
576 /* Get the old register value */
577 tmpreg1 = ADCx->SMPR1;
578 /* Calculate the mask to clear */
579 tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10));
580 /* Clear the old channel sample time */
581 tmpreg1 &= ~tmpreg2;
582 /* Calculate the mask to set */
583 tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10));
584 /* Set the new channel sample time */
585 tmpreg1 |= tmpreg2;
586 /* Store the new register value */
587 ADCx->SMPR1 = tmpreg1;
588 }
589 else /* ADC_Channel include in ADC_Channel_[0..9] */
590 {
591 /* Get the old register value */
592 tmpreg1 = ADCx->SMPR2;
593 /* Calculate the mask to clear */
594 tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel);
595 /* Clear the old channel sample time */
596 tmpreg1 &= ~tmpreg2;
597 /* Calculate the mask to set */
598 tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
599 /* Set the new channel sample time */
600 tmpreg1 |= tmpreg2;
601 /* Store the new register value */
602 ADCx->SMPR2 = tmpreg1;
603 }
604 /* For Rank 1 to 6 */
605 if (Rank < 7)
606 {
607 /* Get the old register value */
608 tmpreg1 = ADCx->SQR3;
609 /* Calculate the mask to clear */
610 tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1));
611 /* Clear the old SQx bits for the selected rank */
612 tmpreg1 &= ~tmpreg2;
613 /* Calculate the mask to set */
614 tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1));
615 /* Set the SQx bits for the selected rank */
616 tmpreg1 |= tmpreg2;
617 /* Store the new register value */
618 ADCx->SQR3 = tmpreg1;
619 }
620 /* For Rank 7 to 12 */
621 else if (Rank < 13)
622 {
623 /* Get the old register value */
624 tmpreg1 = ADCx->SQR2;
625 /* Calculate the mask to clear */
626 tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7));
627 /* Clear the old SQx bits for the selected rank */
628 tmpreg1 &= ~tmpreg2;
629 /* Calculate the mask to set */
630 tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7));
631 /* Set the SQx bits for the selected rank */
632 tmpreg1 |= tmpreg2;
633 /* Store the new register value */
634 ADCx->SQR2 = tmpreg1;
635 }
636 /* For Rank 13 to 16 */
637 else
638 {
639 /* Get the old register value */
640 tmpreg1 = ADCx->SQR1;
641 /* Calculate the mask to clear */
642 tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13));
643 /* Clear the old SQx bits for the selected rank */
644 tmpreg1 &= ~tmpreg2;
645 /* Calculate the mask to set */
646 tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13));
647 /* Set the SQx bits for the selected rank */
648 tmpreg1 |= tmpreg2;
649 /* Store the new register value */
650 ADCx->SQR1 = tmpreg1;
651 }
652 }
653
654 /**
655 * @brief Enables or disables the ADCx conversion through external trigger.
656 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
657 * @param NewState: new state of the selected ADC external trigger start of conversion.
658 * This parameter can be: ENABLE or DISABLE.
659 * @retval None
660 */
ADC_ExternalTrigConvCmd(ADC_TypeDef * ADCx,FunctionalState NewState)661 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
662 {
663 /* Check the parameters */
664 assert_param(IS_ADC_ALL_PERIPH(ADCx));
665 assert_param(IS_FUNCTIONAL_STATE(NewState));
666 if (NewState != DISABLE)
667 {
668 /* Enable the selected ADC conversion on external event */
669 ADCx->CR2 |= CR2_EXTTRIG_Set;
670 }
671 else
672 {
673 /* Disable the selected ADC conversion on external event */
674 ADCx->CR2 &= CR2_EXTTRIG_Reset;
675 }
676 }
677
678 /**
679 * @brief Returns the last ADCx conversion result data for regular channel.
680 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
681 * @retval The Data conversion value.
682 */
ADC_GetConversionValue(ADC_TypeDef * ADCx)683 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
684 {
685 /* Check the parameters */
686 assert_param(IS_ADC_ALL_PERIPH(ADCx));
687 /* Return the selected ADC conversion value */
688 return (uint16_t) ADCx->DR;
689 }
690
691 /**
692 * @brief Returns the last ADC1 and ADC2 conversion result data in dual mode.
693 * @retval The Data conversion value.
694 */
ADC_GetDualModeConversionValue(void)695 uint32_t ADC_GetDualModeConversionValue(void)
696 {
697 /* Return the dual mode conversion value */
698 return (*(__IO uint32_t *) DR_ADDRESS);
699 }
700
701 /**
702 * @brief Enables or disables the selected ADC automatic injected group
703 * conversion after regular one.
704 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
705 * @param NewState: new state of the selected ADC auto injected conversion
706 * This parameter can be: ENABLE or DISABLE.
707 * @retval None
708 */
ADC_AutoInjectedConvCmd(ADC_TypeDef * ADCx,FunctionalState NewState)709 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
710 {
711 /* Check the parameters */
712 assert_param(IS_ADC_ALL_PERIPH(ADCx));
713 assert_param(IS_FUNCTIONAL_STATE(NewState));
714 if (NewState != DISABLE)
715 {
716 /* Enable the selected ADC automatic injected group conversion */
717 ADCx->CR1 |= CR1_JAUTO_Set;
718 }
719 else
720 {
721 /* Disable the selected ADC automatic injected group conversion */
722 ADCx->CR1 &= CR1_JAUTO_Reset;
723 }
724 }
725
726 /**
727 * @brief Enables or disables the discontinuous mode for injected group
728 * channel for the specified ADC
729 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
730 * @param NewState: new state of the selected ADC discontinuous mode
731 * on injected group channel.
732 * This parameter can be: ENABLE or DISABLE.
733 * @retval None
734 */
ADC_InjectedDiscModeCmd(ADC_TypeDef * ADCx,FunctionalState NewState)735 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
736 {
737 /* Check the parameters */
738 assert_param(IS_ADC_ALL_PERIPH(ADCx));
739 assert_param(IS_FUNCTIONAL_STATE(NewState));
740 if (NewState != DISABLE)
741 {
742 /* Enable the selected ADC injected discontinuous mode */
743 ADCx->CR1 |= CR1_JDISCEN_Set;
744 }
745 else
746 {
747 /* Disable the selected ADC injected discontinuous mode */
748 ADCx->CR1 &= CR1_JDISCEN_Reset;
749 }
750 }
751
752 /**
753 * @brief Configures the ADCx external trigger for injected channels conversion.
754 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
755 * @param ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion.
756 * This parameter can be one of the following values:
757 * @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected (for ADC1, ADC2 and ADC3)
758 * @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected (for ADC1, ADC2 and ADC3)
759 * @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected (for ADC1 and ADC2)
760 * @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected (for ADC1 and ADC2)
761 * @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected (for ADC1 and ADC2)
762 * @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected (for ADC1 and ADC2)
763 * @arg ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4: External interrupt line 15 or Timer8
764 * capture compare4 event selected (for ADC1 and ADC2)
765 * @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected (for ADC3 only)
766 * @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected (for ADC3 only)
767 * @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected (for ADC3 only)
768 * @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected (for ADC3 only)
769 * @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected (for ADC3 only)
770 * @arg ADC_ExternalTrigInjecConv_None: Injected conversion started by software and not
771 * by external trigger (for ADC1, ADC2 and ADC3)
772 * @retval None
773 */
ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef * ADCx,uint32_t ADC_ExternalTrigInjecConv)774 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv)
775 {
776 uint32_t tmpreg = 0;
777 /* Check the parameters */
778 assert_param(IS_ADC_ALL_PERIPH(ADCx));
779 assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv));
780 /* Get the old register value */
781 tmpreg = ADCx->CR2;
782 /* Clear the old external event selection for injected group */
783 tmpreg &= CR2_JEXTSEL_Reset;
784 /* Set the external event selection for injected group */
785 tmpreg |= ADC_ExternalTrigInjecConv;
786 /* Store the new register value */
787 ADCx->CR2 = tmpreg;
788 }
789
790 /**
791 * @brief Enables or disables the ADCx injected channels conversion through
792 * external trigger
793 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
794 * @param NewState: new state of the selected ADC external trigger start of
795 * injected conversion.
796 * This parameter can be: ENABLE or DISABLE.
797 * @retval None
798 */
ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef * ADCx,FunctionalState NewState)799 void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
800 {
801 /* Check the parameters */
802 assert_param(IS_ADC_ALL_PERIPH(ADCx));
803 assert_param(IS_FUNCTIONAL_STATE(NewState));
804 if (NewState != DISABLE)
805 {
806 /* Enable the selected ADC external event selection for injected group */
807 ADCx->CR2 |= CR2_JEXTTRIG_Set;
808 }
809 else
810 {
811 /* Disable the selected ADC external event selection for injected group */
812 ADCx->CR2 &= CR2_JEXTTRIG_Reset;
813 }
814 }
815
816 /**
817 * @brief Enables or disables the selected ADC start of the injected
818 * channels conversion.
819 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
820 * @param NewState: new state of the selected ADC software start injected conversion.
821 * This parameter can be: ENABLE or DISABLE.
822 * @retval None
823 */
ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef * ADCx,FunctionalState NewState)824 void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
825 {
826 /* Check the parameters */
827 assert_param(IS_ADC_ALL_PERIPH(ADCx));
828 assert_param(IS_FUNCTIONAL_STATE(NewState));
829 if (NewState != DISABLE)
830 {
831 /* Enable the selected ADC conversion for injected group on external event and start the selected
832 ADC injected conversion */
833 ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set;
834 }
835 else
836 {
837 /* Disable the selected ADC conversion on external event for injected group and stop the selected
838 ADC injected conversion */
839 ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset;
840 }
841 }
842
843 /**
844 * @brief Gets the selected ADC Software start injected conversion Status.
845 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
846 * @retval The new state of ADC software start injected conversion (SET or RESET).
847 */
ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef * ADCx)848 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx)
849 {
850 FlagStatus bitstatus = RESET;
851 /* Check the parameters */
852 assert_param(IS_ADC_ALL_PERIPH(ADCx));
853 /* Check the status of JSWSTART bit */
854 if ((ADCx->CR2 & CR2_JSWSTART_Set) != (uint32_t)RESET)
855 {
856 /* JSWSTART bit is set */
857 bitstatus = SET;
858 }
859 else
860 {
861 /* JSWSTART bit is reset */
862 bitstatus = RESET;
863 }
864 /* Return the JSWSTART bit status */
865 return bitstatus;
866 }
867
868 /**
869 * @brief Configures for the selected ADC injected channel its corresponding
870 * rank in the sequencer and its sample time.
871 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
872 * @param ADC_Channel: the ADC channel to configure.
873 * This parameter can be one of the following values:
874 * @arg ADC_Channel_0: ADC Channel0 selected
875 * @arg ADC_Channel_1: ADC Channel1 selected
876 * @arg ADC_Channel_2: ADC Channel2 selected
877 * @arg ADC_Channel_3: ADC Channel3 selected
878 * @arg ADC_Channel_4: ADC Channel4 selected
879 * @arg ADC_Channel_5: ADC Channel5 selected
880 * @arg ADC_Channel_6: ADC Channel6 selected
881 * @arg ADC_Channel_7: ADC Channel7 selected
882 * @arg ADC_Channel_8: ADC Channel8 selected
883 * @arg ADC_Channel_9: ADC Channel9 selected
884 * @arg ADC_Channel_10: ADC Channel10 selected
885 * @arg ADC_Channel_11: ADC Channel11 selected
886 * @arg ADC_Channel_12: ADC Channel12 selected
887 * @arg ADC_Channel_13: ADC Channel13 selected
888 * @arg ADC_Channel_14: ADC Channel14 selected
889 * @arg ADC_Channel_15: ADC Channel15 selected
890 * @arg ADC_Channel_16: ADC Channel16 selected
891 * @arg ADC_Channel_17: ADC Channel17 selected
892 * @param Rank: The rank in the injected group sequencer. This parameter must be between 1 and 4.
893 * @param ADC_SampleTime: The sample time value to be set for the selected channel.
894 * This parameter can be one of the following values:
895 * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
896 * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
897 * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
898 * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles
899 * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles
900 * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles
901 * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles
902 * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles
903 * @retval None
904 */
ADC_InjectedChannelConfig(ADC_TypeDef * ADCx,uint8_t ADC_Channel,uint8_t Rank,uint8_t ADC_SampleTime)905 void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
906 {
907 uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0;
908 /* Check the parameters */
909 assert_param(IS_ADC_ALL_PERIPH(ADCx));
910 assert_param(IS_ADC_CHANNEL(ADC_Channel));
911 assert_param(IS_ADC_INJECTED_RANK(Rank));
912 assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
913 /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
914 if (ADC_Channel > ADC_Channel_9)
915 {
916 /* Get the old register value */
917 tmpreg1 = ADCx->SMPR1;
918 /* Calculate the mask to clear */
919 tmpreg2 = SMPR1_SMP_Set << (3*(ADC_Channel - 10));
920 /* Clear the old channel sample time */
921 tmpreg1 &= ~tmpreg2;
922 /* Calculate the mask to set */
923 tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10));
924 /* Set the new channel sample time */
925 tmpreg1 |= tmpreg2;
926 /* Store the new register value */
927 ADCx->SMPR1 = tmpreg1;
928 }
929 else /* ADC_Channel include in ADC_Channel_[0..9] */
930 {
931 /* Get the old register value */
932 tmpreg1 = ADCx->SMPR2;
933 /* Calculate the mask to clear */
934 tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel);
935 /* Clear the old channel sample time */
936 tmpreg1 &= ~tmpreg2;
937 /* Calculate the mask to set */
938 tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
939 /* Set the new channel sample time */
940 tmpreg1 |= tmpreg2;
941 /* Store the new register value */
942 ADCx->SMPR2 = tmpreg1;
943 }
944 /* Rank configuration */
945 /* Get the old register value */
946 tmpreg1 = ADCx->JSQR;
947 /* Get JL value: Number = JL+1 */
948 tmpreg3 = (tmpreg1 & JSQR_JL_Set)>> 20;
949 /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */
950 tmpreg2 = JSQR_JSQ_Set << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
951 /* Clear the old JSQx bits for the selected rank */
952 tmpreg1 &= ~tmpreg2;
953 /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */
954 tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
955 /* Set the JSQx bits for the selected rank */
956 tmpreg1 |= tmpreg2;
957 /* Store the new register value */
958 ADCx->JSQR = tmpreg1;
959 }
960
961 /**
962 * @brief Configures the sequencer length for injected channels
963 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
964 * @param Length: The sequencer length.
965 * This parameter must be a number between 1 to 4.
966 * @retval None
967 */
ADC_InjectedSequencerLengthConfig(ADC_TypeDef * ADCx,uint8_t Length)968 void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length)
969 {
970 uint32_t tmpreg1 = 0;
971 uint32_t tmpreg2 = 0;
972 /* Check the parameters */
973 assert_param(IS_ADC_ALL_PERIPH(ADCx));
974 assert_param(IS_ADC_INJECTED_LENGTH(Length));
975
976 /* Get the old register value */
977 tmpreg1 = ADCx->JSQR;
978 /* Clear the old injected sequnence lenght JL bits */
979 tmpreg1 &= JSQR_JL_Reset;
980 /* Set the injected sequnence lenght JL bits */
981 tmpreg2 = Length - 1;
982 tmpreg1 |= tmpreg2 << 20;
983 /* Store the new register value */
984 ADCx->JSQR = tmpreg1;
985 }
986
987 /**
988 * @brief Set the injected channels conversion value offset
989 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
990 * @param ADC_InjectedChannel: the ADC injected channel to set its offset.
991 * This parameter can be one of the following values:
992 * @arg ADC_InjectedChannel_1: Injected Channel1 selected
993 * @arg ADC_InjectedChannel_2: Injected Channel2 selected
994 * @arg ADC_InjectedChannel_3: Injected Channel3 selected
995 * @arg ADC_InjectedChannel_4: Injected Channel4 selected
996 * @param Offset: the offset value for the selected ADC injected channel
997 * This parameter must be a 12bit value.
998 * @retval None
999 */
ADC_SetInjectedOffset(ADC_TypeDef * ADCx,uint8_t ADC_InjectedChannel,uint16_t Offset)1000 void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset)
1001 {
1002 __IO uint32_t tmp = 0;
1003
1004 /* Check the parameters */
1005 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1006 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
1007 assert_param(IS_ADC_OFFSET(Offset));
1008
1009 tmp = (uint32_t)ADCx;
1010 tmp += ADC_InjectedChannel;
1011
1012 /* Set the selected injected channel data offset */
1013 *(__IO uint32_t *) tmp = (uint32_t)Offset;
1014 }
1015
1016 /**
1017 * @brief Returns the ADC injected channel conversion result
1018 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1019 * @param ADC_InjectedChannel: the converted ADC injected channel.
1020 * This parameter can be one of the following values:
1021 * @arg ADC_InjectedChannel_1: Injected Channel1 selected
1022 * @arg ADC_InjectedChannel_2: Injected Channel2 selected
1023 * @arg ADC_InjectedChannel_3: Injected Channel3 selected
1024 * @arg ADC_InjectedChannel_4: Injected Channel4 selected
1025 * @retval The Data conversion value.
1026 */
ADC_GetInjectedConversionValue(ADC_TypeDef * ADCx,uint8_t ADC_InjectedChannel)1027 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel)
1028 {
1029 __IO uint32_t tmp = 0;
1030
1031 /* Check the parameters */
1032 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1033 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
1034
1035 tmp = (uint32_t)ADCx;
1036 tmp += ADC_InjectedChannel + JDR_Offset;
1037
1038 /* Returns the selected injected channel conversion data value */
1039 return (uint16_t) (*(__IO uint32_t*) tmp);
1040 }
1041
1042 /**
1043 * @brief Enables or disables the analog watchdog on single/all regular
1044 * or injected channels
1045 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1046 * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration.
1047 * This parameter can be one of the following values:
1048 * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel
1049 * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel
1050 * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel
1051 * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel
1052 * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel
1053 * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels
1054 * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog
1055 * @retval None
1056 */
ADC_AnalogWatchdogCmd(ADC_TypeDef * ADCx,uint32_t ADC_AnalogWatchdog)1057 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog)
1058 {
1059 uint32_t tmpreg = 0;
1060 /* Check the parameters */
1061 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1062 assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
1063 /* Get the old register value */
1064 tmpreg = ADCx->CR1;
1065 /* Clear AWDEN, AWDENJ and AWDSGL bits */
1066 tmpreg &= CR1_AWDMode_Reset;
1067 /* Set the analog watchdog enable mode */
1068 tmpreg |= ADC_AnalogWatchdog;
1069 /* Store the new register value */
1070 ADCx->CR1 = tmpreg;
1071 }
1072
1073 /**
1074 * @brief Configures the high and low thresholds of the analog watchdog.
1075 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1076 * @param HighThreshold: the ADC analog watchdog High threshold value.
1077 * This parameter must be a 12bit value.
1078 * @param LowThreshold: the ADC analog watchdog Low threshold value.
1079 * This parameter must be a 12bit value.
1080 * @retval None
1081 */
ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef * ADCx,uint16_t HighThreshold,uint16_t LowThreshold)1082 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
1083 uint16_t LowThreshold)
1084 {
1085 /* Check the parameters */
1086 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1087 assert_param(IS_ADC_THRESHOLD(HighThreshold));
1088 assert_param(IS_ADC_THRESHOLD(LowThreshold));
1089 /* Set the ADCx high threshold */
1090 ADCx->HTR = HighThreshold;
1091 /* Set the ADCx low threshold */
1092 ADCx->LTR = LowThreshold;
1093 }
1094
1095 /**
1096 * @brief Configures the analog watchdog guarded single channel
1097 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1098 * @param ADC_Channel: the ADC channel to configure for the analog watchdog.
1099 * This parameter can be one of the following values:
1100 * @arg ADC_Channel_0: ADC Channel0 selected
1101 * @arg ADC_Channel_1: ADC Channel1 selected
1102 * @arg ADC_Channel_2: ADC Channel2 selected
1103 * @arg ADC_Channel_3: ADC Channel3 selected
1104 * @arg ADC_Channel_4: ADC Channel4 selected
1105 * @arg ADC_Channel_5: ADC Channel5 selected
1106 * @arg ADC_Channel_6: ADC Channel6 selected
1107 * @arg ADC_Channel_7: ADC Channel7 selected
1108 * @arg ADC_Channel_8: ADC Channel8 selected
1109 * @arg ADC_Channel_9: ADC Channel9 selected
1110 * @arg ADC_Channel_10: ADC Channel10 selected
1111 * @arg ADC_Channel_11: ADC Channel11 selected
1112 * @arg ADC_Channel_12: ADC Channel12 selected
1113 * @arg ADC_Channel_13: ADC Channel13 selected
1114 * @arg ADC_Channel_14: ADC Channel14 selected
1115 * @arg ADC_Channel_15: ADC Channel15 selected
1116 * @arg ADC_Channel_16: ADC Channel16 selected
1117 * @arg ADC_Channel_17: ADC Channel17 selected
1118 * @retval None
1119 */
ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef * ADCx,uint8_t ADC_Channel)1120 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
1121 {
1122 uint32_t tmpreg = 0;
1123 /* Check the parameters */
1124 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1125 assert_param(IS_ADC_CHANNEL(ADC_Channel));
1126 /* Get the old register value */
1127 tmpreg = ADCx->CR1;
1128 /* Clear the Analog watchdog channel select bits */
1129 tmpreg &= CR1_AWDCH_Reset;
1130 /* Set the Analog watchdog channel */
1131 tmpreg |= ADC_Channel;
1132 /* Store the new register value */
1133 ADCx->CR1 = tmpreg;
1134 }
1135
1136 /**
1137 * @brief Enables or disables the temperature sensor and Vrefint channel.
1138 * @param NewState: new state of the temperature sensor.
1139 * This parameter can be: ENABLE or DISABLE.
1140 * @retval None
1141 */
ADC_TempSensorVrefintCmd(FunctionalState NewState)1142 void ADC_TempSensorVrefintCmd(FunctionalState NewState)
1143 {
1144 /* Check the parameters */
1145 assert_param(IS_FUNCTIONAL_STATE(NewState));
1146 if (NewState != DISABLE)
1147 {
1148 /* Enable the temperature sensor and Vrefint channel*/
1149 ADC1->CR2 |= CR2_TSVREFE_Set;
1150 }
1151 else
1152 {
1153 /* Disable the temperature sensor and Vrefint channel*/
1154 ADC1->CR2 &= CR2_TSVREFE_Reset;
1155 }
1156 }
1157
1158 /**
1159 * @brief Checks whether the specified ADC flag is set or not.
1160 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1161 * @param ADC_FLAG: specifies the flag to check.
1162 * This parameter can be one of the following values:
1163 * @arg ADC_FLAG_AWD: Analog watchdog flag
1164 * @arg ADC_FLAG_EOC: End of conversion flag
1165 * @arg ADC_FLAG_JEOC: End of injected group conversion flag
1166 * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag
1167 * @arg ADC_FLAG_STRT: Start of regular group conversion flag
1168 * @retval The new state of ADC_FLAG (SET or RESET).
1169 */
ADC_GetFlagStatus(ADC_TypeDef * ADCx,uint8_t ADC_FLAG)1170 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
1171 {
1172 FlagStatus bitstatus = RESET;
1173 /* Check the parameters */
1174 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1175 assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
1176 /* Check the status of the specified ADC flag */
1177 if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET)
1178 {
1179 /* ADC_FLAG is set */
1180 bitstatus = SET;
1181 }
1182 else
1183 {
1184 /* ADC_FLAG is reset */
1185 bitstatus = RESET;
1186 }
1187 /* Return the ADC_FLAG status */
1188 return bitstatus;
1189 }
1190
1191 /**
1192 * @brief Clears the ADCx's pending flags.
1193 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1194 * @param ADC_FLAG: specifies the flag to clear.
1195 * This parameter can be any combination of the following values:
1196 * @arg ADC_FLAG_AWD: Analog watchdog flag
1197 * @arg ADC_FLAG_EOC: End of conversion flag
1198 * @arg ADC_FLAG_JEOC: End of injected group conversion flag
1199 * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag
1200 * @arg ADC_FLAG_STRT: Start of regular group conversion flag
1201 * @retval None
1202 */
ADC_ClearFlag(ADC_TypeDef * ADCx,uint8_t ADC_FLAG)1203 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
1204 {
1205 /* Check the parameters */
1206 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1207 assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
1208 /* Clear the selected ADC flags */
1209 ADCx->SR = ~(uint32_t)ADC_FLAG;
1210 }
1211
1212 /**
1213 * @brief Checks whether the specified ADC interrupt has occurred or not.
1214 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1215 * @param ADC_IT: specifies the ADC interrupt source to check.
1216 * This parameter can be one of the following values:
1217 * @arg ADC_IT_EOC: End of conversion interrupt mask
1218 * @arg ADC_IT_AWD: Analog watchdog interrupt mask
1219 * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
1220 * @retval The new state of ADC_IT (SET or RESET).
1221 */
ADC_GetITStatus(ADC_TypeDef * ADCx,uint16_t ADC_IT)1222 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT)
1223 {
1224 ITStatus bitstatus = RESET;
1225 uint32_t itmask = 0, enablestatus = 0;
1226 /* Check the parameters */
1227 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1228 assert_param(IS_ADC_GET_IT(ADC_IT));
1229 /* Get the ADC IT index */
1230 itmask = ADC_IT >> 8;
1231 /* Get the ADC_IT enable bit status */
1232 enablestatus = (ADCx->CR1 & (uint8_t)ADC_IT) ;
1233 /* Check the status of the specified ADC interrupt */
1234 if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus)
1235 {
1236 /* ADC_IT is set */
1237 bitstatus = SET;
1238 }
1239 else
1240 {
1241 /* ADC_IT is reset */
1242 bitstatus = RESET;
1243 }
1244 /* Return the ADC_IT status */
1245 return bitstatus;
1246 }
1247
1248 /**
1249 * @brief Clears the ADCx's interrupt pending bits.
1250 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1251 * @param ADC_IT: specifies the ADC interrupt pending bit to clear.
1252 * This parameter can be any combination of the following values:
1253 * @arg ADC_IT_EOC: End of conversion interrupt mask
1254 * @arg ADC_IT_AWD: Analog watchdog interrupt mask
1255 * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
1256 * @retval None
1257 */
ADC_ClearITPendingBit(ADC_TypeDef * ADCx,uint16_t ADC_IT)1258 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT)
1259 {
1260 uint8_t itmask = 0;
1261 /* Check the parameters */
1262 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1263 assert_param(IS_ADC_IT(ADC_IT));
1264 /* Get the ADC IT index */
1265 itmask = (uint8_t)(ADC_IT >> 8);
1266 /* Clear the selected ADC interrupt pending bits */
1267 ADCx->SR = ~(uint32_t)itmask;
1268 }
1269
1270 /**
1271 * @}
1272 */
1273
1274 /**
1275 * @}
1276 */
1277
1278 /**
1279 * @}
1280 */
1281