1 /* Includes ------------------------------------------------------------------*/
2 #include "air32f10x_dac.h"
3 #include "air32f10x_rcc.h"
4
5 /** @defgroup DAC
6 * @brief DAC driver modules
7 * @{
8 */
9
10 /** @defgroup DAC_Private_TypesDefinitions
11 * @{
12 */
13
14 /**
15 * @}
16 */
17
18 /** @defgroup DAC_Private_Defines
19 * @{
20 */
21
22 /* CR register Mask */
23 #define CR_CLEAR_MASK ((uint32_t)0x00000FFE)
24
25 /* DAC Dual Channels SWTRIG masks */
26 #define DUAL_SWTRIG_SET ((uint32_t)0x00000003)
27 #define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC)
28
29 /* DHR registers offsets */
30 #define DHR12R1_OFFSET ((uint32_t)0x00000008)
31 #define DHR12R2_OFFSET ((uint32_t)0x00000014)
32 #define DHR12RD_OFFSET ((uint32_t)0x00000020)
33
34 /* DOR register offset */
35 #define DOR_OFFSET ((uint32_t)0x0000002C)
36 /**
37 * @}
38 */
39
40 /** @defgroup DAC_Private_Macros
41 * @{
42 */
43
44 /**
45 * @}
46 */
47
48 /** @defgroup DAC_Private_Variables
49 * @{
50 */
51
52 /**
53 * @}
54 */
55
56 /** @defgroup DAC_Private_FunctionPrototypes
57 * @{
58 */
59
60 /**
61 * @}
62 */
63
64 /** @defgroup DAC_Private_Functions
65 * @{
66 */
67
68 /**
69 * @brief Deinitializes the DAC peripheral registers to their default reset values.
70 * @param None
71 * @retval None
72 */
DAC_DeInit(void)73 void DAC_DeInit(void)
74 {
75 /* Enable DAC reset state */
76 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
77 /* Release DAC from reset state */
78 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
79 }
80
81 /**
82 * @brief Initializes the DAC peripheral according to the specified
83 * parameters in the DAC_InitStruct.
84 * @param DAC_Channel: the selected DAC channel.
85 * This parameter can be one of the following values:
86 * @arg DAC_Channel_1: DAC Channel1 selected
87 * @arg DAC_Channel_2: DAC Channel2 selected
88 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
89 * contains the configuration information for the specified DAC channel.
90 * @retval None
91 */
DAC_Init(uint32_t DAC_Channel,DAC_InitTypeDef * DAC_InitStruct)92 void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
93 {
94 uint32_t tmpreg1 = 0, tmpreg2 = 0;
95 /* Check the DAC parameters */
96 assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
97 assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
98 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
99 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
100 /*---------------------------- DAC CR Configuration --------------------------*/
101 /* Get the DAC CR value */
102 tmpreg1 = DAC->CR;
103 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
104 tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel);
105 /* Configure for the selected DAC channel: buffer output, trigger, wave generation,
106 mask/amplitude for wave generation */
107 /* Set TSELx and TENx bits according to DAC_Trigger value */
108 /* Set WAVEx bits according to DAC_WaveGeneration value */
109 /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
110 /* Set BOFFx bit according to DAC_OutputBuffer value */
111 tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
112 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
113 /* Calculate CR register value depending on DAC_Channel */
114 tmpreg1 |= tmpreg2 << DAC_Channel;
115 /* Write to DAC CR */
116 DAC->CR = tmpreg1;
117 }
118
119 /**
120 * @brief Fills each DAC_InitStruct member with its default value.
121 * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will
122 * be initialized.
123 * @retval None
124 */
DAC_StructInit(DAC_InitTypeDef * DAC_InitStruct)125 void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
126 {
127 /*--------------- Reset DAC init structure parameters values -----------------*/
128 /* Initialize the DAC_Trigger member */
129 DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
130 /* Initialize the DAC_WaveGeneration member */
131 DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
132 /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
133 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
134 /* Initialize the DAC_OutputBuffer member */
135 DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
136 }
137
138 /**
139 * @brief Enables or disables the specified DAC channel.
140 * @param DAC_Channel: the selected DAC channel.
141 * This parameter can be one of the following values:
142 * @arg DAC_Channel_1: DAC Channel1 selected
143 * @arg DAC_Channel_2: DAC Channel2 selected
144 * @param NewState: new state of the DAC channel.
145 * This parameter can be: ENABLE or DISABLE.
146 * @retval None
147 */
DAC_Cmd(uint32_t DAC_Channel,FunctionalState NewState)148 void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
149 {
150 /* Check the parameters */
151 assert_param(IS_DAC_CHANNEL(DAC_Channel));
152 assert_param(IS_FUNCTIONAL_STATE(NewState));
153 if (NewState != DISABLE)
154 {
155 /* Enable the selected DAC channel */
156 DAC->CR |= (DAC_CR_EN1 << DAC_Channel);
157 }
158 else
159 {
160 /* Disable the selected DAC channel */
161 DAC->CR &= ~(DAC_CR_EN1 << DAC_Channel);
162 }
163 }
164
165 /**
166 * @brief Enables or disables the specified DAC channel DMA request.
167 * @param DAC_Channel: the selected DAC channel.
168 * This parameter can be one of the following values:
169 * @arg DAC_Channel_1: DAC Channel1 selected
170 * @arg DAC_Channel_2: DAC Channel2 selected
171 * @param NewState: new state of the selected DAC channel DMA request.
172 * This parameter can be: ENABLE or DISABLE.
173 * @retval None
174 */
DAC_DMACmd(uint32_t DAC_Channel,FunctionalState NewState)175 void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
176 {
177 /* Check the parameters */
178 assert_param(IS_DAC_CHANNEL(DAC_Channel));
179 assert_param(IS_FUNCTIONAL_STATE(NewState));
180 if (NewState != DISABLE)
181 {
182 /* Enable the selected DAC channel DMA request */
183 DAC->CR |= (DAC_CR_DMAEN1 << DAC_Channel);
184 }
185 else
186 {
187 /* Disable the selected DAC channel DMA request */
188 DAC->CR &= ~(DAC_CR_DMAEN1 << DAC_Channel);
189 }
190 }
191
192 /**
193 * @brief Enables or disables the selected DAC channel software trigger.
194 * @param DAC_Channel: the selected DAC channel.
195 * This parameter can be one of the following values:
196 * @arg DAC_Channel_1: DAC Channel1 selected
197 * @arg DAC_Channel_2: DAC Channel2 selected
198 * @param NewState: new state of the selected DAC channel software trigger.
199 * This parameter can be: ENABLE or DISABLE.
200 * @retval None
201 */
DAC_SoftwareTriggerCmd(uint32_t DAC_Channel,FunctionalState NewState)202 void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
203 {
204 /* Check the parameters */
205 assert_param(IS_DAC_CHANNEL(DAC_Channel));
206 assert_param(IS_FUNCTIONAL_STATE(NewState));
207 if (NewState != DISABLE)
208 {
209 /* Enable software trigger for the selected DAC channel */
210 DAC->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4);
211 }
212 else
213 {
214 /* Disable software trigger for the selected DAC channel */
215 DAC->SWTRIGR &= ~((uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4));
216 }
217 }
218
219 /**
220 * @brief Enables or disables simultaneously the two DAC channels software
221 * triggers.
222 * @param NewState: new state of the DAC channels software triggers.
223 * This parameter can be: ENABLE or DISABLE.
224 * @retval None
225 */
DAC_DualSoftwareTriggerCmd(FunctionalState NewState)226 void DAC_DualSoftwareTriggerCmd(FunctionalState NewState)
227 {
228 /* Check the parameters */
229 assert_param(IS_FUNCTIONAL_STATE(NewState));
230 if (NewState != DISABLE)
231 {
232 /* Enable software trigger for both DAC channels */
233 DAC->SWTRIGR |= DUAL_SWTRIG_SET ;
234 }
235 else
236 {
237 /* Disable software trigger for both DAC channels */
238 DAC->SWTRIGR &= DUAL_SWTRIG_RESET;
239 }
240 }
241
242 /**
243 * @brief Enables or disables the selected DAC channel wave generation.
244 * @param DAC_Channel: the selected DAC channel.
245 * This parameter can be one of the following values:
246 * @arg DAC_Channel_1: DAC Channel1 selected
247 * @arg DAC_Channel_2: DAC Channel2 selected
248 * @param DAC_Wave: Specifies the wave type to enable or disable.
249 * This parameter can be one of the following values:
250 * @arg DAC_Wave_Noise: noise wave generation
251 * @arg DAC_Wave_Triangle: triangle wave generation
252 * @param NewState: new state of the selected DAC channel wave generation.
253 * This parameter can be: ENABLE or DISABLE.
254 * @retval None
255 */
DAC_WaveGenerationCmd(uint32_t DAC_Channel,uint32_t DAC_Wave,FunctionalState NewState)256 void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
257 {
258 /* Check the parameters */
259 assert_param(IS_DAC_CHANNEL(DAC_Channel));
260 assert_param(IS_DAC_WAVE(DAC_Wave));
261 assert_param(IS_FUNCTIONAL_STATE(NewState));
262 if (NewState != DISABLE)
263 {
264 /* Enable the selected wave generation for the selected DAC channel */
265 DAC->CR |= DAC_Wave << DAC_Channel;
266 }
267 else
268 {
269 /* Disable the selected wave generation for the selected DAC channel */
270 DAC->CR &= ~(DAC_Wave << DAC_Channel);
271 }
272 }
273
274 /**
275 * @brief Set the specified data holding register value for DAC channel1.
276 * @param DAC_Align: Specifies the data alignment for DAC channel1.
277 * This parameter can be one of the following values:
278 * @arg DAC_Align_8b_R: 8bit right data alignment selected
279 * @arg DAC_Align_12b_L: 12bit left data alignment selected
280 * @arg DAC_Align_12b_R: 12bit right data alignment selected
281 * @param Data : Data to be loaded in the selected data holding register.
282 * @retval None
283 */
DAC_SetChannel1Data(uint32_t DAC_Align,uint16_t Data)284 void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
285 {
286 __IO uint32_t tmp = 0;
287
288 /* Check the parameters */
289 assert_param(IS_DAC_ALIGN(DAC_Align));
290 assert_param(IS_DAC_DATA(Data));
291
292 tmp = (uint32_t)DAC_BASE;
293 tmp += DHR12R1_OFFSET + DAC_Align;
294
295 /* Set the DAC channel1 selected data holding register */
296 *(__IO uint32_t *) tmp = Data;
297 }
298
299 /**
300 * @brief Set the specified data holding register value for DAC channel2.
301 * @param DAC_Align: Specifies the data alignment for DAC channel2.
302 * This parameter can be one of the following values:
303 * @arg DAC_Align_8b_R: 8bit right data alignment selected
304 * @arg DAC_Align_12b_L: 12bit left data alignment selected
305 * @arg DAC_Align_12b_R: 12bit right data alignment selected
306 * @param Data : Data to be loaded in the selected data holding register.
307 * @retval None
308 */
DAC_SetChannel2Data(uint32_t DAC_Align,uint16_t Data)309 void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data)
310 {
311 __IO uint32_t tmp = 0;
312
313 /* Check the parameters */
314 assert_param(IS_DAC_ALIGN(DAC_Align));
315 assert_param(IS_DAC_DATA(Data));
316
317 tmp = (uint32_t)DAC_BASE;
318 tmp += DHR12R2_OFFSET + DAC_Align;
319
320 /* Set the DAC channel2 selected data holding register */
321 *(__IO uint32_t *)tmp = Data;
322 }
323
324 /**
325 * @brief Set the specified data holding register value for dual channel
326 * DAC.
327 * @param DAC_Align: Specifies the data alignment for dual channel DAC.
328 * This parameter can be one of the following values:
329 * @arg DAC_Align_8b_R: 8bit right data alignment selected
330 * @arg DAC_Align_12b_L: 12bit left data alignment selected
331 * @arg DAC_Align_12b_R: 12bit right data alignment selected
332 * @param Data2: Data for DAC Channel2 to be loaded in the selected data
333 * holding register.
334 * @param Data1: Data for DAC Channel1 to be loaded in the selected data
335 * holding register.
336 * @retval None
337 */
DAC_SetDualChannelData(uint32_t DAC_Align,uint16_t Data2,uint16_t Data1)338 void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
339 {
340 uint32_t data = 0, tmp = 0;
341
342 /* Check the parameters */
343 assert_param(IS_DAC_ALIGN(DAC_Align));
344 assert_param(IS_DAC_DATA(Data1));
345 assert_param(IS_DAC_DATA(Data2));
346
347 /* Calculate and set dual DAC data holding register value */
348 if (DAC_Align == DAC_Align_8b_R)
349 {
350 data = ((uint32_t)Data2 << 8) | Data1;
351 }
352 else
353 {
354 data = ((uint32_t)Data2 << 16) | Data1;
355 }
356
357 tmp = (uint32_t)DAC_BASE;
358 tmp += DHR12RD_OFFSET + DAC_Align;
359
360 /* Set the dual DAC selected data holding register */
361 *(__IO uint32_t *)tmp = data;
362 }
363
364 /**
365 * @brief Returns the last data output value of the selected DAC channel.
366 * @param DAC_Channel: the selected DAC channel.
367 * This parameter can be one of the following values:
368 * @arg DAC_Channel_1: DAC Channel1 selected
369 * @arg DAC_Channel_2: DAC Channel2 selected
370 * @retval The selected DAC channel data output value.
371 */
DAC_GetDataOutputValue(uint32_t DAC_Channel)372 uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
373 {
374 __IO uint32_t tmp = 0;
375
376 /* Check the parameters */
377 assert_param(IS_DAC_CHANNEL(DAC_Channel));
378
379 tmp = (uint32_t) DAC_BASE ;
380 tmp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2);
381
382 /* Returns the DAC channel data output register value */
383 return (uint16_t) (*(__IO uint32_t*) tmp);
384 }
385
386 /**
387 * @}
388 */
389
390 /**
391 * @}
392 */
393
394 /**
395 * @}
396 */
397