1 /* Includes ------------------------------------------------------------------*/
2 #include "air32f10x_sdio.h"
3 #include "air32f10x_rcc.h"
4
5
6 /** @defgroup SDIO
7 * @brief SDIO driver modules
8 * @{
9 */
10
11 /** @defgroup SDIO_Private_TypesDefinitions
12 * @{
13 */
14
15 /* ------------ SDIO registers bit address in the alias region ----------- */
16 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
17
18 /* --- CLKCR Register ---*/
19
20 /* Alias word address of CLKEN bit */
21 #define CLKCR_OFFSET (SDIO_OFFSET + 0x04)
22 #define CLKEN_BitNumber 0x08
23 #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4))
24
25 /* --- CMD Register ---*/
26
27 /* Alias word address of SDIOSUSPEND bit */
28 #define CMD_OFFSET (SDIO_OFFSET + 0x0C)
29 #define SDIOSUSPEND_BitNumber 0x0B
30 #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4))
31
32 /* Alias word address of ENCMDCOMPL bit */
33 #define ENCMDCOMPL_BitNumber 0x0C
34 #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4))
35
36 /* Alias word address of NIEN bit */
37 #define NIEN_BitNumber 0x0D
38 #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4))
39
40 /* Alias word address of ATACMD bit */
41 #define ATACMD_BitNumber 0x0E
42 #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4))
43
44 /* --- DCTRL Register ---*/
45
46 /* Alias word address of DMAEN bit */
47 #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C)
48 #define DMAEN_BitNumber 0x03
49 #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4))
50
51 /* Alias word address of RWSTART bit */
52 #define RWSTART_BitNumber 0x08
53 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4))
54
55 /* Alias word address of RWSTOP bit */
56 #define RWSTOP_BitNumber 0x09
57 #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4))
58
59 /* Alias word address of RWMOD bit */
60 #define RWMOD_BitNumber 0x0A
61 #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4))
62
63 /* Alias word address of SDIOEN bit */
64 #define SDIOEN_BitNumber 0x0B
65 #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4))
66
67 /* ---------------------- SDIO registers bit mask ------------------------ */
68
69 /* --- CLKCR Register ---*/
70
71 /* CLKCR register clear mask */
72 #define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100)
73
74 /* --- PWRCTRL Register ---*/
75
76 /* SDIO PWRCTRL Mask */
77 #define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC)
78
79 /* --- DCTRL Register ---*/
80
81 /* SDIO DCTRL Clear Mask */
82 #define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08)
83
84 /* --- CMD Register ---*/
85
86 /* CMD Register clear mask */
87 #define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800)
88
89 /* SDIO RESP Registers Address */
90 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
91
92 /**
93 * @}
94 */
95
96 /** @defgroup SDIO_Private_Defines
97 * @{
98 */
99
100 /**
101 * @}
102 */
103
104 /** @defgroup SDIO_Private_Macros
105 * @{
106 */
107
108 /**
109 * @}
110 */
111
112 /** @defgroup SDIO_Private_Variables
113 * @{
114 */
115
116 /**
117 * @}
118 */
119
120 /** @defgroup SDIO_Private_FunctionPrototypes
121 * @{
122 */
123
124 /**
125 * @}
126 */
127
128 /** @defgroup SDIO_Private_Functions
129 * @{
130 */
131
132 /**
133 * @brief Deinitializes the SDIO peripheral registers to their default reset values.
134 * @param None
135 * @retval None
136 */
SDIO_DeInit(void)137 void SDIO_DeInit(void)
138 {
139 SDIO->POWER = 0x00000000;
140 SDIO->CLKCR = 0x00000000;
141 SDIO->ARG = 0x00000000;
142 SDIO->CMD = 0x00000000;
143 SDIO->DTIMER = 0x00000000;
144 SDIO->DLEN = 0x00000000;
145 SDIO->DCTRL = 0x00000000;
146 SDIO->ICR = 0x00C007FF;
147 SDIO->MASK = 0x00000000;
148 }
149
150 /**
151 * @brief Initializes the SDIO peripheral according to the specified
152 * parameters in the SDIO_InitStruct.
153 * @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure
154 * that contains the configuration information for the SDIO peripheral.
155 * @retval None
156 */
SDIO_Init(SDIO_InitTypeDef * SDIO_InitStruct)157 void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct)
158 {
159 uint32_t tmpreg = 0;
160
161 /* Check the parameters */
162 assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge));
163 assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass));
164 assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave));
165 assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide));
166 assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl));
167
168 /*---------------------------- SDIO CLKCR Configuration ------------------------*/
169 /* Get the SDIO CLKCR value */
170 tmpreg = SDIO->CLKCR;
171
172 /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */
173 tmpreg &= CLKCR_CLEAR_MASK;
174
175 /* Set CLKDIV bits according to SDIO_ClockDiv value */
176 /* Set PWRSAV bit according to SDIO_ClockPowerSave value */
177 /* Set BYPASS bit according to SDIO_ClockBypass value */
178 /* Set WIDBUS bits according to SDIO_BusWide value */
179 /* Set NEGEDGE bits according to SDIO_ClockEdge value */
180 /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */
181 tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave |
182 SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide |
183 SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl);
184
185 /* Write to SDIO CLKCR */
186 SDIO->CLKCR = tmpreg;
187 }
188
189 /**
190 * @brief Fills each SDIO_InitStruct member with its default value.
191 * @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which
192 * will be initialized.
193 * @retval None
194 */
SDIO_StructInit(SDIO_InitTypeDef * SDIO_InitStruct)195 void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct)
196 {
197 /* SDIO_InitStruct members default value */
198 SDIO_InitStruct->SDIO_ClockDiv = 0x00;
199 SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising;
200 SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable;
201 SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
202 SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b;
203 SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
204 }
205
206 /**
207 * @brief Enables or disables the SDIO Clock.
208 * @param NewState: new state of the SDIO Clock. This parameter can be: ENABLE or DISABLE.
209 * @retval None
210 */
SDIO_ClockCmd(FunctionalState NewState)211 void SDIO_ClockCmd(FunctionalState NewState)
212 {
213 /* Check the parameters */
214 assert_param(IS_FUNCTIONAL_STATE(NewState));
215
216 *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState;
217 }
218
219 /**
220 * @brief Sets the power status of the controller.
221 * @param SDIO_PowerState: new state of the Power state.
222 * This parameter can be one of the following values:
223 * @arg SDIO_PowerState_OFF
224 * @arg SDIO_PowerState_ON
225 * @retval None
226 */
SDIO_SetPowerState(uint32_t SDIO_PowerState)227 void SDIO_SetPowerState(uint32_t SDIO_PowerState)
228 {
229 /* Check the parameters */
230 assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState));
231
232 SDIO->POWER &= PWR_PWRCTRL_MASK;
233 SDIO->POWER |= SDIO_PowerState;
234 }
235
236 /**
237 * @brief Gets the power status of the controller.
238 * @param None
239 * @retval Power status of the controller. The returned value can
240 * be one of the following:
241 * - 0x00: Power OFF
242 * - 0x02: Power UP
243 * - 0x03: Power ON
244 */
SDIO_GetPowerState(void)245 uint32_t SDIO_GetPowerState(void)
246 {
247 return (SDIO->POWER & (~PWR_PWRCTRL_MASK));
248 }
249
250 /**
251 * @brief Enables or disables the SDIO interrupts.
252 * @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled.
253 * This parameter can be one or a combination of the following values:
254 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
255 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
256 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
257 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
258 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
259 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
260 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
261 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
262 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
263 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
264 * bus mode interrupt
265 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
266 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
267 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
268 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
269 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
270 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
271 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
272 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
273 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
274 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
275 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
276 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
277 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
278 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
279 * @param NewState: new state of the specified SDIO interrupts.
280 * This parameter can be: ENABLE or DISABLE.
281 * @retval None
282 */
SDIO_ITConfig(uint32_t SDIO_IT,FunctionalState NewState)283 void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState)
284 {
285 /* Check the parameters */
286 assert_param(IS_SDIO_IT(SDIO_IT));
287 assert_param(IS_FUNCTIONAL_STATE(NewState));
288
289 if (NewState != DISABLE)
290 {
291 /* Enable the SDIO interrupts */
292 SDIO->MASK |= SDIO_IT;
293 }
294 else
295 {
296 /* Disable the SDIO interrupts */
297 SDIO->MASK &= ~SDIO_IT;
298 }
299 }
300
301 /**
302 * @brief Enables or disables the SDIO DMA request.
303 * @param NewState: new state of the selected SDIO DMA request.
304 * This parameter can be: ENABLE or DISABLE.
305 * @retval None
306 */
SDIO_DMACmd(FunctionalState NewState)307 void SDIO_DMACmd(FunctionalState NewState)
308 {
309 /* Check the parameters */
310 assert_param(IS_FUNCTIONAL_STATE(NewState));
311
312 *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState;
313 }
314
315 /**
316 * @brief Initializes the SDIO Command according to the specified
317 * parameters in the SDIO_CmdInitStruct and send the command.
318 * @param SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef
319 * structure that contains the configuration information for the SDIO command.
320 * @retval None
321 */
SDIO_SendCommand(SDIO_CmdInitTypeDef * SDIO_CmdInitStruct)322 void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
323 {
324 uint32_t tmpreg = 0;
325
326 /* Check the parameters */
327 assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex));
328 assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response));
329 assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait));
330 assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM));
331
332 /*---------------------------- SDIO ARG Configuration ------------------------*/
333 /* Set the SDIO Argument value */
334 SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument;
335
336 /*---------------------------- SDIO CMD Configuration ------------------------*/
337 /* Get the SDIO CMD value */
338 tmpreg = SDIO->CMD;
339 /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */
340 tmpreg &= CMD_CLEAR_MASK;
341 /* Set CMDINDEX bits according to SDIO_CmdIndex value */
342 /* Set WAITRESP bits according to SDIO_Response value */
343 /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */
344 /* Set CPSMEN bits according to SDIO_CPSM value */
345 tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response
346 | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM;
347
348 /* Write to SDIO CMD */
349 SDIO->CMD = tmpreg;
350 }
351
352 /**
353 * @brief Fills each SDIO_CmdInitStruct member with its default value.
354 * @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef
355 * structure which will be initialized.
356 * @retval None
357 */
SDIO_CmdStructInit(SDIO_CmdInitTypeDef * SDIO_CmdInitStruct)358 void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct)
359 {
360 /* SDIO_CmdInitStruct members default value */
361 SDIO_CmdInitStruct->SDIO_Argument = 0x00;
362 SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00;
363 SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No;
364 SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No;
365 SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable;
366 }
367
368 /**
369 * @brief Returns command index of last command for which response received.
370 * @param None
371 * @retval Returns the command index of the last command response received.
372 */
SDIO_GetCommandResponse(void)373 uint8_t SDIO_GetCommandResponse(void)
374 {
375 return (uint8_t)(SDIO->RESPCMD);
376 }
377
378 /**
379 * @brief Returns response received from the card for the last command.
380 * @param SDIO_RESP: Specifies the SDIO response register.
381 * This parameter can be one of the following values:
382 * @arg SDIO_RESP1: Response Register 1
383 * @arg SDIO_RESP2: Response Register 2
384 * @arg SDIO_RESP3: Response Register 3
385 * @arg SDIO_RESP4: Response Register 4
386 * @retval The Corresponding response register value.
387 */
SDIO_GetResponse(uint32_t SDIO_RESP)388 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
389 {
390 __IO uint32_t tmp = 0;
391
392 /* Check the parameters */
393 assert_param(IS_SDIO_RESP(SDIO_RESP));
394
395 tmp = SDIO_RESP_ADDR + SDIO_RESP;
396
397 return (*(__IO uint32_t *) tmp);
398 }
399
400 /**
401 * @brief Initializes the SDIO data path according to the specified
402 * parameters in the SDIO_DataInitStruct.
403 * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that
404 * contains the configuration information for the SDIO command.
405 * @retval None
406 */
SDIO_DataConfig(SDIO_DataInitTypeDef * SDIO_DataInitStruct)407 void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
408 {
409 uint32_t tmpreg = 0;
410
411 /* Check the parameters */
412 assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength));
413 assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize));
414 assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir));
415 assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode));
416 assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM));
417
418 /*---------------------------- SDIO DTIMER Configuration ---------------------*/
419 /* Set the SDIO Data TimeOut value */
420 SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut;
421
422 /*---------------------------- SDIO DLEN Configuration -----------------------*/
423 /* Set the SDIO DataLength value */
424 SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength;
425
426 /*---------------------------- SDIO DCTRL Configuration ----------------------*/
427 /* Get the SDIO DCTRL value */
428 tmpreg = SDIO->DCTRL;
429 /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */
430 tmpreg &= DCTRL_CLEAR_MASK;
431 /* Set DEN bit according to SDIO_DPSM value */
432 /* Set DTMODE bit according to SDIO_TransferMode value */
433 /* Set DTDIR bit according to SDIO_TransferDir value */
434 /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */
435 tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir
436 | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM;
437
438 /* Write to SDIO DCTRL */
439 SDIO->DCTRL = tmpreg;
440 }
441
442 /**
443 * @brief Fills each SDIO_DataInitStruct member with its default value.
444 * @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which
445 * will be initialized.
446 * @retval None
447 */
SDIO_DataStructInit(SDIO_DataInitTypeDef * SDIO_DataInitStruct)448 void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
449 {
450 /* SDIO_DataInitStruct members default value */
451 SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF;
452 SDIO_DataInitStruct->SDIO_DataLength = 0x00;
453 SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b;
454 SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard;
455 SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block;
456 SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable;
457 }
458
459 /**
460 * @brief Returns number of remaining data bytes to be transferred.
461 * @param None
462 * @retval Number of remaining data bytes to be transferred
463 */
SDIO_GetDataCounter(void)464 uint32_t SDIO_GetDataCounter(void)
465 {
466 return SDIO->DCOUNT;
467 }
468
469 /**
470 * @brief Read one data word from Rx FIFO.
471 * @param None
472 * @retval Data received
473 */
SDIO_ReadData(void)474 uint32_t SDIO_ReadData(void)
475 {
476 return SDIO->FIFO;
477 }
478
479 /**
480 * @brief Write one data word to Tx FIFO.
481 * @param Data: 32-bit data word to write.
482 * @retval None
483 */
SDIO_WriteData(uint32_t Data)484 void SDIO_WriteData(uint32_t Data)
485 {
486 SDIO->FIFO = Data;
487 }
488
489 /**
490 * @brief Returns the number of words left to be written to or read from FIFO.
491 * @param None
492 * @retval Remaining number of words.
493 */
SDIO_GetFIFOCount(void)494 uint32_t SDIO_GetFIFOCount(void)
495 {
496 return SDIO->FIFOCNT;
497 }
498
499 /**
500 * @brief Starts the SD I/O Read Wait operation.
501 * @param NewState: new state of the Start SDIO Read Wait operation.
502 * This parameter can be: ENABLE or DISABLE.
503 * @retval None
504 */
SDIO_StartSDIOReadWait(FunctionalState NewState)505 void SDIO_StartSDIOReadWait(FunctionalState NewState)
506 {
507 /* Check the parameters */
508 assert_param(IS_FUNCTIONAL_STATE(NewState));
509
510 *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState;
511 }
512
513 /**
514 * @brief Stops the SD I/O Read Wait operation.
515 * @param NewState: new state of the Stop SDIO Read Wait operation.
516 * This parameter can be: ENABLE or DISABLE.
517 * @retval None
518 */
SDIO_StopSDIOReadWait(FunctionalState NewState)519 void SDIO_StopSDIOReadWait(FunctionalState NewState)
520 {
521 /* Check the parameters */
522 assert_param(IS_FUNCTIONAL_STATE(NewState));
523
524 *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState;
525 }
526
527 /**
528 * @brief Sets one of the two options of inserting read wait interval.
529 * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode.
530 * This parameter can be:
531 * @arg SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK
532 * @arg SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2
533 * @retval None
534 */
SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)535 void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
536 {
537 /* Check the parameters */
538 assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
539
540 *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
541 }
542
543 /**
544 * @brief Enables or disables the SD I/O Mode Operation.
545 * @param NewState: new state of SDIO specific operation.
546 * This parameter can be: ENABLE or DISABLE.
547 * @retval None
548 */
SDIO_SetSDIOOperation(FunctionalState NewState)549 void SDIO_SetSDIOOperation(FunctionalState NewState)
550 {
551 /* Check the parameters */
552 assert_param(IS_FUNCTIONAL_STATE(NewState));
553
554 *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState;
555 }
556
557 /**
558 * @brief Enables or disables the SD I/O Mode suspend command sending.
559 * @param NewState: new state of the SD I/O Mode suspend command.
560 * This parameter can be: ENABLE or DISABLE.
561 * @retval None
562 */
SDIO_SendSDIOSuspendCmd(FunctionalState NewState)563 void SDIO_SendSDIOSuspendCmd(FunctionalState NewState)
564 {
565 /* Check the parameters */
566 assert_param(IS_FUNCTIONAL_STATE(NewState));
567
568 *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState;
569 }
570
571 /**
572 * @brief Enables or disables the command completion signal.
573 * @param NewState: new state of command completion signal.
574 * This parameter can be: ENABLE or DISABLE.
575 * @retval None
576 */
SDIO_CommandCompletionCmd(FunctionalState NewState)577 void SDIO_CommandCompletionCmd(FunctionalState NewState)
578 {
579 /* Check the parameters */
580 assert_param(IS_FUNCTIONAL_STATE(NewState));
581
582 *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState;
583 }
584
585 /**
586 * @brief Enables or disables the CE-ATA interrupt.
587 * @param NewState: new state of CE-ATA interrupt. This parameter can be: ENABLE or DISABLE.
588 * @retval None
589 */
SDIO_CEATAITCmd(FunctionalState NewState)590 void SDIO_CEATAITCmd(FunctionalState NewState)
591 {
592 /* Check the parameters */
593 assert_param(IS_FUNCTIONAL_STATE(NewState));
594
595 *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1));
596 }
597
598 /**
599 * @brief Sends CE-ATA command (CMD61).
600 * @param NewState: new state of CE-ATA command. This parameter can be: ENABLE or DISABLE.
601 * @retval None
602 */
SDIO_SendCEATACmd(FunctionalState NewState)603 void SDIO_SendCEATACmd(FunctionalState NewState)
604 {
605 /* Check the parameters */
606 assert_param(IS_FUNCTIONAL_STATE(NewState));
607
608 *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState;
609 }
610
611 /**
612 * @brief Checks whether the specified SDIO flag is set or not.
613 * @param SDIO_FLAG: specifies the flag to check.
614 * This parameter can be one of the following values:
615 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
616 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
617 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
618 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
619 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
620 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
621 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
622 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
623 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
624 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide
625 * bus mode.
626 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
627 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
628 * @arg SDIO_FLAG_TXACT: Data transmit in progress
629 * @arg SDIO_FLAG_RXACT: Data receive in progress
630 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
631 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
632 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
633 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
634 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
635 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
636 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
637 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
638 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
639 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
640 * @retval The new state of SDIO_FLAG (SET or RESET).
641 */
SDIO_GetFlagStatus(uint32_t SDIO_FLAG)642 FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG)
643 {
644 FlagStatus bitstatus = RESET;
645
646 /* Check the parameters */
647 assert_param(IS_SDIO_FLAG(SDIO_FLAG));
648
649 if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET)
650 {
651 bitstatus = SET;
652 }
653 else
654 {
655 bitstatus = RESET;
656 }
657 return bitstatus;
658 }
659
660 /**
661 * @brief Clears the SDIO's pending flags.
662 * @param SDIO_FLAG: specifies the flag to clear.
663 * This parameter can be one or a combination of the following values:
664 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
665 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
666 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
667 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
668 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
669 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
670 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
671 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
672 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
673 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide
674 * bus mode
675 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
676 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
677 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
678 * @retval None
679 */
SDIO_ClearFlag(uint32_t SDIO_FLAG)680 void SDIO_ClearFlag(uint32_t SDIO_FLAG)
681 {
682 /* Check the parameters */
683 assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG));
684
685 SDIO->ICR = SDIO_FLAG;
686 }
687
688 /**
689 * @brief Checks whether the specified SDIO interrupt has occurred or not.
690 * @param SDIO_IT: specifies the SDIO interrupt source to check.
691 * This parameter can be one of the following values:
692 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
693 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
694 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
695 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
696 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
697 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
698 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
699 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
700 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
701 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
702 * bus mode interrupt
703 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
704 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
705 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
706 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
707 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
708 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
709 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
710 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
711 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
712 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
713 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
714 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
715 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
716 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
717 * @retval The new state of SDIO_IT (SET or RESET).
718 */
SDIO_GetITStatus(uint32_t SDIO_IT)719 ITStatus SDIO_GetITStatus(uint32_t SDIO_IT)
720 {
721 ITStatus bitstatus = RESET;
722
723 /* Check the parameters */
724 assert_param(IS_SDIO_GET_IT(SDIO_IT));
725 if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET)
726 {
727 bitstatus = SET;
728 }
729 else
730 {
731 bitstatus = RESET;
732 }
733 return bitstatus;
734 }
735
736 /**
737 * @brief Clears the SDIO's interrupt pending bits.
738 * @param SDIO_IT: specifies the interrupt pending bit to clear.
739 * This parameter can be one or a combination of the following values:
740 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
741 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
742 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
743 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
744 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
745 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
746 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
747 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
748 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
749 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
750 * bus mode interrupt
751 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
752 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
753 * @retval None
754 */
SDIO_ClearITPendingBit(uint32_t SDIO_IT)755 void SDIO_ClearITPendingBit(uint32_t SDIO_IT)
756 {
757 /* Check the parameters */
758 assert_param(IS_SDIO_CLEAR_IT(SDIO_IT));
759
760 SDIO->ICR = SDIO_IT;
761 }
762
763 /**
764 * @}
765 */
766
767 /**
768 * @}
769 */
770
771 /**
772 * @}
773 */
774
775 /******************* (C) COPYRIGHT 2011 LuatOS *****END OF FILE****/
776