1 /*
2 * drivers/video/fbdev/sunxi/disp2/disp/lcd/to20t20000/to20t20000.c
3 *
4 * Copyright (c) 2007-2018 Allwinnertech Co., Ltd.
5 * Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17 #include "to20t20000.h"
18
19 #define CPU_TRI_MODE
20
21 static void lcd_panel_to20t20000_init(struct disp_panel_para *info);
22 static void lcd_cpu_panel_fr(__u32 sel, __u32 w, __u32 h, __u32 x, __u32 y);
23 static void LCD_power_on(u32 sel);
24 static void LCD_power_off(u32 sel);
25 static void LCD_bl_open(u32 sel);
26 static void LCD_bl_close(u32 sel);
27
28 static void LCD_panel_init(u32 sel);
29 static void LCD_panel_exit(u32 sel);
30
31 extern s32 tcon0_cpu_set_tri_mode(u32 sel);
32
LCD_cfg_panel_info(struct panel_extend_para * info)33 static void LCD_cfg_panel_info(struct panel_extend_para *info)
34 {
35 u32 i = 0, j = 0;
36 u32 items;
37 u8 lcd_gamma_tbl[][2] = {
38 //{input value, corrected value}
39 {0, 0}, {15, 15}, {30, 30}, {45, 45}, {60, 60},
40 {75, 75}, {90, 90}, {105, 105}, {120, 120}, {135, 135},
41 {150, 150}, {165, 165}, {180, 180}, {195, 195}, {210, 210},
42 {225, 225}, {240, 240}, {255, 255},
43 };
44
45 u32 lcd_cmap_tbl[2][3][4] = {
46 {
47 {LCD_CMAP_G0, LCD_CMAP_B1, LCD_CMAP_G2, LCD_CMAP_B3},
48 {LCD_CMAP_B0, LCD_CMAP_R1, LCD_CMAP_B2, LCD_CMAP_R3},
49 {LCD_CMAP_R0, LCD_CMAP_G1, LCD_CMAP_R2, LCD_CMAP_G3},
50 },
51 {
52 {LCD_CMAP_B3, LCD_CMAP_G2, LCD_CMAP_B1, LCD_CMAP_G0},
53 {LCD_CMAP_R3, LCD_CMAP_B2, LCD_CMAP_R1, LCD_CMAP_B0},
54 {LCD_CMAP_G3, LCD_CMAP_R2, LCD_CMAP_G1, LCD_CMAP_R0},
55 },
56 };
57
58 items = sizeof(lcd_gamma_tbl) / 2;
59 for (i = 0; i < items - 1; i++) {
60 u32 num = lcd_gamma_tbl[i + 1][0] - lcd_gamma_tbl[i][0];
61
62 for (j = 0; j < num; j++) {
63 u32 value = 0;
64
65 value =
66 lcd_gamma_tbl[i][1] +
67 ((lcd_gamma_tbl[i + 1][1] - lcd_gamma_tbl[i][1]) *
68 j) /
69 num;
70 info->lcd_gamma_tbl[lcd_gamma_tbl[i][0] + j] =
71 (value << 16) + (value << 8) + value;
72 }
73 }
74 info->lcd_gamma_tbl[255] = (lcd_gamma_tbl[items - 1][1] << 16) +
75 (lcd_gamma_tbl[items - 1][1] << 8) +
76 lcd_gamma_tbl[items - 1][1];
77
78 memcpy(info->lcd_cmap_tbl, lcd_cmap_tbl, sizeof(lcd_cmap_tbl));
79 }
80
LCD_open_flow(u32 sel)81 static s32 LCD_open_flow(u32 sel)
82 {
83 LCD_OPEN_FUNC(sel, LCD_power_on, 40);
84 #ifdef CPU_TRI_MODE
85 LCD_OPEN_FUNC(sel, LCD_panel_init, 50);
86 LCD_OPEN_FUNC(sel, sunxi_lcd_tcon_enable, 50);
87 #else
88 LCD_OPEN_FUNC(sel, sunxi_lcd_tcon_enable, 50);
89 LCD_OPEN_FUNC(sel, LCD_panel_init, 50);
90 #endif
91 LCD_OPEN_FUNC(sel, LCD_bl_open, 0);
92
93 return 0;
94 }
95
LCD_close_flow(u32 sel)96 static s32 LCD_close_flow(u32 sel)
97 {
98 LCD_CLOSE_FUNC(sel, LCD_bl_close, 50);
99 #ifdef CPU_TRI_MODE
100 LCD_CLOSE_FUNC(sel, sunxi_lcd_tcon_disable, 10);
101 LCD_CLOSE_FUNC(sel, LCD_panel_exit, 10);
102 #else
103 LCD_CLOSE_FUNC(sel, LCD_panel_exit, 10);
104 LCD_CLOSE_FUNC(sel, sunxi_lcd_tcon_disable, 10);
105 #endif
106 LCD_CLOSE_FUNC(sel, LCD_power_off, 10);
107
108 return 0;
109 }
110
LCD_power_on(u32 sel)111 static void LCD_power_on(u32 sel)
112 {
113 sunxi_lcd_power_enable(sel,
114 0); // config lcd_power pin to open lcd power0
115 sunxi_lcd_pin_cfg(sel, 1);
116 }
117
LCD_power_off(u32 sel)118 static void LCD_power_off(u32 sel)
119 {
120 sunxi_lcd_pin_cfg(sel, 0);
121 sunxi_lcd_power_disable(sel,
122 0); // config lcd_power pin to close lcd power0
123 }
124
LCD_bl_open(u32 sel)125 static void LCD_bl_open(u32 sel)
126 {
127 sunxi_lcd_pwm_enable(sel);
128 sunxi_lcd_backlight_enable(
129 sel); // config lcd_bl_en pin to open lcd backlight
130 }
131
LCD_bl_close(u32 sel)132 static void LCD_bl_close(u32 sel)
133 {
134 sunxi_lcd_backlight_disable(
135 sel); // config lcd_bl_en pin to close lcd backlight
136 sunxi_lcd_pwm_disable(sel);
137 }
138
LCD_panel_init(u32 sel)139 static void LCD_panel_init(u32 sel)
140 {
141 struct disp_panel_para *info =
142 disp_sys_malloc(sizeof(struct disp_panel_para));
143
144 bsp_disp_get_panel_info(sel, info);
145 lcd_panel_to20t20000_init(info);
146
147 if (LCD_CPU_AUTO_MODE == info->lcd_cpu_mode)
148 sunxi_lcd_cpu_set_auto_mode(sel);
149
150 disp_sys_free(info);
151 return;
152 }
153
LCD_panel_exit(u32 sel)154 static void LCD_panel_exit(u32 sel)
155 {
156 struct disp_panel_para *info =
157 disp_sys_malloc(sizeof(struct disp_panel_para));
158
159 pr_info("%s: enter sleep\n", __func__);
160 sunxi_lcd_cpu_write_index(0, 0x28);
161 sunxi_lcd_cpu_write_index(0, 0x10);
162 sunxi_lcd_delay_ms(300);
163
164 bsp_disp_get_panel_info(sel, info);
165 disp_sys_free(info);
166 return;
167 }
168
lcd_dbi_wr_dcs(__u32 sel,__u8 cmd,__u8 * para,__u32 para_num)169 static void lcd_dbi_wr_dcs(__u32 sel, __u8 cmd, __u8 *para, __u32 para_num)
170 {
171 __u8 index = cmd;
172 __u8 *data_p = para;
173 __u16 i;
174 sunxi_lcd_cpu_write_index(sel, index);
175 for (i = 0; i < para_num; i++) {
176 sunxi_lcd_cpu_write_data(sel, *(data_p++));
177 }
178 }
179
lcd_cpu_panel_fr(__u32 sel,__u32 w,__u32 h,__u32 x,__u32 y)180 static void lcd_cpu_panel_fr(__u32 sel, __u32 w, __u32 h, __u32 x, __u32 y)
181 {
182 __u8 para[4];
183 __u32 para_num;
184 para[0] = (x >> 8) & 0xff;
185 para[1] = (x >> 0) & 0xff;
186 para[2] = ((x + w - 1) >> 8) & 0xff;
187 para[3] = ((x + w - 1) >> 0) & 0xff;
188 para_num = 4;
189 lcd_dbi_wr_dcs(sel, DSI_DCS_SET_COLUMN_ADDRESS, para, para_num);
190
191 para[0] = (y >> 8) & 0xff;
192 para[1] = (y >> 0) & 0xff;
193 para[2] = ((y + h - 1) >> 8) & 0xff;
194 para[3] = ((y + h - 1) >> 0) & 0xff;
195 para_num = 4;
196 lcd_dbi_wr_dcs(sel, DSI_DCS_SET_PAGE_ADDRESS, para, para_num);
197
198 para_num = 0;
199 lcd_dbi_wr_dcs(sel, DSI_DCS_WRITE_MEMORY_START, para, para_num);
200 }
201
202 static int lcd_dismode, lcd_x, lcd_y;
203
lcd_rotation_to20t20000(int mode)204 void lcd_rotation_to20t20000(int mode)
205 {
206 lcd_dismode = mode;
207 }
208
lcd_panel_to20t20000_init(struct disp_panel_para * info)209 static void lcd_panel_to20t20000_init(struct disp_panel_para *info)
210 {
211 /* hardware reset */
212 sunxi_lcd_gpio_set_value(0, 0, 1);
213 sunxi_lcd_delay_ms(10);
214 sunxi_lcd_gpio_set_value(0, 0, 0);
215 sunxi_lcd_delay_ms(40);
216 sunxi_lcd_gpio_set_value(0, 0, 1);
217
218 sunxi_lcd_delay_ms(50); /* wait for io stable */
219 sunxi_lcd_gpio_set_value(0, 1, 0);
220
221 sunxi_lcd_cpu_write_index(0, 0x11); /* sleep out */
222 sunxi_lcd_delay_ms(120);
223 sunxi_lcd_cpu_write_index(0, 0xCF);
224 sunxi_lcd_cpu_write_data(0, 0x00);
225 sunxi_lcd_cpu_write_data(0, 0xAA);
226 sunxi_lcd_cpu_write_data(0, 0xE0);
227 sunxi_lcd_delay_ms(5);
228 sunxi_lcd_cpu_write_index(0, 0xED);
229 sunxi_lcd_cpu_write_data(0, 0x67);
230 sunxi_lcd_cpu_write_data(0, 0x03);
231 sunxi_lcd_cpu_write_data(0, 0x12);
232 sunxi_lcd_cpu_write_data(0, 0x81);
233 sunxi_lcd_delay_ms(5);
234 sunxi_lcd_cpu_write_index(0, 0xE8);
235 sunxi_lcd_cpu_write_data(0, 0x85);
236 sunxi_lcd_cpu_write_data(0, 0x11);
237 sunxi_lcd_cpu_write_data(0, 0x78);
238 sunxi_lcd_delay_ms(5);
239
240 sunxi_lcd_cpu_write_index(0, 0xCB);
241 sunxi_lcd_cpu_write_data(0, 0x39);
242 sunxi_lcd_cpu_write_data(0, 0x2C);
243 sunxi_lcd_cpu_write_data(0, 0x00);
244 sunxi_lcd_cpu_write_data(0, 0x34);
245 sunxi_lcd_cpu_write_data(0, 0x02);
246 sunxi_lcd_delay_ms(5);
247 sunxi_lcd_cpu_write_index(0, 0xF7);
248 sunxi_lcd_cpu_write_data(0, 0x20);
249 sunxi_lcd_delay_ms(5);
250
251 sunxi_lcd_cpu_write_index(0, 0xEA);
252 sunxi_lcd_cpu_write_data(0, 0x00);
253 sunxi_lcd_delay_ms(5);
254 sunxi_lcd_cpu_write_index(0, 0xC0); // Power control
255 sunxi_lcd_cpu_write_data(0, 0x21); // VRH[5:0]
256 sunxi_lcd_delay_ms(5);
257 sunxi_lcd_cpu_write_index(0, 0xC1); // Power control
258 sunxi_lcd_cpu_write_data(0, 0x01); // SAP[2:0];BT[3:0]
259 sunxi_lcd_delay_ms(5);
260 sunxi_lcd_cpu_write_index(0, 0xC5); // VCM control
261 sunxi_lcd_cpu_write_data(0, 0x24); // VMH 0x2a //0x24 max:0x7f
262 sunxi_lcd_cpu_write_data(0, 0x2c); // VML 0x2f //0x2C max:0x64
263 sunxi_lcd_delay_ms(5);
264 sunxi_lcd_cpu_write_index(0, 0xC7); // VCM control2
265 sunxi_lcd_cpu_write_data(0, 0xB6); // 0xB8 //0xB6 //0xBA
266 sunxi_lcd_delay_ms(5);
267
268 sunxi_lcd_cpu_write_index(0, 0x36); // Memory Access Control
269 sunxi_lcd_cpu_write_data(0, 0xd8);
270 sunxi_lcd_delay_ms(5);
271
272 sunxi_lcd_cpu_write_index(0, 0x3A);
273 sunxi_lcd_cpu_write_data(0, 0x55);
274 sunxi_lcd_delay_ms(5);
275
276 sunxi_lcd_cpu_write_index(0, 0xF2); // 3Gamma Function Disable
277 sunxi_lcd_cpu_write_data(0, 0x00);
278 sunxi_lcd_delay_ms(5);
279 sunxi_lcd_cpu_write_index(0, 0x26); // Gamma curve selected
280 sunxi_lcd_cpu_write_data(0, 0x01);
281 sunxi_lcd_delay_ms(5);
282 sunxi_lcd_cpu_write_index(0, 0xE0); // Set Gamma
283 sunxi_lcd_cpu_write_data(0, 0x0F);
284 sunxi_lcd_cpu_write_data(0, 0x27);
285 sunxi_lcd_cpu_write_data(0, 0x23);
286 sunxi_lcd_cpu_write_data(0, 0x0B);
287 sunxi_lcd_cpu_write_data(0, 0x0F);
288 sunxi_lcd_cpu_write_data(0, 0x05);
289 sunxi_lcd_cpu_write_data(0, 0x50);
290 sunxi_lcd_cpu_write_data(0, 0x86);
291 sunxi_lcd_cpu_write_data(0, 0x41);
292 sunxi_lcd_cpu_write_data(0, 0x0E);
293 sunxi_lcd_cpu_write_data(0, 0x1B);
294 sunxi_lcd_cpu_write_data(0, 0x35);
295 sunxi_lcd_cpu_write_data(0, 0x00);
296 sunxi_lcd_cpu_write_data(0, 0x00);
297 sunxi_lcd_cpu_write_data(0, 0x00);
298 sunxi_lcd_delay_ms(5);
299 sunxi_lcd_cpu_write_index(0, 0xE1); // Set Gamma
300 sunxi_lcd_cpu_write_data(0, 0x00);
301 sunxi_lcd_cpu_write_data(0, 0x1A);
302 sunxi_lcd_cpu_write_data(0, 0x1E);
303 sunxi_lcd_cpu_write_data(0, 0x03);
304 sunxi_lcd_cpu_write_data(0, 0x0F);
305 sunxi_lcd_cpu_write_data(0, 0x05);
306 sunxi_lcd_cpu_write_data(0, 0x2E);
307 sunxi_lcd_cpu_write_data(0, 0x25);
308 sunxi_lcd_cpu_write_data(0, 0x3E);
309 sunxi_lcd_cpu_write_data(0, 0x01);
310 sunxi_lcd_cpu_write_data(0, 0x04);
311 sunxi_lcd_cpu_write_data(0, 0x0A);
312 sunxi_lcd_cpu_write_data(0, 0x3F);
313 sunxi_lcd_cpu_write_data(0, 0x3F);
314 sunxi_lcd_cpu_write_data(0, 0x0F);
315 sunxi_lcd_delay_ms(5);
316
317 #if defined(CPU_TRI_MODE)
318 /* enable te, mode 0 */
319 sunxi_lcd_cpu_write_index(0, 0x35);
320 sunxi_lcd_cpu_write_data(0, 0x00);
321
322 /* Tear_Scanline */
323 sunxi_lcd_cpu_write_index(0, 0x44);
324 sunxi_lcd_cpu_write_data(0, 0x00);
325 sunxi_lcd_cpu_write_data(0, 0x80);
326 #endif
327
328 sunxi_lcd_cpu_write_index(0, 0x29); // Display on
329 sunxi_lcd_delay_ms(50);
330
331 lcd_cpu_panel_fr(0, info->lcd_x, info->lcd_y, 0, 0);
332 lcd_x = info->lcd_x;
333 lcd_y = info->lcd_y;
334 }
335
336 // sel: 0:lcd0; 1:lcd1
LCD_user_defined_func(u32 sel,u32 para1,u32 para2,u32 para3)337 static s32 LCD_user_defined_func(u32 sel, u32 para1, u32 para2, u32 para3)
338 {
339 return 0;
340 }
341
342 struct __lcd_panel to20t20000_panel = {
343 /* panel driver name, must mach the name of lcd_drv_name in sys_config.fex */
344 .name = "to20t20000",
345 .func = {
346 .cfg_panel_info = LCD_cfg_panel_info,
347 .cfg_open_flow = LCD_open_flow,
348 .cfg_close_flow = LCD_close_flow,
349 .lcd_user_defined_func = LCD_user_defined_func,
350 //.reinit = lcd_reflush_to20t20000,
351 },
352 };
353
354
355