1 /* 2 * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. 3 * 4 * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in 5 * the the People's Republic of China and other countries. 6 * All Allwinner Technology Co.,Ltd. trademarks are used with permission. 7 * 8 * DISCLAIMER 9 * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. 10 * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) 11 * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN 12 * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. 13 * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS 14 * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. 15 * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. 16 * 17 * 18 * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT 19 * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, 20 * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING 21 * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE 22 * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. 23 * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 26 * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 30 * OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef __PLATFORM_GPIO_H__ 34 #define __PLATFORM_GPIO_H__ 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 #define GPIO_MAX_BANK PL_BASE 41 #define BANK_BOUNDARY PL_BASE 42 #define SUNXI_GPIO_PBASE 0x0300B000 43 44 /* sunxi gpio irq*/ 45 #define SUNXI_GIC_START 32 46 #define SUNXI_IRQ_GPIOB (SUNXI_GIC_START + 43) /* 75 gpiob interrupt */ 47 #define SUNXI_IRQ_GPIOE (SUNXI_GIC_START + 44) /* 76 gpioe interrupt */ 48 #define SUNXI_IRQ_GPIOG (SUNXI_GIC_START + 46) /* 78 gpiog interrupt */ 49 #define SUNXI_IRQ_GPIOH (SUNXI_GIC_START + 47) /* 79 gpioh interrupt */ 50 51 typedef enum 52 { 53 GPIO_PB0 = GPIOB(0), 54 GPIO_PB1 = GPIOB(1), 55 GPIO_PB2 = GPIOB(2), 56 GPIO_PB3 = GPIOB(3), 57 GPIO_PB4 = GPIOB(4), 58 GPIO_PB5 = GPIOB(5), 59 GPIO_PB6 = GPIOB(6), 60 GPIO_PB7 = GPIOB(7), 61 GPIO_PB8 = GPIOB(8), 62 GPIO_PB9 = GPIOB(9), 63 GPIO_PB10 = GPIOB(10), 64 GPIO_PB11 = GPIOB(11), 65 GPIO_PB12 = GPIOB(12), 66 GPIO_PB13 = GPIOB(13), 67 68 GPIO_PC0 = GPIOC(0), 69 GPIO_PC1 = GPIOC(1), 70 GPIO_PC2 = GPIOC(2), 71 GPIO_PC3 = GPIOC(3), 72 GPIO_PC4 = GPIOC(4), 73 GPIO_PC5 = GPIOC(5), 74 GPIO_PC6 = GPIOC(6), 75 GPIO_PC7 = GPIOC(7), 76 GPIO_PC8 = GPIOC(8), 77 GPIO_PC9 = GPIOC(9), 78 GPIO_PC10 = GPIOC(10), 79 GPIO_PC11 = GPIOC(11), 80 GPIO_PC12 = GPIOC(12), 81 GPIO_PC13 = GPIOC(13), 82 GPIO_PC14 = GPIOC(14), 83 GPIO_PC15 = GPIOC(15), 84 GPIO_PC16 = GPIOC(16), 85 86 GPIO_PD0 = GPIOD(0), 87 GPIO_PD1 = GPIOD(1), 88 GPIO_PD2 = GPIOD(2), 89 GPIO_PD3 = GPIOD(3), 90 GPIO_PD4 = GPIOD(4), 91 GPIO_PD5 = GPIOD(5), 92 GPIO_PD6 = GPIOD(6), 93 GPIO_PD7 = GPIOD(7), 94 GPIO_PD8 = GPIOD(8), 95 GPIO_PD9 = GPIOD(9), 96 GPIO_PD10 = GPIOD(10), 97 GPIO_PD11 = GPIOD(11), 98 GPIO_PD12 = GPIOD(12), 99 GPIO_PD13 = GPIOD(13), 100 GPIO_PD14 = GPIOD(14), 101 GPIO_PD15 = GPIOD(15), 102 GPIO_PD16 = GPIOD(16), 103 GPIO_PD17 = GPIOD(17), 104 GPIO_PD18 = GPIOD(18), 105 GPIO_PD19 = GPIOD(19), 106 GPIO_PD20 = GPIOD(20), 107 GPIO_PD21 = GPIOD(21), 108 GPIO_PD22 = GPIOD(22), 109 110 GPIO_PE0 = GPIOE(0), 111 GPIO_PE1 = GPIOE(1), 112 GPIO_PE2 = GPIOE(2), 113 GPIO_PE3 = GPIOE(3), 114 GPIO_PE4 = GPIOE(4), 115 GPIO_PE5 = GPIOE(5), 116 GPIO_PE6 = GPIOE(6), 117 GPIO_PE7 = GPIOE(7), 118 GPIO_PE8 = GPIOE(8), 119 GPIO_PE9 = GPIOE(9), 120 GPIO_PE10 = GPIOE(10), 121 GPIO_PE11 = GPIOE(11), 122 GPIO_PE12 = GPIOE(12), 123 GPIO_PE13 = GPIOE(13), 124 GPIO_PE14 = GPIOE(14), 125 GPIO_PE15 = GPIOE(15), 126 GPIO_PE16 = GPIOE(16), 127 GPIO_PE17 = GPIOE(17), 128 GPIO_PE18 = GPIOE(18), 129 GPIO_PE19 = GPIOE(19), 130 GPIO_PE20 = GPIOE(20), 131 GPIO_PE21 = GPIOE(21), 132 133 GPIO_PF0 = GPIOF(0), 134 GPIO_PF1 = GPIOF(1), 135 GPIO_PF2 = GPIOF(2), 136 GPIO_PF3 = GPIOF(3), 137 GPIO_PF4 = GPIOF(4), 138 GPIO_PF5 = GPIOF(5), 139 GPIO_PF6 = GPIOF(6), 140 141 GPIO_PG0 = GPIOG(0), 142 GPIO_PG1 = GPIOG(1), 143 GPIO_PG2 = GPIOG(2), 144 GPIO_PG3 = GPIOG(3), 145 GPIO_PG4 = GPIOG(4), 146 GPIO_PG5 = GPIOG(5), 147 GPIO_PG6 = GPIOG(6), 148 GPIO_PG7 = GPIOG(7), 149 150 GPIO_PH0 = GPIOH(0), 151 GPIO_PH1 = GPIOH(1), 152 GPIO_PH2 = GPIOH(2), 153 GPIO_PH3 = GPIOH(3), 154 GPIO_PH4 = GPIOH(4), 155 GPIO_PH5 = GPIOH(5), 156 GPIO_PH6 = GPIOH(6), 157 GPIO_PH7 = GPIOH(7), 158 GPIO_PH8 = GPIOH(8), 159 GPIO_PH9 = GPIOH(9), 160 GPIO_PH10 = GPIOH(10), 161 GPIO_PH11 = GPIOH(11), 162 GPIO_PH12 = GPIOH(12), 163 GPIO_PH13 = GPIOH(13), 164 GPIO_PH14 = GPIOH(14), 165 GPIO_PH15 = GPIOH(15), 166 167 GPIO_PI0 = GPIOI(0), 168 GPIO_PI1 = GPIOI(1), 169 GPIO_PI2 = GPIOI(2), 170 GPIO_PI3 = GPIOI(3), 171 GPIO_PI4 = GPIOI(4), 172 GPIO_PI5 = GPIOI(5), 173 174 GPIO_PL0 = GPIOL(0), 175 GPIO_PL1 = GPIOL(1), 176 GPIO_PL2 = GPIOL(2), 177 GPIO_PL3 = GPIOL(3), 178 GPIO_PL4 = GPIOL(4), 179 GPIO_PL5 = GPIOL(5), 180 } gpio_pin_t; 181 182 #ifdef __cplusplus 183 } 184 #endif 185 #endif /* __PLATFORM_GPIO_H__ */ 186