1 /* 2 * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. 3 * 4 * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in 5 * the the People's Republic of China and other countries. 6 * All Allwinner Technology Co.,Ltd. trademarks are used with permission. 7 * 8 * DISCLAIMER 9 * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. 10 * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) 11 * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN 12 * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. 13 * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS 14 * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. 15 * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. 16 * 17 * 18 * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT 19 * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, 20 * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING 21 * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE 22 * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. 23 * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 26 * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 30 * OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef __PLATFORM_GPIO_H__ 34 #define __PLATFORM_GPIO_H__ 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 #define CONFIG_SOC_SUN20IW1 1 41 42 #define GPIO_MAX_BANK PG_BASE 43 #define BANK_BOUNDARY PL_BASE 44 #define SUNXI_GPIO_PBASE 0x02000000 45 #define SUNXI_GPIO_RES_SIZE 0x07FF 46 47 /* sunxi gpio irq*/ 48 #if defined(CONFIG_CORE_DSP0) /* DSP */ 49 #include <interrupt.h> 50 #define SUNXI_IRQ_GPIOB (RINTC_IRQ_MASK | 40) 51 #define SUNXI_IRQ_GPIOC (RINTC_IRQ_MASK | 42) 52 #define SUNXI_IRQ_GPIOD (RINTC_IRQ_MASK | 44) 53 #define SUNXI_IRQ_GPIOE (RINTC_IRQ_MASK | 46) 54 #define SUNXI_IRQ_GPIOF (RINTC_IRQ_MASK | 48) 55 #define SUNXI_IRQ_GPIOG (RINTC_IRQ_MASK | 50) 56 #elif defined(CONFIG_ARCH_SUN8IW20) /* ARM */ 57 #define SUNXI_GIC_START 32 58 #define SUNXI_IRQ_GPIOB (SUNXI_GIC_START + 69) 59 #define SUNXI_IRQ_GPIOC (SUNXI_GIC_START + 71) 60 #define SUNXI_IRQ_GPIOD (SUNXI_GIC_START + 73) 61 #define SUNXI_IRQ_GPIOE (SUNXI_GIC_START + 75) 62 #define SUNXI_IRQ_GPIOF (SUNXI_GIC_START + 77) 63 #define SUNXI_IRQ_GPIOG (SUNXI_GIC_START + 79) 64 #elif defined(CONFIG_SOC_SUN20IW1) /* RISC-V */ 65 #define SUNXI_IRQ_GPIOB (85) 66 #define SUNXI_IRQ_GPIOC (87) 67 #define SUNXI_IRQ_GPIOD (89) 68 #define SUNXI_IRQ_GPIOE (91) 69 #define SUNXI_IRQ_GPIOF (93) 70 #define SUNXI_IRQ_GPIOG (95) 71 #endif /* CONFIG_CORE_DSP0 */ 72 73 typedef enum 74 { 75 GPIO_PB0 = GPIOB(0), 76 GPIO_PB1 = GPIOB(1), 77 GPIO_PB2 = GPIOB(2), 78 GPIO_PB3 = GPIOB(3), 79 GPIO_PB4 = GPIOB(4), 80 GPIO_PB5 = GPIOB(5), 81 GPIO_PB6 = GPIOB(6), 82 GPIO_PB7 = GPIOB(7), 83 84 GPIO_PC0 = GPIOC(0), 85 GPIO_PC1 = GPIOC(1), 86 GPIO_PC2 = GPIOC(2), 87 GPIO_PC3 = GPIOC(3), 88 GPIO_PC4 = GPIOC(4), 89 GPIO_PC5 = GPIOC(5), 90 GPIO_PC6 = GPIOC(6), 91 GPIO_PC7 = GPIOC(7), 92 93 GPIO_PD0 = GPIOD(0), 94 GPIO_PD1 = GPIOD(1), 95 GPIO_PD2 = GPIOD(2), 96 GPIO_PD3 = GPIOD(3), 97 GPIO_PD4 = GPIOD(4), 98 GPIO_PD5 = GPIOD(5), 99 GPIO_PD6 = GPIOD(6), 100 GPIO_PD7 = GPIOD(7), 101 GPIO_PD8 = GPIOD(8), 102 GPIO_PD9 = GPIOD(9), 103 GPIO_PD10 = GPIOD(10), 104 GPIO_PD11 = GPIOD(11), 105 GPIO_PD12 = GPIOD(12), 106 GPIO_PD13 = GPIOD(13), 107 GPIO_PD14 = GPIOD(14), 108 GPIO_PD15 = GPIOD(15), 109 GPIO_PD16 = GPIOD(16), 110 GPIO_PD17 = GPIOD(17), 111 GPIO_PD18 = GPIOD(18), 112 GPIO_PD19 = GPIOD(19), 113 GPIO_PD20 = GPIOD(20), 114 GPIO_PD21 = GPIOD(21), 115 GPIO_PD22 = GPIOD(22), 116 117 GPIO_PE0 = GPIOE(0), 118 GPIO_PE1 = GPIOE(1), 119 GPIO_PE2 = GPIOE(2), 120 GPIO_PE3 = GPIOE(3), 121 GPIO_PE4 = GPIOE(4), 122 GPIO_PE5 = GPIOE(5), 123 GPIO_PE6 = GPIOE(6), 124 GPIO_PE7 = GPIOE(7), 125 GPIO_PE8 = GPIOE(8), 126 GPIO_PE9 = GPIOE(9), 127 GPIO_PE10 = GPIOE(10), 128 GPIO_PE11 = GPIOE(11), 129 GPIO_PE12 = GPIOE(12), 130 GPIO_PE13 = GPIOE(13), 131 GPIO_PE14 = GPIOE(14), 132 GPIO_PE15 = GPIOE(15), 133 GPIO_PE16 = GPIOE(16), 134 GPIO_PE17 = GPIOE(17), 135 136 GPIO_PF0 = GPIOF(0), 137 GPIO_PF1 = GPIOF(1), 138 GPIO_PF2 = GPIOF(2), 139 GPIO_PF3 = GPIOF(3), 140 GPIO_PF4 = GPIOF(4), 141 GPIO_PF5 = GPIOF(5), 142 GPIO_PF6 = GPIOF(6), 143 144 GPIO_PG0 = GPIOG(0), 145 GPIO_PG1 = GPIOG(1), 146 GPIO_PG2 = GPIOG(2), 147 GPIO_PG3 = GPIOG(3), 148 GPIO_PG4 = GPIOG(4), 149 GPIO_PG5 = GPIOG(5), 150 GPIO_PG6 = GPIOG(6), 151 GPIO_PG7 = GPIOG(7), 152 GPIO_PG8 = GPIOG(8), 153 GPIO_PG9 = GPIOG(9), 154 GPIO_PG10 = GPIOG(10), 155 GPIO_PG11 = GPIOG(11), 156 GPIO_PG12 = GPIOG(12), 157 GPIO_PG13 = GPIOG(13), 158 GPIO_PG14 = GPIOG(14), 159 GPIO_PG15 = GPIOG(15), 160 161 /* To aviod compile warnings. */ 162 GPIO_MAX = GPIOO(31), 163 164 } gpio_pin_t; 165 166 #ifdef __cplusplus 167 } 168 #endif 169 #endif /* __PLATFORM_GPIO_H__ */ 170