1 #include <sunxi_hal_common.h>
2 #include <hal_clk.h>
3 #include <hal_prcm.h>
4
hal_clock_init(void)5 void hal_clock_init(void)
6 {
7 ccu_init();
8 }
9
hal_clk_set_parent(hal_clk_id_t clk,hal_clk_id_t parent)10 hal_clk_status_t hal_clk_set_parent(hal_clk_id_t clk, hal_clk_id_t parent)
11 {
12 return ccu_set_mclk_src(clk, parent) == OK ?
13 HAL_CLK_STATUS_OK :
14 HAL_CLK_STATUS_INVALID_PARAMETER;
15 }
16
hal_clk_get_parent(hal_clk_id_t clk)17 hal_clk_id_t hal_clk_get_parent(hal_clk_id_t clk)
18 {
19 return ccu_get_mclk_src(clk);
20 }
21
hal_clk_recalc_rate(hal_clk_id_t clk)22 u32 hal_clk_recalc_rate(hal_clk_id_t clk)
23 {
24 return ccu_get_sclk_freq(clk);
25 }
26
hal_clk_round_rate(hal_clk_id_t clk,u32 rate)27 u32 hal_clk_round_rate(hal_clk_id_t clk, u32 rate)
28 {
29 /* TODO */
30 return HAL_CLK_RATE_UNINITIALIZED;
31 }
32
hal_clk_get_rate(hal_clk_id_t clk)33 u32 hal_clk_get_rate(hal_clk_id_t clk)
34 {
35 return ccu_get_sclk_freq(clk);
36 }
37
hal_clk_set_rate(hal_clk_id_t clk,u32 rate)38 hal_clk_status_t hal_clk_set_rate(hal_clk_id_t clk, u32 rate)
39 {
40 return ccu_set_sclk_freq(clk, rate) == OK ?
41 HAL_CLK_STATUS_OK :
42 HAL_CLK_STATUS_INVALID_PARAMETER;
43 }
44
hal_clock_is_enabled(hal_clk_id_t clk)45 hal_clk_status_t hal_clock_is_enabled(hal_clk_id_t clk)
46 {
47 /* FIXME: always return disabled */
48 return HAL_CLK_STATUS_DISABLED;
49 }
50
hal_clock_enable(hal_clk_id_t clk)51 hal_clk_status_t hal_clock_enable(hal_clk_id_t clk)
52 {
53 if (ccu_set_mclk_reset(clk, CCU_CLK_NRESET) != OK)
54 return HAL_CLK_STATUS_ERROR_CLK_ENABLED_FAILED;
55
56 if (ccu_set_mclk_onoff(clk, CCU_CLK_ON) != OK)
57 return HAL_CLK_STATUS_ERROR_CLK_ENABLED_FAILED;
58
59 return HAL_CLK_STATUS_OK;
60 }
61
hal_clock_disable(hal_clk_id_t clk)62 hal_clk_status_t hal_clock_disable(hal_clk_id_t clk)
63 {
64 if (ccu_set_mclk_onoff(clk, CCU_CLK_OFF) != OK)
65 return HAL_CLK_STATUS_ERROR_CLK_ENABLED_FAILED;
66
67 if (ccu_set_mclk_reset(clk, CCU_CLK_RESET) != OK)
68 return HAL_CLK_STATUS_ERROR_CLK_ENABLED_FAILED;
69
70 return HAL_CLK_STATUS_OK;
71 }
72