1 /*
2 * Copyright (C) 2012 by Alan Stern
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 */
14
15 /* This file is part of ehci-hcd.c */
16
17 /*-------------------------------------------------------------------------*/
18
19 /* Set a bit in the USBCMD register */
ehci_set_command_bit(struct ehci_hcd * ehci,u32 bit)20 static void ehci_set_command_bit(struct ehci_hcd *ehci, u32 bit)
21 {
22 ehci->command |= bit;
23 ehci_writel(ehci, ehci->command, &ehci->regs->command);
24
25 /* unblock posted write */
26 ehci_readl(ehci, &ehci->regs->command);
27 }
28
29 /* Clear a bit in the USBCMD register */
ehci_clear_command_bit(struct ehci_hcd * ehci,u32 bit)30 static void ehci_clear_command_bit(struct ehci_hcd *ehci, u32 bit)
31 {
32 ehci->command &= ~bit;
33 ehci_writel(ehci, ehci->command, &ehci->regs->command);
34
35 /* unblock posted write */
36 ehci_readl(ehci, &ehci->regs->command);
37 }
38
39 /*-------------------------------------------------------------------------*/
40
41 /*
42 * EHCI timer support... Now using hrtimers.
43 *
44 * Lots of different events are triggered from ehci->hrtimer. Whenever
45 * the timer routine runs, it checks each possible event; events that are
46 * currently enabled and whose expiration time has passed get handled.
47 * The set of enabled events is stored as a collection of bitflags in
48 * ehci->enabled_hrtimer_events, and they are numbered in order of
49 * increasing delay values (ranging between 1 ms and 100 ms).
50 *
51 * Rather than implementing a sorted list or tree of all pending events,
52 * we keep track only of the lowest-numbered pending event, in
53 * ehci->next_hrtimer_event. Whenever ehci->hrtimer gets restarted, its
54 * expiration time is set to the timeout value for this event.
55 *
56 * As a result, events might not get handled right away; the actual delay
57 * could be anywhere up to twice the requested delay. This doesn't
58 * matter, because none of the events are especially time-critical. The
59 * ones that matter most all have a delay of 1 ms, so they will be
60 * handled after 2 ms at most, which is okay. In addition to this, we
61 * allow for an expiration range of 1 ms.
62 */
63
64 /*
65 * Delay lengths for the hrtimer event types.
66 * Keep this list sorted by delay length, in the same order as
67 * the event types indexed by enum ehci_hrtimer_event in ehci.h.
68 */
69 #if 0
70 #define NSEC_PER_MSEC 1000000L
71 #else
72 #define NSEC_PER_MSEC 1L
73 #endif
74
75 #ifndef BIT
76 #define BIT(n) (1UL << (n))
77 #endif
78
79 static unsigned long event_delays_ns[] = {
80 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_ASS */
81 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_PSS */
82 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */
83 // 1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */
84 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_UNLINK_INTR */
85 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */
86 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ACTIVE_UNLINK */
87 5 * NSEC_PER_MSEC, /* EHCI_HRTIMER_START_UNLINK_INTR */
88 6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */
89 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */
90 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_PERIODIC */
91 15 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_ASYNC */
92 100 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IO_WATCHDOG */
93 };
94
95 /* Enable a pending hrtimer event */
96 //高精度定时器,插入一个定时事件
ehci_enable_event(struct ehci_hcd * ehci,unsigned event,bool resched)97 static void ehci_enable_event(struct ehci_hcd *ehci, unsigned event,
98 bool resched)
99 {
100 unsigned long *timeout = &ehci->hr_timeouts[event];
101 unsigned long time_interval = 0;
102
103 if (resched)
104 {
105 // *timeout = ktime_add(ktime_get(), ktime_set(0, event_delays_ns[event]));
106 time_interval = rt_tick_from_millisecond(event_delays_ns[event]);
107 *timeout = rt_tick_get() + time_interval;
108 }
109
110 ehci->enabled_hrtimer_events |= (1 << event);
111
112 /* Track only the lowest-numbered pending event */
113 if (event < ehci->next_hrtimer_event) {
114
115 unsigned long get_time=0;
116
117 ehci->next_hrtimer_event = event;
118 // hrtimer_start_range_ns(&ehci->hrtimer, *timeout,
119 // NSEC_PER_MSEC, HRTIMER_MODE_ABS);
120 osal_timer_control(ehci->hrtimer, OSAL_TIMER_CTRL_SET_TIME, &time_interval);
121 osal_timer_start(ehci->hrtimer);//ehci_hrtimer_func
122 }
123 }
124
125
126 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
ehci_poll_ASS(struct ehci_hcd * ehci)127 static void ehci_poll_ASS(struct ehci_hcd *ehci)
128 {
129 unsigned actual, want;
130
131 /* Don't enable anything if the controller isn't running (e.g., died) */
132 if (ehci->rh_state != EHCI_RH_RUNNING)
133 return;
134
135 want = (ehci->command & CMD_ASE) ? STS_ASS : 0;
136 actual = ehci_readl(ehci, &ehci->regs->status) & STS_ASS;
137
138 if (want != actual) {
139
140 /* Poll again later, but give up after about 2-4 ms */
141 if (ehci->ASS_poll_count++ < 2) {
142 ehci_enable_event(ehci, EHCI_HRTIMER_POLL_ASS, true);
143 return;
144 }
145 // ehci_dbg(ehci, "Waited too long for the async schedule status (%x/%x), giving up\n",
146 // want, actual);
147 }
148 ehci->ASS_poll_count = 0;
149
150 /* The status is up-to-date; restart or stop the schedule as needed */
151 if (want == 0)
152 { /* Stopped */
153 if (ehci->async_count > 0)
154 {
155 // ehci_set_command_bit(ehci, CMD_ASE);
156 // mdelay(1000);
157 int cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_ASE;
158 ehci_writel(ehci, cmd, &ehci->regs->command);
159
160 if (ehci_handshake(ehci, (uint32_t *)&ehci->regs->status, STS_ASS, STS_ASS, 100 * 1000) < 0)
161 {
162 hal_log_err("EHCI fail timeout STS_ASS set.\n");
163 }
164 }
165 }
166 else
167 { /* Running */
168 if (ehci->async_count == 0)
169 {
170 /* Turn off the schedule after a while */
171 ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_ASYNC,
172 true);
173 }
174 }
175 }
176
177 /* Turn off the async schedule after a brief delay */
ehci_disable_ASE(struct ehci_hcd * ehci)178 static void ehci_disable_ASE(struct ehci_hcd *ehci)
179 {
180 ehci_clear_command_bit(ehci, CMD_ASE);
181 }
182
183
184 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
ehci_poll_PSS(struct ehci_hcd * ehci)185 static void ehci_poll_PSS(struct ehci_hcd *ehci)
186 {
187 unsigned actual, want;
188
189 /* Don't do anything if the controller isn't running (e.g., died) */
190 if (ehci->rh_state != EHCI_RH_RUNNING)
191 return;
192
193 want = (ehci->command & CMD_PSE) ? STS_PSS : 0;
194 actual = ehci_readl(ehci, &ehci->regs->status) & STS_PSS;
195
196 if (want != actual) {
197
198 /* Poll again later, but give up after about 2-4 ms */
199 if (ehci->PSS_poll_count++ < 2) {
200 ehci_enable_event(ehci, EHCI_HRTIMER_POLL_PSS, true);
201 return;
202 }
203 // ehci_dbg(ehci, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
204 // want, actual);
205 }
206 ehci->PSS_poll_count = 0;
207
208 /* The status is up-to-date; restart or stop the schedule as needed */
209 if (want == 0) { /* Stopped */
210 if (ehci->periodic_count > 0)
211 ehci_set_command_bit(ehci, CMD_PSE);
212
213 } else { /* Running */
214 if (ehci->periodic_count == 0) {
215
216 /* Turn off the schedule after a while */
217 ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_PERIODIC,
218 true);
219 }
220 }
221 }
222
223 /* Turn off the periodic schedule after a brief delay */
ehci_disable_PSE(struct ehci_hcd * ehci)224 static void ehci_disable_PSE(struct ehci_hcd *ehci)
225 {
226 ehci_clear_command_bit(ehci, CMD_PSE);
227 }
228
229
230 /* Poll the STS_HALT status bit; see when a dead controller stops */
ehci_handle_controller_death(struct ehci_hcd * ehci)231 static void ehci_handle_controller_death(struct ehci_hcd *ehci)
232 {
233 if (!(ehci_readl(ehci, &ehci->regs->status) & STS_HALT)) {
234
235 /* Give up after a few milliseconds */
236 if (ehci->died_poll_count++ < 5) {
237 /* Try again later */
238 ehci_enable_event(ehci, EHCI_HRTIMER_POLL_DEAD, true);
239 return;
240 }
241 // ehci_warn(ehci, "Waited too long for the controller to stop, giving up\n");
242 }
243
244 /* Clean up the mess */
245 ehci->rh_state = EHCI_RH_HALTED;
246 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
247 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
248 ehci_work(ehci);
249 end_unlink_async(ehci);
250
251 /* Not in process context, so don't try to reset the controller */
252 }
253
254 /* start to unlink interrupt QHs */
ehci_handle_start_intr_unlinks(struct ehci_hcd * ehci)255 static void ehci_handle_start_intr_unlinks(struct ehci_hcd *ehci)
256 {
257 bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
258
259 /*
260 * Process all the QHs on the intr_unlink list that were added
261 * before the current unlink cycle began. The list is in
262 * temporal order, so stop when we reach the first entry in the
263 * current cycle. But if the root hub isn't running then
264 * process all the QHs on the list.
265 */
266 while (!list_empty(&ehci->intr_unlink_wait)) {
267 struct ehci_qh *qh;
268
269 qh = list_first_entry(&ehci->intr_unlink_wait,
270 struct ehci_qh, unlink_node);
271 if (!stopped && (qh->unlink_cycle ==
272 ehci->intr_unlink_wait_cycle))
273 break;
274 list_del_init(&qh->unlink_node);
275 qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
276 start_unlink_intr(ehci, qh);
277 }
278
279 /* Handle remaining entries later */
280 if (!list_empty(&ehci->intr_unlink_wait)) {
281 ehci_enable_event(ehci, EHCI_HRTIMER_START_UNLINK_INTR, true);
282 ++ehci->intr_unlink_wait_cycle;
283 }
284 }
285
286 /* Handle unlinked interrupt QHs once they are gone from the hardware */
ehci_handle_intr_unlinks(struct ehci_hcd * ehci)287 static void ehci_handle_intr_unlinks(struct ehci_hcd *ehci)
288 {
289 bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
290
291 /*
292 * Process all the QHs on the intr_unlink list that were added
293 * before the current unlink cycle began. The list is in
294 * temporal order, so stop when we reach the first entry in the
295 * current cycle. But if the root hub isn't running then
296 * process all the QHs on the list.
297 */
298 ehci->intr_unlinking = true;
299 while (!list_empty(&ehci->intr_unlink)) {
300 struct ehci_qh *qh;
301
302 qh = list_first_entry(&ehci->intr_unlink, struct ehci_qh,
303 unlink_node);
304 if (!stopped && qh->unlink_cycle == ehci->intr_unlink_cycle)
305 break;
306 list_del_init(&qh->unlink_node);
307 end_unlink_intr(ehci, qh);
308 }
309
310 /* Handle remaining entries later */
311 if (!list_empty(&ehci->intr_unlink)) {
312 ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
313 ++ehci->intr_unlink_cycle;
314 }
315 ehci->intr_unlinking = false;
316 }
317
318
319 /* Start another free-iTDs/siTDs cycle */
start_free_itds(struct ehci_hcd * ehci)320 static void start_free_itds(struct ehci_hcd *ehci)
321 {
322 if (!(ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_FREE_ITDS))) {
323 ehci->last_itd_to_free = list_entry(
324 ehci->cached_itd_list.prev,
325 struct ehci_itd, itd_list);
326 ehci->last_sitd_to_free = list_entry(
327 ehci->cached_sitd_list.prev,
328 struct ehci_sitd, sitd_list);
329 ehci_enable_event(ehci, EHCI_HRTIMER_FREE_ITDS, true);
330 }
331 }
332
333 /* Wait for controller to stop using old iTDs and siTDs */
end_free_itds(struct ehci_hcd * ehci)334 static void end_free_itds(struct ehci_hcd *ehci)
335 {
336 struct ehci_itd *itd, *n;
337 struct ehci_sitd *sitd, *sn;
338
339 if (ehci->rh_state < EHCI_RH_RUNNING) {
340 ehci->last_itd_to_free = NULL;
341 ehci->last_sitd_to_free = NULL;
342 }
343
344 list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
345 list_del(&itd->itd_list);
346 // dma_pool_free(ehci->itd_pool, itd, itd->itd_dma);//akira 20202020
347 usb_dma_free(itd, itd->itd_dma);
348 if (itd == ehci->last_itd_to_free)
349 break;
350 }
351 list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
352 list_del(&sitd->sitd_list);
353 // dma_pool_free(ehci->sitd_pool, sitd, sitd->sitd_dma);//akira 20202020
354 usb_dma_free(sitd, sitd->sitd_dma);
355 if (sitd == ehci->last_sitd_to_free)
356 break;
357 }
358
359 if (!list_empty(&ehci->cached_itd_list) ||
360 !list_empty(&ehci->cached_sitd_list))
361 start_free_itds(ehci);
362 }
363
364
365 /* Handle lost (or very late) IAA interrupts */
ehci_iaa_watchdog(struct ehci_hcd * ehci)366 static void ehci_iaa_watchdog(struct ehci_hcd *ehci)
367 {
368 u32 cmd, status;
369
370 /*
371 * Lost IAA irqs wedge things badly; seen first with a vt8235.
372 * So we need this watchdog, but must protect it against both
373 * (a) SMP races against real IAA firing and retriggering, and
374 * (b) clean HC shutdown, when IAA watchdog was pending.
375 */
376 if (!ehci->iaa_in_progress || ehci->rh_state != EHCI_RH_RUNNING)
377 return;
378
379 /* If we get here, IAA is *REALLY* late. It's barely
380 * conceivable that the system is so busy that CMD_IAAD
381 * is still legitimately set, so let's be sure it's
382 * clear before we read STS_IAA. (The HC should clear
383 * CMD_IAAD when it sets STS_IAA.)
384 */
385 cmd = ehci_readl(ehci, &ehci->regs->command);
386
387 /*
388 * If IAA is set here it either legitimately triggered
389 * after the watchdog timer expired (_way_ late, so we'll
390 * still count it as lost) ... or a silicon erratum:
391 * - VIA seems to set IAA without triggering the IRQ;
392 * - IAAD potentially cleared without setting IAA.
393 */
394 status = ehci_readl(ehci, &ehci->regs->status);
395 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
396 COUNT(ehci->stats.lost_iaa);
397 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
398 }
399
400 // ehci_dbg(ehci, "IAA watchdog: status %x cmd %x\n", status, cmd);
401
402 end_iaa_cycle(ehci);
403 }
404
405
406 /* Enable the I/O watchdog, if appropriate */
turn_on_io_watchdog(struct ehci_hcd * ehci)407 static void turn_on_io_watchdog(struct ehci_hcd *ehci)
408 {
409 /* Not needed if the controller isn't running or it's already enabled */
410 if (ehci->rh_state != EHCI_RH_RUNNING ||
411 (ehci->enabled_hrtimer_events &
412 BIT(EHCI_HRTIMER_IO_WATCHDOG)))
413 return;
414
415 /*
416 * Isochronous transfers always need the watchdog.
417 * For other sorts we use it only if the flag is set.
418 */
419 if (ehci->isoc_count > 0 || (ehci->need_io_watchdog &&
420 ehci->async_count + ehci->intr_count > 0))
421 {
422 ehci_enable_event(ehci, EHCI_HRTIMER_IO_WATCHDOG, true);
423 }
424 }
425
426 /*
427 * Handler functions for the hrtimer event types.
428 * Keep this array in the same order as the event types indexed by
429 * enum ehci_hrtimer_event in ehci.h.
430 */
431 static void (*event_handlers[])(struct ehci_hcd *) = {
432 ehci_poll_ASS, /* EHCI_HRTIMER_POLL_ASS */
433 ehci_poll_PSS, /* EHCI_HRTIMER_POLL_PSS */
434 ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */
435 ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */
436 end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */
437 end_unlink_async, /* EHCI_HRTIMER_ACTIVE_UNLINK */
438 ehci_handle_start_intr_unlinks, /* EHCI_HRTIMER_START_UNLINK_INTR */
439 unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */
440 ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */
441 ehci_disable_PSE, /* EHCI_HRTIMER_DISABLE_PERIODIC */
442 ehci_disable_ASE, /* EHCI_HRTIMER_DISABLE_ASYNC */
443 ehci_work, /* EHCI_HRTIMER_IO_WATCHDOG */
444 };
445
446 // ehci_enable_event
ehci_hrtimer_func(void * t)447 void ehci_hrtimer_func(void *t)
448 // static enum hrtimer_restart ehci_hrtimer_func(struct hrtimer *t)
449 {
450 // struct ehci_hcd *ehci = container_of(t, struct ehci_hcd, hrtimer);
451 struct ehci_hcd *ehci = (struct ehci_hcd *)t;
452 // ktime_t now;
453 unsigned long now;
454 unsigned long events;
455 unsigned long flags;
456 unsigned e;
457
458 // spin_lock_irqsave(&ehci->lock, flags);//akira 20202020
459 hal_spin_lock(&ehci->lock);
460
461 events = ehci->enabled_hrtimer_events;
462 ehci->enabled_hrtimer_events = 0;
463 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
464
465 /*
466 * Check each pending event. If its time has expired, handle
467 * the event; otherwise re-enable it.
468 */
469 now = rt_tick_get();
470 // now = HAL_GetTimeNs();
471
472 // for_each_set_bit(e, &events, EHCI_HRTIMER_NUM_EVENTS)//akira 20202020
473 for (int e = 0; e < EHCI_HRTIMER_NUM_EVENTS; e++)
474 {
475 if (events & BIT(e))
476 {
477 if (now >= ehci->hr_timeouts[e]) // if (now.tv64 >= ehci->hr_timeouts[e].tv64)
478 {
479 event_handlers[e](ehci);
480 }
481 else
482 {
483 ehci_enable_event(ehci, e, false);
484 }
485 }
486 }
487
488 hal_spin_unlock(&ehci->lock);
489 // spin_unlock_irqrestore(&ehci->lock, flags);//akira 20202020
490 // return HRTIMER_NORESTART;//akira 20202020
491 }
492