1 #if 0 2 3 /* 4 * OHCI HCD (Host Controller Driver) for USB. 5 * 6 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 7 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 8 * 9 * This file is licenced under the GPL. 10 */ 11 12 /*-------------------------------------------------------------------------*/ 13 14 /* 15 * OHCI deals with three types of memory: 16 * - data used only by the HCD ... kmalloc is fine 17 * - async and periodic schedules, shared by HC and HCD ... these 18 * need to use dma_pool or dma_alloc_coherent 19 * - driver buffers, read/written by HC ... the hcd glue or the 20 * device driver provides us with dma addresses 21 * 22 * There's also "register" data, which is memory mapped. 23 * No memory seen by this driver (or any HCD) may be paged out. 24 */ 25 26 /*-------------------------------------------------------------------------*/ 27 28 static void ohci_hcd_init (struct ohci_hcd *ohci) 29 { 30 ohci->next_statechange = jiffies; 31 spin_lock_init (&ohci->lock); 32 INIT_LIST_HEAD (&ohci->pending); 33 INIT_LIST_HEAD(&ohci->eds_in_use); 34 } 35 36 /*-------------------------------------------------------------------------*/ 37 38 static int ohci_mem_init (struct ohci_hcd *ohci) 39 { 40 ohci->td_cache = dma_pool_create ("ohci_td", 41 ohci_to_hcd(ohci)->self.controller, 42 sizeof (struct td), 43 32 /* byte alignment */, 44 0 /* no page-crossing issues */); 45 if (!ohci->td_cache) 46 return -ENOMEM; 47 ohci->ed_cache = dma_pool_create ("ohci_ed", 48 ohci_to_hcd(ohci)->self.controller, 49 sizeof (struct ed), 50 16 /* byte alignment */, 51 0 /* no page-crossing issues */); 52 if (!ohci->ed_cache) { 53 dma_pool_destroy (ohci->td_cache); 54 return -ENOMEM; 55 } 56 return 0; 57 } 58 59 static void ohci_mem_cleanup (struct ohci_hcd *ohci) 60 { 61 if (ohci->td_cache) { 62 dma_pool_destroy (ohci->td_cache); 63 ohci->td_cache = NULL; 64 } 65 if (ohci->ed_cache) { 66 dma_pool_destroy (ohci->ed_cache); 67 ohci->ed_cache = NULL; 68 } 69 } 70 71 /*-------------------------------------------------------------------------*/ 72 73 /* ohci "done list" processing needs this mapping */ 74 static inline struct td * 75 dma_to_td (struct ohci_hcd *hc, dma_addr_t td_dma) 76 { 77 struct td *td; 78 79 td_dma &= TD_MASK; 80 td = hc->td_hash [TD_HASH_FUNC(td_dma)]; 81 while (td && td->td_dma != td_dma) 82 td = td->td_hash; 83 return td; 84 } 85 86 /* TDs ... */ 87 static struct td * 88 td_alloc (struct ohci_hcd *hc, gfp_t mem_flags) 89 { 90 dma_addr_t dma; 91 struct td *td; 92 93 td = dma_pool_alloc (hc->td_cache, mem_flags, &dma); 94 if (td) { 95 /* in case hc fetches it, make it look dead */ 96 memset (td, 0, sizeof *td); 97 td->hwNextTD = cpu_to_hc32 (hc, dma); 98 td->td_dma = dma; 99 /* hashed in td_fill */ 100 } 101 return td; 102 } 103 104 static void 105 td_free (struct ohci_hcd *hc, struct td *td) 106 { 107 struct td **prev = &hc->td_hash [TD_HASH_FUNC (td->td_dma)]; 108 109 while (*prev && *prev != td) 110 prev = &(*prev)->td_hash; 111 if (*prev) 112 *prev = td->td_hash; 113 else if ((td->hwINFO & cpu_to_hc32(hc, TD_DONE)) != 0) 114 ohci_dbg (hc, "no hash for td %p\n", td); 115 dma_pool_free (hc->td_cache, td, td->td_dma); 116 } 117 118 /*-------------------------------------------------------------------------*/ 119 120 /* EDs ... */ 121 static struct ed * 122 ed_alloc (struct ohci_hcd *hc, gfp_t mem_flags) 123 { 124 dma_addr_t dma; 125 struct ed *ed; 126 127 ed = dma_pool_alloc (hc->ed_cache, mem_flags, &dma); 128 if (ed) { 129 memset (ed, 0, sizeof (*ed)); 130 INIT_LIST_HEAD (&ed->td_list); 131 ed->dma = dma; 132 } 133 return ed; 134 } 135 136 static void 137 ed_free (struct ohci_hcd *hc, struct ed *ed) 138 { 139 dma_pool_free (hc->ed_cache, ed, ed->dma); 140 } 141 142 #endif 143