1 /*
2 *********************************************************************************************************
3 *                                                AR100 SYSTEM
4 *                                     AR100 Software System Develop Kits
5 *                                       clock control unit module
6 *
7 *                                    (c) Copyright 2012-2016, Sunny China
8 *                                             All Rights Reserved
9 *
10 * File    : prcm.h
11 * By      : Sunny
12 * Version : v1.0
13 * Date    : 2012-4-28
14 * Descript: clock control unit public header.
15 * Update  : date                auther      ver     notes
16 *           2012-4-28 14:48:38  Sunny       1.0     Create this file.
17 *********************************************************************************************************
18 */
19 
20 #ifndef __PRCM_H__
21 #define __PRCM_H__
22 
23 #include <sunxi_hal_rtc.h>
24 #include <sunxi_hal_common.h>
25 
26 /* the clock status of on-off */
27 typedef enum ccu_clk_onoff {
28     CCU_CLK_OFF = 0x0,          /* clock off status */
29     CCU_CLK_ON  = 0x1,          /* clock on status */
30 } ccu_clk_onff_e;
31 
32 /* the clock status of reset */
33 typedef enum ccu_clk_reset {
34     CCU_CLK_RESET   = 0x0,      /* reset valid status */
35     CCU_CLK_NRESET  = 0x1,      /* reset invalid status */
36 } ccu_clk_reset_e;
37 
38 /* command for call-back function of clock change */
39 typedef enum ccu_clk_cmd {
40     CCU_CLK_CLKCHG_REQ = 0x0,   /* command for notify that clock will change */
41     CCU_CLK_CLKCHG_DONE,        /* command for notify that clock change finish */
42 } ccu_clk_cmd_e;
43 
44 /* command for call-back function of 24M hosc on-off */
45 typedef enum ccu_hosc_cmd {
46     CCU_HOSC_ON_READY_NOTIFY = 0x0, /* command for notify that 24mhosc power-on already */
47     CCU_HOSC_WILL_OFF_NOTIFY,       /* command for notify that 24mhosc will off */
48 } ccu_hosc_cmd_e;
49 
50 /* the state of power-off gating */
51 typedef enum poweroff_gating_state {
52     CCU_POWEROFF_GATING_INVALID = 0x0,
53     CCU_POWEROFF_GATING_VALID   = 0x1,
54 } poweroff_gating_state_e;
55 
56 /* source clocks ID */
57 typedef enum ccu_src_clk {
58     CCU_SYS_CLK_NONE = 0x0, /* invalid source clock id */
59 
60     CCU_SYS_CLK_LOSC,   /* LOSC, 33/50/67:32768Hz, 73:16MHz/512=31250 */
61     CCU_SYS_CLK_IOSC,   /* InternalOSC,  33/50/67:700KHZ, 73:16MHz */
62     CCU_SYS_CLK_HOSC,   /* HOSC, 24MHZ clock */
63     CCU_SYS_CLK_AXI,    /* AXI clock */
64     CCU_SYS_CLK_16M,    /* 16M for the backdoor */
65 
66     CCU_SYS_CLK_PLL1,   /* PLL1 clock */
67     CCU_SYS_CLK_PLL2,   /* PLL2 clock */
68     CCU_SYS_CLK_PLL3,   /* PLL3 clock */
69     CCU_SYS_CLK_PLL4,   /* PLL4 clock */
70     CCU_SYS_CLK_PLL5,   /* PLL5 clock */
71     CCU_SYS_CLK_PLL6,   /* PLL6 clock */
72     CCU_SYS_CLK_PLL7,   /* PLL7 clock  */
73     CCU_SYS_CLK_PLL8,   /* PLL8 clock */
74     CCU_SYS_CLK_PLL9,   /* PLL9 clock */
75     CCU_SYS_CLK_PLL10,  /* PLL10 clock */
76     CCU_SYS_CLK_PLL11,  /* PLL10 clock */
77 
78     CCU_SYS_CLK_AUDIO0, /* AUDIO0 clock */
79     CCU_SYS_CLK_AUDIO1, /* AUDIO1 clock */
80 
81     CCU_SYS_CLK_CPUS,   /* cpus clock */
82     CCU_SYS_CLK_C0,     /* cluster0 clock */
83     CCU_SYS_CLK_C1,     /* cluster1 clock */
84     CCU_SYS_CLK_DDR0,   /* ddr0 clock */
85     CCU_SYS_CLK_DDR1,   /* ddr1 clock */
86     CCU_SYS_CLK_PERI0,  /* peri0 clock */
87     CCU_SYS_CLK_PERI1,  /* peri1 clock */
88     CCU_SYS_CLK_AXI0,   /* AXI0 clock */
89     CCU_SYS_CLK_AXI1,   /* AXI0 clock */
90     CCU_SYS_CLK_AHB0,   /* AHB0 clock */
91     CCU_SYS_CLK_AHB1,   /* AHB1 clock */
92     CCU_SYS_CLK_AHB2,   /* AHB2 clock */
93     CCU_SYS_CLK_APB0,   /* APB0 clock */
94     CCU_SYS_CLK_APB1,   /* APB1 clock */
95     CCU_SYS_CLK_APB2,   /* APB2 clock */
96     CCU_SYS_CLK_AHB3,   /* AHB3 clock */
97     CCU_SYS_CLK_PSI,    /* PSI clock */
98     CCU_SYS_CLK_AHBS,   /* AHBS clock */
99     CCU_SYS_CLK_APBS1,  /* APBS1 clock */
100     CCU_SYS_CLK_APBS2,  /* APBS2 clock */
101 } ccu_sys_clk_e;
102 
103 /* module clocks ID */
104 typedef enum ccu_mod_clk {
105     CCU_MOD_CLK_NONE,
106 
107     CCU_MOD_CLK_CPUS,
108     CCU_MOD_CLK_AHB0,
109     CCU_MOD_CLK_APB0,
110 
111     CCU_MOD_CLK_C0,
112     CCU_MOD_CLK_C1,
113     CCU_MOD_CLK_CPU0,
114     CCU_MOD_CLK_CPU1,
115     CCU_MOD_CLK_CPU2,
116     CCU_MOD_CLK_CPU3,
117     CCU_MOD_CLK_AHB1,
118     CCU_MOD_CLK_AHB2,
119     CCU_MOD_CLK_APB1,
120     CCU_MOD_CLK_APB2,
121     CCU_MOD_CLK_DMA,
122     CCU_MOD_CLK_SDRAM,
123     CCU_MOD_CLK_SPINLOCK,
124     CCU_MOD_CLK_MSGBOX,
125     CCU_MOD_CLK_MSGBOX0,
126     CCU_MOD_CLK_MSGBOX1,
127     CCU_MOD_CLK_MSGBOXR,
128     CCU_MOD_CLK_AHB1_SS,
129     CCU_MOD_CLK_AXI,
130     CCU_MOD_CLK_AXI0,
131     CCU_MOD_CLK_AXI1,
132     CCU_MOD_CLK_R_DMA,
133     CCU_MOD_CLK_R_DMA_MCLK,
134     CCU_MOD_CLK_R_ONEWIRE_SP,
135     CCU_MOD_CLK_R_CIR_SP,
136     CCU_MOD_CLK_R_TH,
137     CCU_MOD_CLK_R_ONEWIRE,
138     CCU_MOD_CLK_R_UART,
139     CCU_MOD_CLK_R_UART1,
140     CCU_MOD_CLK_R_UART2,
141     CCU_MOD_CLK_R_UART3,
142     CCU_MOD_CLK_R_UART4,
143     CCU_MOD_CLK_R_TIMER0_1,
144     CCU_MOD_CLK_R_P2WI,
145     CCU_MOD_CLK_R_RSB,
146     CCU_MOD_CLK_R_TWI,
147     CCU_MOD_CLK_R_TWI0,
148     CCU_MOD_CLK_R_TWI1,
149     CCU_MOD_CLK_R_TWI2,
150     CCU_MOD_CLK_R_CIR,
151     CCU_MOD_CLK_R_PIO,
152     CCU_MOD_CLK_R_VM,
153     CCU_MOD_CLK_R_THS,
154     CCU_MOD_CLK_R_LRADC,
155     CCU_MOD_CLK_R_CAN,
156 
157     CCU_MOD_CLK_R_LPSD,
158     CCU_MOD_CLK_R_MAD,
159     CCU_MOD_CLK_R_MAD_SRAM,
160     CCU_MOD_CLK_R_MAD_CFG,
161 
162     CCU_MOD_CLK_R_AC_ADC,
163     CCU_MOD_CLK_R_AC_DAC,
164     CCU_MOD_CLK_R_AUDIO_CODEC,
165     CCU_MOD_CLK_R_DMIC,
166     CCU_MOD_CLK_R_I2S0,
167     CCU_MOD_CLK_R_I2S0_ASRC,
168     CCU_MOD_CLK_R_I2S1,
169 
170     CCU_MOD_CLK_VDD_SYS,
171     CCU_MOD_CLK_CCI400,
172     CCU_MOD_CLK_PSI,
173     CCU_MOD_CLK_AHB3,
174     CCU_MOD_CLK_AHBS,
175     CCU_MOD_CLK_APBS1,
176     CCU_MOD_CLK_APBS2,
177     CCU_MOD_CLK_R_RTC,
178     CCU_MOD_CLK_R_CPUSCFG,
179     CCU_MOD_CLK_R_PRCM,
180     CCU_MOD_CLK_R_WDG,
181     CCU_MOD_CLK_R_TWD,
182     CCU_MOD_CLK_R_PWM,
183     CCU_MOD_CLK_R_SPI,
184     CCU_MOD_CLK_R_INTC,
185     CCU_MOD_CLK_CPU_APB,
186 } ccu_mod_clk_e;
187 
188 /* the power control modules */
189 typedef enum power_control_module {
190     /* cpux power controls */
191     PWRCTL_C0CPUX,
192     PWRCTL_C0CPU0,
193     PWRCTL_C0CPU1,
194     PWRCTL_C0CPU2,
195     PWRCTL_C0CPU3,
196 
197     PWRCTL_C1CPUX,
198     PWRCTL_C1CPU0,
199     PWRCTL_C1CPU1,
200     PWRCTL_C1CPU2,
201     PWRCTL_C1CPU3,
202 
203     /* vdd-sys power controls */
204     PWRCTL_VDD_CPUX_GPIO_PAD_HOLD,
205     PWRCTL_VDD_CPUS,
206     PWRCTL_VDD_AVCC_A,
207     PWRCTL_VCC_PLL,
208     PWRCTL_VCC_PLL_LOW_VOLT,
209 
210     /* gpu power control */
211     PWRCTL_GPU,
212     PWRCTL_SYS2VDD_USB3,
213     PWRCTL_SYS2VDD_USB0,
214 } power_control_module_e;
215 
216 /*
217 *********************************************************************************************************
218 *                                       INITIALIZE CCU
219 *
220 * Description:  initialize clock control unit.
221 *
222 * Arguments  :  none.
223 *
224 * Returns    :  OK if initialize ccu succeeded, others if failed.
225 *********************************************************************************************************
226 */
227 s32 ccu_init(void);
228 
229 /*
230 *********************************************************************************************************
231 *                                       EXIT CCU
232 *
233 * Description:  exit clock control unit.
234 *
235 * Arguments  :  none.
236 *
237 * Returns    :  OK if exit ccu succeeded, others if failed.
238 *********************************************************************************************************
239 */
240 s32 ccu_exit(void);
241 
242 
243 void ccu_iosc_freq_update(void);
244 /*
245 *********************************************************************************************************
246 *                                      SET SOURCE FREQUENCY
247 *
248 * Description:  set the frequency of a specific source clock.
249 *
250 * Arguments  :  sclk : the source clock ID which we want to set frequency.
251 *               freq : the frequency which we want to set.
252 *
253 * Returns    :  OK if set source frequency succeeded, others if failed.
254 *********************************************************************************************************
255 */
256 s32 ccu_set_sclk_freq(u32 sclk, u32 freq);
257 
258 /*
259 *********************************************************************************************************
260 *                                     GET SOURCE FREQUENCY
261 *
262 * Description:  get the frequency of a specific source clock.
263 *
264 * Arguments  :  sclk : the source clock ID which we want to get frequency.
265 *
266 * Returns    :  frequency of the specific source clock.
267 *********************************************************************************************************
268 */
269 u32 ccu_get_sclk_freq(u32 sclk);
270 
271 s32 ccu_set_sclk_onoff(u32 sclk, s32 onoff);
272 
273 /*
274 *********************************************************************************************************
275 *                                     REGISTER MODULE CB
276 *
277 * Description:  register call-back for module clock, when the source frequency
278 *               of the module clock changed, it will use this call-back to notify
279 *               module driver.
280 *
281 * Arguments  :  mclk    : the module clock ID which we want to register call-back.
282 *               pcb     : the call-back which we want to register.
283 *
284 * Returns    :  OK if register call-back succeeded, others if failed.
285 *********************************************************************************************************
286 */
287 s32 ccu_reg_mclk_cb(u32 mclk, __pNotifier_t pcb);
288 
289 /*
290 *********************************************************************************************************
291 *                                     UNREGISTER MODULE CB
292 *
293 * Description:  unregister call-back for module clock.
294 *
295 * Arguments  :  mclk    : the module clock ID which we want to unregister call-back.
296 *               pcb     : the call-back which we want to unregister.
297 *
298 * Returns    :  OK if unregister call-back succeeded, others if failed.
299 *********************************************************************************************************
300 */
301 s32 ccu_unreg_mclk_cb(u32 mclk, __pNotifier_t pcb);
302 
303 /*
304 *********************************************************************************************************
305 *                                    SET SOURCE OF MODULE CLOCK
306 *
307 * Description:  set the source of a specific module clock.
308 *
309 * Arguments  :  mclk    : the module clock ID which we want to set source.
310 *               sclk    : the source clock ID whick we want to set as source.
311 *
312 * Returns    :  OK if set source succeeded, others if failed.
313 *********************************************************************************************************
314 */
315 s32 ccu_set_mclk_src(u32 mclk, u32 sclk);
316 
317 /*
318 *********************************************************************************************************
319 *                                    GET SOURCE OF MODULE CLOCK
320 *
321 * Description:  get the source of a specific module clock.
322 *
323 * Arguments  :  mclk    : the module clock ID which we want to get source.
324 *
325 * Returns    :  the source clock ID of source clock.
326 *********************************************************************************************************
327 */
328 s32 ccu_get_mclk_src(u32 mclk);
329 
330 /*
331 *********************************************************************************************************
332 *                                    SET DIVIDER OF MODULE CLOCK
333 *
334 * Description:  set the divider of a specific module clock.
335 *
336 * Arguments  :  mclk    : the module clock ID which we want to set divider.
337 *               div     : the divider whick we want to set as source.
338 *
339 * Returns    :  OK if set divider succeeded, others if failed.
340 *********************************************************************************************************
341 */
342 s32 ccu_set_mclk_div(u32 mclk, u32 div);
343 
344 /*
345 *********************************************************************************************************
346 *                                    GET DIVIDER OF MODULE CLOCK
347 *
348 * Description:  get the divider of a specific module clock.
349 *
350 * Arguments  :  mclk    : the module clock ID which we want to get divider.
351 *
352 * Returns    :  the divider of the specific module clock.
353 *********************************************************************************************************
354 */
355 s32 ccu_get_mclk_div(u32 mclk);
356 
357 /*
358 *********************************************************************************************************
359 *                                    SET ON-OFF STATUS OF MODULE CLOCK
360 *
361 * Description:  set the on-off status of a specific module clock.
362 *
363 * Arguments  :  mclk    : the module clock ID which we want to set on-off status.
364 *               onoff   : the on-off status which we want to set, the detail please
365 *                         refer to the clock status of on-off.
366 *
367 * Returns    :  OK if set module clock on-off status succeeded, others if failed.
368 *********************************************************************************************************
369 */
370 s32 ccu_set_mclk_onoff(u32 mclk, s32 onoff);
371 
372 /*
373 *********************************************************************************************************
374 *                                    SET RESET STATUS OF MODULE CLOCK
375 *
376 * Description:  set the reset status of a specific module clock.
377 *
378 * Arguments  :  mclk    : the module clock ID which we want to set reset status.
379 *               reset   : the reset status which we want to set, the detail please
380 *                         refer to the clock status of reset.
381 *
382 * Returns    :  OK if set module clock reset status succeeded, others if failed.
383 *********************************************************************************************************
384 */
385 s32 ccu_set_mclk_reset(u32 mclk, s32 reset);
386 
387 /*
388 *********************************************************************************************************
389 *                                    SET POWER OFF STATUS OF HWMODULE
390 *
391 * Description:  set the power off gating status of a specific module.
392 *
393 * Arguments  :  module  : the module ID which we want to set power off gating status.
394 *               status  : the power off status which we want to set, the detail please
395 *                         refer to the status of power-off gating.
396 *
397 * Returns    :  OK if set module power off gating status succeeded, others if failed.
398 *********************************************************************************************************
399 */
400 s32 ccu_set_poweroff_gating_state(s32 module, s32 state);
401 
402 /*
403 *********************************************************************************************************
404 *                                           RESET MODULE
405 *
406 * Description:  reset a specific module.
407 *
408 * Arguments  :  module  : the module clock ID which we want to reset.
409 *
410 * Returns    :  OK if reset module succeeded, others if failed.
411 *********************************************************************************************************
412 */
413 s32 ccu_reset_module(u32 mclk);
414 
415 s32 ccu_24mhosc_disable(void);
416 s32 ccu_24mhosc_enable(void);
417 s32 ccu_24mhosc_reg_cb(__pNotifier_t pcb);
418 s32 is_hosc_lock(void);
419 
save_state_flag(u32 value)420 static inline void save_state_flag(u32 value)
421 {
422 //  hal_writel(value, RTC_RECORD_REG);
423 }
424 
425 extern u32 iosc_freq;
426 extern u32 losc_freq;
427 void osc_freq_init(void);
428 void osc_freq_filter(void);
429 
430 #endif /* __PRCM_H__ */
431 
432