1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2023-01-11 luobeihai first version 9 */ 10 11 #ifndef __BOARD_H__ 12 #define __BOARD_H__ 13 14 #include <rtthread.h> 15 #include <apm32f0xx.h> 16 17 #include "apm32f0xx_gpio.h" 18 #include "apm32f0xx_syscfg.h" 19 #include "apm32f0xx_rcm.h" 20 #include "apm32f0xx_misc.h" 21 #include "apm32f0xx_eint.h" 22 #include "apm32f0xx_usart.h" 23 24 #if defined(RT_USING_ADC) 25 #include "apm32f0xx_adc.h" 26 #endif 27 #if defined(RT_USING_DAC) 28 #include "apm32f0xx_dac.h" 29 #endif 30 #if defined(RT_USING_RTC) 31 #include "apm32f0xx_rtc.h" 32 #include "apm32f0xx_pmu.h" 33 #endif 34 #if defined(RT_USING_SPI) 35 #include "apm32f0xx_spi.h" 36 #endif 37 #if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) 38 #include "apm32f0xx_tmr.h" 39 #endif 40 #if defined(RT_USING_WDT) 41 #include "apm32f0xx_iwdt.h" 42 #include "apm32f0xx_wwdt.h" 43 #endif 44 45 #include "drv_common.h" 46 #include "drv_gpio.h" 47 48 #ifdef __cplusplus 49 extern "C" { 50 #endif 51 52 #define APM32_FLASH_START_ADRESS ((uint32_t)0x08000000) 53 #define APM32_FLASH_SIZE (64 * 1024) 54 #define APM32_FLASH_END_ADDRESS ((uint32_t)(APM32_FLASH_START_ADRESS + APM32_FLASH_SIZE)) 55 56 /* Internal SRAM memory size[Kbytes] <4-8>, Default: 8 */ 57 #define APM32_SRAM_SIZE 8 58 #define APM32_SRAM_END (0x20000000 + APM32_SRAM_SIZE * 1024) 59 60 #if defined(__ARMCC_VERSION) 61 extern int Image$$RW_IRAM1$$ZI$$Limit; 62 #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) 63 #elif __ICCARM__ 64 #pragma section="CSTACK" 65 #define HEAP_BEGIN (__segment_end("CSTACK")) 66 #else 67 extern int __bss_end; 68 #define HEAP_BEGIN ((void *)&__bss_end) 69 #endif 70 71 #define HEAP_END APM32_SRAM_END 72 73 void SystemClock_Config(void); 74 75 void apm32_usart_init(void); 76 77 #ifdef __cplusplus 78 } 79 #endif 80 81 #endif /* __BOARD_H__ */ 82