1 /*
2  * Copyright (c) 2006-2023, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author         Notes
8  * 2023-01-10     luobeihai      first version
9  */
10 
11 #ifndef __BOARD_H__
12 #define __BOARD_H__
13 
14 #include <rtthread.h>
15 #include <apm32f4xx.h>
16 
17 #include "apm32f4xx_gpio.h"
18 #include "apm32f4xx_syscfg.h"
19 #include "apm32f4xx_rcm.h"
20 #include "apm32f4xx_misc.h"
21 #include "apm32f4xx_rcm.h"
22 #include "apm32f4xx_eint.h"
23 #include "apm32f4xx_usart.h"
24 #include "apm32f4xx_dma.h"
25 
26 #if defined(RT_USING_ADC)
27     #include "apm32f4xx_adc.h"
28 #endif
29 #if defined(RT_USING_DAC)
30     #include "apm32f4xx_dac.h"
31 #endif
32 #if defined(RT_USING_RTC)
33     #include "apm32f4xx_rtc.h"
34     #include "apm32f4xx_pmu.h"
35 #endif
36 #if defined(RT_USING_SPI)
37     #include "apm32f4xx_spi.h"
38 #endif
39 #if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM)
40     #include "apm32f4xx_tmr.h"
41 #endif
42 #if defined(RT_USING_WDT)
43     #include "apm32f4xx_iwdt.h"
44     #include "apm32f4xx_wwdt.h"
45 #endif
46 #if defined(BSP_USING_ETH)
47     #include "apm32f4xx_eth.h"
48 #endif
49 #if defined(BSP_USING_SDCARD)
50     #include "apm32f4xx_sdio.h"
51 #endif
52 #if defined(BSP_USING_ON_CHIP_FLASH)
53     #include "apm32f4xx_fmc.h"
54 #endif
55 #if defined(RT_USING_CAN)
56     #include "apm32f4xx_can.h"
57 #endif
58 #if defined(BSP_USING_SDRAM)
59     #include "apm32f4xx_dmc.h"
60 #endif
61 
62 #include "drv_common.h"
63 #include "drv_gpio.h"
64 
65 #ifdef __cplusplus
66 extern "C" {
67 #endif
68 
69 #define APM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
70 #define APM32_FLASH_SIZE             (1024 * 1024)
71 #define APM32_FLASH_END_ADDRESS      ((uint32_t)(APM32_FLASH_START_ADRESS + APM32_FLASH_SIZE))
72 
73 /* Internal SRAM memory size[Kbytes] <6-128>, Default: 128 */
74 #define APM32_SRAM_SIZE      128
75 #define APM32_SRAM_END       (0x20000000 + APM32_SRAM_SIZE * 1024)
76 
77 #if defined(__ARMCC_VERSION)
78 extern int Image$$RW_IRAM1$$ZI$$Limit;
79 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
80 #elif __ICCARM__
81 #pragma section="CSTACK"
82 #define HEAP_BEGIN      (__segment_end("CSTACK"))
83 #else
84 extern int __bss_end;
85 #define HEAP_BEGIN      ((void *)&__bss_end)
86 #endif
87 
88 #define HEAP_END        APM32_SRAM_END
89 
90 void SystemClock_Config(void);
91 
92 void apm32_usart_init(void);
93 
94 #ifdef __cplusplus
95 }
96 #endif
97 
98 #endif /* __BOARD_H__ */
99