1 /*! 2 * @file apm32e10x_spi.h 3 * 4 * @brief This file contains all the functions prototypes for the SPI firmware library 5 * 6 * @version V1.0.2 7 * 8 * @date 2022-12-31 9 * 10 * @attention 11 * 12 * Copyright (C) 2021-2023 Geehy Semiconductor 13 * 14 * You may not use this file except in compliance with the 15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16 * 17 * The program is only for reference, which is distributed in the hope 18 * that it will be useful and instructional for customers to develop 19 * their software. Unless required by applicable law or agreed to in 20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23 * and limitations under the License. 24 */ 25 26 /* Define to prevent recursive inclusion */ 27 #ifndef __APM32E10X_SPI_H 28 #define __APM32E10X_SPI_H 29 30 /* Includes */ 31 #include "apm32e10x.h" 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /** @addtogroup APM32E10x_StdPeriphDriver 38 @{ 39 */ 40 41 /** @addtogroup SPI_Driver 42 @{ 43 */ 44 45 /** @defgroup SPI_Enumerations Enumerations 46 @{ 47 */ 48 49 /** 50 * @brief SPI data direction mode 51 */ 52 typedef enum 53 { 54 SPI_DIRECTION_2LINES_FULLDUPLEX = 0x0000, 55 SPI_DIRECTION_2LINES_RXONLY = 0x0400, 56 SPI_DIRECTION_1LINE_RX = 0x8000, 57 SPI_DIRECTION_1LINE_TX = 0xC000 58 }SPI_DIRECTION_T; 59 60 /** 61 * @brief SPI mode 62 */ 63 typedef enum 64 { 65 SPI_MODE_MASTER = 0x0104, 66 SPI_MODE_SLAVE = 0x0000 67 }SPI_MODE_T; 68 69 /** 70 * @brief SPI Data length 71 */ 72 typedef enum 73 { 74 SPI_DATA_LENGTH_16B = 0x0800, 75 SPI_DATA_LENGTH_8B = 0x0000 76 }SPI_DATA_LENGTH_T; 77 78 /** 79 * @brief SPI Clock Polarity 80 */ 81 typedef enum 82 { 83 SPI_CLKPOL_LOW = 0x0000, 84 SPI_CLKPOL_HIGH = 0x0002 85 }SPI_CLKPOL_T; 86 87 /** 88 * @brief SPI Clock Phase 89 */ 90 typedef enum 91 { 92 SPI_CLKPHA_1EDGE = 0x0000, 93 SPI_CLKPHA_2EDGE = 0x0001 94 }SPI_CLKPHA_T; 95 96 /** 97 * @brief SPI Slave Select management 98 */ 99 typedef enum 100 { 101 SPI_NSS_SOFT = 0x0200, 102 SPI_NSS_HARD = 0x0000 103 }SPI_NSS_T; 104 105 /** 106 * @brief SPI BaudRate Prescaler 107 */ 108 typedef enum 109 { 110 SPI_BAUDRATE_DIV_2 = 0x0000, 111 SPI_BAUDRATE_DIV_4 = 0x0008, 112 SPI_BAUDRATE_DIV_8 = 0x0010, 113 SPI_BAUDRATE_DIV_16 = 0x0018, 114 SPI_BAUDRATE_DIV_32 = 0x0020, 115 SPI_BAUDRATE_DIV_64 = 0x0028, 116 SPI_BAUDRATE_DIV_128 = 0x0030, 117 SPI_BAUDRATE_DIV_256 = 0x0038 118 }SPI_BAUDRATE_DIV_T; 119 120 /** 121 * @brief SPI MSB LSB transmission 122 */ 123 typedef enum 124 { 125 SPI_FIRSTBIT_MSB = 0x0000, 126 SPI_FIRSTBIT_LSB = 0x0080 127 }SPI_FIRSTBIT_T; 128 129 /** 130 * @brief I2S Mode 131 */ 132 typedef enum 133 { 134 I2S_MODE_SLAVE_TX = 0x0000, 135 I2S_MODE_SLAVE_RX = 0x0100, 136 I2S_MODE_MASTER_TX = 0x0200, 137 I2S_MODE_MASTER_RX = 0x0300 138 }I2S_MODE_T; 139 140 /** 141 * @brief I2S Standard 142 */ 143 typedef enum 144 { 145 I2S_STANDARD_PHILLIPS = 0x0000, 146 I2S_STANDARD_MSB = 0x0010, 147 I2S_STANDARD_LSB = 0x0020, 148 I2S_STANDARD_PCMSHORT = 0x0030, 149 I2S_STANDARD_PCMLONG = 0x00B0 150 }I2S_STANDARD_T; 151 152 /** 153 * @brief I2S data length 154 */ 155 typedef enum 156 { 157 I2S_DATA_LENGHT_16B = 0x0000, 158 I2S_DATA_LENGHT_16BEX = 0x0001, 159 I2S_DATA_LENGHT_24B = 0x0003, 160 I2S_DATA_LENGHT_32B = 0x0005 161 } I2S_DATA_LENGTH_T; 162 163 /** 164 * @brief I2S_MCLK_Output 165 */ 166 typedef enum 167 { 168 I2S_MCLK_OUTPUT_DISABLE = 0x0000, 169 I2S_MCLK_OUTPUT_ENABLE = 0x0200 170 }I2S_MCLK_OUTPUT_T; 171 172 /** 173 * @brief I2S Audio divider 174 */ 175 typedef enum 176 { 177 I2S_AUDIO_DIV_192K = 192000, 178 I2S_AUDIO_DIV_96K = 96000, 179 I2S_AUDIO_DIV_48K = 48000, 180 I2S_AUDIO_DIV_44K = 44100, 181 I2S_AUDIO_DIV_32K = 32000, 182 I2S_AUDIO_DIV_22K = 22050, 183 I2S_AUDIO_DIV_16K = 16000, 184 I2S_AUDIO_DIV_11K = 11025, 185 I2S_AUDIO_DIV_8K = 8000, 186 I2S_AUDIO_DIV_DEFAULT = 2 187 }I2S_AUDIO_DIV_T; 188 189 /** 190 * @brief I2S Clock Polarity 191 */ 192 typedef enum 193 { 194 I2S_CLKPOL_LOW = 0x0000, 195 I2S_CLKPOL_HIGH = 0x0008 196 }I2S_CLKPOL_T; 197 198 /** 199 * @brief SPI Direction select 200 */ 201 typedef enum 202 { 203 SPI_DIRECTION_RX = 0xBFFF, 204 SPI_DIRECTION_TX = 0x4000 205 }SPI_DIRECTION_SELECT_T; 206 207 /** 208 * @brief SPI interrupts definition 209 */ 210 typedef enum 211 { 212 SPI_I2S_INT_TXBE = 0x8002, 213 SPI_I2S_INT_RXBNE = 0x4001, 214 SPI_I2S_INT_ERR = 0x2000, 215 SPI_I2S_INT_OVR = 0x2040, 216 SPI_INT_CRCE = 0x2010, 217 SPI_INT_ME = 0x2020, 218 I2S_INT_UDR = 0x2008 219 }SPI_I2S_INT_T; 220 221 /** 222 * @brief SPI flags definition 223 */ 224 typedef enum 225 { 226 SPI_FLAG_RXBNE = 0x0001, 227 SPI_FLAG_TXBE = 0x0002, 228 I2S_FLAG_SCHDIR = 0x0004, 229 I2S_FLAG_UDR = 0x0008, 230 SPI_FLAG_CRCE = 0x0010, 231 SPI_FLAG_ME = 0x0020, 232 SPI_FLAG_OVR = 0x0040, 233 SPI_FLAG_BSY = 0x0080 234 }SPI_FLAG_T; 235 236 /** 237 * @brief SPI I2S DMA requests 238 */ 239 typedef enum 240 { 241 SPI_I2S_DMA_REQ_TX = 0x0002, 242 SPI_I2S_DMA_REQ_RX = 0x0001 243 }SPI_I2S_DMA_REQ_T; 244 245 /**@} end of group SPI_Enumerations */ 246 247 248 /** @addtogroup SPI_Structures Structures 249 @{ 250 */ 251 252 /** 253 * @brief SPI Config structure definition 254 */ 255 typedef struct 256 { 257 SPI_MODE_T mode; 258 SPI_DATA_LENGTH_T length; 259 SPI_CLKPHA_T phase; 260 SPI_CLKPOL_T polarity; 261 SPI_NSS_T nss; 262 SPI_FIRSTBIT_T firstBit; 263 SPI_DIRECTION_T direction; 264 SPI_BAUDRATE_DIV_T baudrateDiv; 265 uint16_t crcPolynomial; 266 }SPI_Config_T; 267 268 /** 269 * @brief I2S Config structure definition 270 */ 271 typedef struct 272 { 273 I2S_MODE_T mode; 274 I2S_STANDARD_T standard; 275 I2S_DATA_LENGTH_T length; 276 I2S_MCLK_OUTPUT_T MCLKOutput; 277 I2S_AUDIO_DIV_T audioDiv; 278 I2S_CLKPOL_T polarity; 279 }I2S_Config_T; 280 281 /**@} end of group SPI_Structures */ 282 283 /** @defgroup SPI_Functions Functions 284 @{ 285 */ 286 287 /* Reset and Configuration */ 288 void SPI_I2S_Reset(SPI_T* spi); 289 void SPI_Config(SPI_T* spi, SPI_Config_T* spiConfig); 290 void I2S_Config(SPI_T* spi, I2S_Config_T* i2sConfig); 291 void SPI_ConfigStructInit(SPI_Config_T* spiConfig); 292 void I2S_ConfigStructInit(I2S_Config_T* i2sConfig); 293 void SPI_Enable(SPI_T* spi); 294 void SPI_Disable(SPI_T* spi); 295 void I2S_Enable(SPI_T* spi); 296 void I2S_Disable(SPI_T* spi); 297 298 void SPI_I2S_TxData(SPI_T* spi, uint16_t data); 299 uint16_t SPI_I2S_RxData(SPI_T* spi); 300 void SPI_SetSoftwareNSS(SPI_T* spi); 301 void SPI_ResetSoftwareNSS(SPI_T* spi); 302 void SPI_EnableSSOutput(SPI_T* spi); 303 void SPI_DisableSSOutput(SPI_T* spi); 304 void SPI_ConfigDataSize(SPI_T* spi, SPI_DATA_LENGTH_T length); 305 306 /* DMA */ 307 void SPI_I2S_EnableDMA(SPI_T* spi, SPI_I2S_DMA_REQ_T dmaReq); 308 void SPI_I2S_DisableDMA(SPI_T* spi, SPI_I2S_DMA_REQ_T dmaReq); 309 310 /* CRC */ 311 void SPI_TxCRC(SPI_T* spi); 312 void SPI_EnableCRC(SPI_T* spi); 313 void SPI_DisableCRC(SPI_T* spi); 314 uint16_t SPI_ReadTxCRC(SPI_T* spi); 315 uint16_t SPI_ReadRxCRC(SPI_T* spi); 316 uint16_t SPI_ReadCRCPolynomial(SPI_T* spi); 317 void SPI_ConfigBiDirectionalLine(SPI_T* spi, SPI_DIRECTION_SELECT_T direction); 318 319 /* Interrupts and flag */ 320 void SPI_I2S_EnableInterrupt(SPI_T* spi, SPI_I2S_INT_T interrupt); 321 void SPI_I2S_DisableInterrupt(SPI_T* spi, SPI_I2S_INT_T interrupt); 322 uint8_t SPI_I2S_ReadStatusFlag(SPI_T* spi, SPI_FLAG_T flag); 323 void SPI_I2S_ClearStatusFlag(SPI_T* spi, SPI_FLAG_T flag); 324 uint8_t SPI_I2S_ReadIntFlag(SPI_T* spi, SPI_I2S_INT_T flag); 325 void SPI_I2S_ClearIntFlag(SPI_T* spi, SPI_I2S_INT_T flag); 326 327 /**@} end of group SPI_Functions*/ 328 /**@} end of group SPI_Driver*/ 329 /**@} end of group APM32E10x_StdPeriphDriver*/ 330 331 #ifdef __cplusplus 332 } 333 #endif 334 335 #endif /* __APM32E10X_SPI_H */ 336