1 /*! 2 * @file apm32f0xx_dac.h 3 * 4 * @brief This file contains all the functions prototypes for the DAC firmware library 5 * 6 * @note It's only for APM32F051,APM32F072,APM32F091 devices 7 * 8 * @version V1.0.3 9 * 10 * @date 2022-02-21 11 * 12 * @attention 13 * 14 * Copyright (C) 2020-2022 Geehy Semiconductor 15 * 16 * You may not use this file except in compliance with the 17 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 18 * 19 * The program is only for reference, which is distributed in the hope 20 * that it will be useful and instructional for customers to develop 21 * their software. Unless required by applicable law or agreed to in 22 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 23 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 24 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 25 * and limitations under the License. 26 */ 27 28 /* Define to prevent recursive inclusion */ 29 #ifndef __APM32F0XX_DAC_H 30 #define __APM32F0XX_DAC_H 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* Includes */ 37 #include "apm32f0xx.h" 38 39 /** @addtogroup APM32F0xx_StdPeriphDriver 40 @{ 41 */ 42 43 /** @addtogroup DAC_Driver DAC Driver 44 @{ 45 */ 46 47 /** @defgroup DAC_Macros Macros 48 @{ 49 */ 50 51 /* Macros description */ 52 #define CTRL_CLEAR_MASK ((uint32_t)0x00000FFE) /*!< DAC CTRL register clear mask */ 53 #define DUAL_SWTRIG_SET ((uint32_t)0x00000003) /*!< Enable software trigger for DAC's Channel1 and Channel2 */ 54 #define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC) /*!< Disable software trigger for DAC's Channel1 and Channel2 */ 55 #define DH12RCH1_OFFSET ((uint32_t)0x00000008) /*!< DAC channel1 data holding register address offset */ 56 #define DH12RCH2_OFFSET ((uint32_t)0x00000014) /*!< DAC channel2 data holding register address offset */ 57 #define DH12RD_OFFSET ((uint32_t)0x00000020) /*!< DAC dual channel data holding register address offset */ 58 #define DATOUT_OFFSET ((uint32_t)0x0000002C) /*!< DAC data output register address offset */ 59 60 /**@} end of group DAC_Macros*/ 61 62 /** @defgroup DAC_Enumerations Enumerations 63 @{ 64 */ 65 66 /** 67 * @brief DAC_Trigger 68 */ 69 typedef enum 70 { 71 DAC_TRIGGER_NONE = ((uint32_t)0x00000000), /*!< None DAC Trigger */ 72 DAC_TRIGGER_T2_TRGO = ((uint32_t)0x00000024), /*!< Timer 2 TRGO event */ 73 DAC_TRIGGER_T3_TRGO = ((uint32_t)0x0000000C), /*!< Timer 3 TRGO event */ 74 DAC_TRIGGER_T6_TRGO = ((uint32_t)0x00000004), /*!< Timer 6 TRGO event */ 75 DAC_TRIGGER_T7_TRGO = ((uint32_t)0x00000014), /*!< Timer 7 TRGO event, applicable only for APM32F072 devices */ 76 DAC_TRIGGER_T15_TRGO = ((uint32_t)0x0000001C), /*!< Timer 15 TRGO event */ 77 DAC_TRIGGER_EINT_IT9 = ((uint32_t)0x00000034), /*!< EINT line9 */ 78 DAC_TRIGGER_SOFTWARE = ((uint32_t)0x0000003C) /*!< Software trigger */ 79 } DAC_TRIGGER_T; 80 81 /** 82 * @brief DAC_wave_generation, only applicable for APM32F072 devices 83 */ 84 85 typedef enum 86 { 87 DAC_WAVE_GENERATION_NONE = ((uint32_t)0x00000000), /*!< Wave generation disabled */ 88 DAC_WAVE_GENERATION_NOISE = ((uint32_t)0x00000040), /*!< Noise wave generation enabled */ 89 DAC_WAVE_GENERATION_TRIANGLE = ((uint32_t)0x00000080) /*!< Triangle wave generation enabled */ 90 } DAC_WAVE_GENERATION_T; 91 92 /** 93 * @brief DAC channelx mask/amplitude selector, only applicable for APM32F072 devices 94 */ 95 typedef enum 96 { 97 DAC_LFSRUNAMASK_BIT0 = ((uint32_t)0x00000000), /*!< Unmask bit0 of LFSR/ triangle amplitude equal to 1 */ 98 DAC_LFSRUNAMASK_BITS1_0 = ((uint32_t)0x00000100), /*!< Unmask bits[1:0] of LFSR to 3 */ 99 DAC_LFSRUNAMASK_BITS2_0 = ((uint32_t)0x00000200), /*!< Unmask bits[2:0] of LFSR to 7 */ 100 DAC_LFSRUNAMASK_BITS3_0 = ((uint32_t)0x00000300), /*!< Unmask bits[3:0] of LFSR to 15 */ 101 DAC_LFSRUNAMASK_BITS4_0 = ((uint32_t)0x00000400), /*!< Unmask bits[4:0] of LFSR to 31 */ 102 DAC_LFSRUNAMASK_BITS5_0 = ((uint32_t)0x00000500), /*!< Unmask bits[5:0] of LFSR to 63 */ 103 DAC_LFSRUNAMASK_BITS6_0 = ((uint32_t)0x00000600), /*!< Unmask bits[6:0] of LFSR to 127 */ 104 DAC_LFSRUNAMASK_BITS7_0 = ((uint32_t)0x00000700), /*!< Unmask bits[7:0] of LFSR to 255 */ 105 DAC_LFSRUNAMASK_BITS8_0 = ((uint32_t)0x00000800), /*!< Unmask bits[8:0] of LFSR to 511 */ 106 DAC_LFSRUNAMASK_BITS9_0 = ((uint32_t)0x00000900), /*!< Unmask bits[9:0] of LFSR to 1023 */ 107 DAC_LFSRUNAMASK_BITS10_0 = ((uint32_t)0x00000A00), /*!< Unmask bits[10:0] of LFS to 2047 */ 108 DAC_LFSRUNAMASK_BITS11_0 = ((uint32_t)0x00000B00), /*!< Unmask bits[11:0] of LFS to 4095 */ 109 DAC_TRIANGLEAMPLITUDE_1 = ((uint32_t)0x00000000), /*!< Select max triangle amplitude of 1 */ 110 DAC_TRIANGLEAMPLITUDE_3 = ((uint32_t)0x00000100), /*!< Select max triangle amplitude of 3 */ 111 DAC_TRIANGLEAMPLITUDE_7 = ((uint32_t)0x00000200), /*!< Select max triangle amplitude of 7 */ 112 DAC_TRIANGLEAMPLITUDE_15 = ((uint32_t)0x00000300), /*!< Select max triangle amplitude of 15 */ 113 DAC_TRIANGLEAMPLITUDE_31 = ((uint32_t)0x00000400), /*!< Select max triangle amplitude of 31 */ 114 DAC_TRIANGLEAMPLITUDE_63 = ((uint32_t)0x00000500), /*!< Select max triangle amplitude of 63 */ 115 DAC_TRIANGLEAMPLITUDE_127 = ((uint32_t)0x00000600), /*!< Select max triangle amplitude of 127 */ 116 DAC_TRIANGLEAMPLITUDE_255 = ((uint32_t)0x00000700), /*!< Select max triangle amplitude of 255 */ 117 DAC_TRIANGLEAMPLITUDE_511 = ((uint32_t)0x00000800), /*!< Select max triangle amplitude of 511 */ 118 DAC_TRIANGLEAMPLITUDE_1023 = ((uint32_t)0x00000900), /*!< Select max triangle amplitude of 1023 */ 119 DAC_TRIANGLEAMPLITUDE_2047 = ((uint32_t)0x00000A00), /*!< Select max triangle amplitude of 2047 */ 120 DAC_TRIANGLEAMPLITUDE_4095 = ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */ 121 } DAC_MASK_AMPLITUDE_SEL_T; 122 123 /** 124 * @brief DAC_OutputBuffer 125 */ 126 typedef enum 127 { 128 DAC_OUTPUTBUFF_ENABLE = ((uint32_t)0x00000000), /*!< DAC channel1 output buffer enabledDAC channel1 output buffer disabled */ 129 DAC_OUTPUTBUFF_DISABLE = ((uint32_t)0x00000002) /*!< DAC channel1 output buffer enabledDAC channel1 output buffer disabled */ 130 } DAC_OUTPUTBUFF_T; 131 132 /** 133 * @brief DAC_Channel_selection 134 */ 135 typedef enum 136 { 137 DAC_CHANNEL_1 = ((uint32_t)0x00000000), /*!< DAC channel1 */ 138 DAC_CHANNEL_2 = ((uint32_t)0x00000010) /*!< DAC channel2 */ 139 } DAC_CHANNEL_T; 140 141 /** 142 * @brief DAC_data_alignment 143 */ 144 typedef enum 145 { 146 DAC_ALIGN_12B_R = ((uint32_t)0x00000000), /*!< DAC 12-bit right-aligned data */ 147 DAC_ALIGN_12B_L = ((uint32_t)0x00000004), /*!< DAC 12-bit left-aligned data */ 148 DAC_ALIGN_8B_R = ((uint32_t)0x00000008) /*!< DAC 8-bit right-aligned data */ 149 } DAC_DATA_ALIGN_T; 150 151 /** 152 * @brief DAC_interrupts_definition 153 */ 154 typedef enum 155 { 156 DAC_INT_CH1_DMAUDR = ((uint32_t)0x00002000), /*!< DAC channel1 DMA Underrun Interrupt */ 157 DAC_INT_CH2_DMAUDR = ((uint32_t)0x20000000) /*!< DAC channel2 DMA Underrun Interrupt */ 158 } DAC_INT_T; 159 160 /** 161 * @brief DAC_flags_definition 162 */ 163 typedef enum 164 { 165 DAC_FLAG_CH1_DMAUDR = ((uint32_t)0x00002000), /*!< DAC channel1 DMA Underrun Flag */ 166 DAC_FLAG_CH2_DMAUDR = ((uint32_t)0x20000000) /*!< DAC channel2 DMA Underrun Flag */ 167 } DAC_FLAG_T; 168 169 /**@} end of group DAC_Enumerations */ 170 171 /** @defgroup DAC_Structures Structures 172 @{ 173 */ 174 175 /** 176 * @brief DAC Config structure definition 177 */ 178 typedef struct 179 { 180 DAC_TRIGGER_T trigger; /*!< DAC trigger selection */ 181 DAC_OUTPUTBUFF_T outputBuff; /*!< DAC output buffer disable */ 182 DAC_WAVE_GENERATION_T waveGeneration; /*!< DAC noise/triangle wave generation selection */ 183 DAC_MASK_AMPLITUDE_SEL_T maskAmplitudeSelect; /*!< DAC mask/amplitude selector */ 184 } DAC_Config_T; 185 186 /**@} end of group DAC_Structures */ 187 188 /** @defgroup DAC_Variables Variables 189 @{ 190 */ 191 192 /**@} end of group DAC_Variables */ 193 194 /** @defgroup DAC_Functions Functions 195 @{ 196 */ 197 198 /* DAC reset and configuration */ 199 void DAC_Reset(void); 200 void DAC_Config(uint32_t channel, DAC_Config_T* dacConfig); 201 void DAC_ConfigStructInit(DAC_Config_T* dacConfig); 202 void DAC_Enable(DAC_CHANNEL_T channel); 203 void DAC_Disable(DAC_CHANNEL_T channel); 204 void DAC_EnableSoftwareTrigger(DAC_CHANNEL_T channel); 205 void DAC_DisableSoftwareTrigger(DAC_CHANNEL_T channel); 206 void DAC_EnableDualSoftwareTrigger(void); /*!< Only for APM32F072 and APM32F091 devices */ 207 void DAC_DisableDualSoftwareTrigger(void); /*!< Only for APM32F072 and APM32F091 devices */ 208 void DAC_EnableWaveGeneration(DAC_CHANNEL_T channel, DAC_WAVE_GENERATION_T wave); /*!< Only for APM32F072 and APM32F091 devices */ 209 void DAC_DisableWaveGeneration(DAC_CHANNEL_T channel, DAC_WAVE_GENERATION_T wave); /*!< Only for APM32F072 and APM32F091 devices */ 210 211 /* Read data */ 212 void DAC_ConfigChannel1Data(DAC_DATA_ALIGN_T dataAlign, uint16_t data); 213 void DAC_ConfigChannel2Data(DAC_DATA_ALIGN_T dataAlign, uint16_t data); /*!< Only for APM32F072 and APM32F091 devices */ 214 void DAC_ConfigDualChannelData(DAC_DATA_ALIGN_T dataAlign, uint16_t data2, uint16_t data1); /*!< Only for APM32F072 and APM32F091 devices */ 215 uint16_t DAC_ReadDataOutputValue(DAC_CHANNEL_T channel); 216 217 /* DMA */ 218 void DAC_EnableDMA(DAC_CHANNEL_T channel); 219 void DAC_DisableDMA(DAC_CHANNEL_T channel); 220 221 /* Interrupt and flag */ 222 void DAC_EnableInterrupt(DAC_CHANNEL_T channel); 223 void DAC_DisableInterrupt(DAC_CHANNEL_T channel); 224 uint8_t DAC_ReadStatusFlag(DAC_FLAG_T flag); 225 void DAC_ClearStatusFlag(DAC_FLAG_T flag); 226 uint8_t DAC_ReadIntFlag(DAC_INT_T intFlag); 227 void DAC_ClearIntFlag(DAC_INT_T intFlag); 228 229 #ifdef __cplusplus 230 } 231 #endif 232 233 #endif /* __APM32F0XX_DAC_H */ 234 235 /**@} end of group DAC_Functions */ 236 /**@} end of group DAC_Driver */ 237 /**@} end of group APM32F0xx_StdPeriphDriver */ 238