1 /*! 2 * @file apm32f0xx_i2c.h 3 * 4 * @brief This file contains all the functions prototypes for the I2C firmware library 5 * 6 * @version V1.0.3 7 * 8 * @date 2022-09-20 9 * 10 * @attention 11 * 12 * Copyright (C) 2020-2022 Geehy Semiconductor 13 * 14 * You may not use this file except in compliance with the 15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16 * 17 * The program is only for reference, which is distributed in the hope 18 * that it will be useful and instructional for customers to develop 19 * their software. Unless required by applicable law or agreed to in 20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23 * and limitations under the License. 24 */ 25 26 /* Define to prevent recursive inclusion */ 27 #ifndef __APM32F0XX_I2C_H 28 #define __APM32F0XX_I2C_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 /* Includes */ 35 #include "apm32f0xx.h" 36 37 /** @addtogroup APM32F0xx_StdPeriphDriver 38 @{ 39 */ 40 41 /** @addtogroup I2C_Driver 42 @{ 43 */ 44 45 /** @defgroup I2C_Macros Macros 46 @{ 47 */ 48 49 /* Slave address (master mode) */ 50 #define I2C_CTRL2_SADD ((uint32_t)0x000003FF) 51 /* Number of bytes */ 52 #define I2C_CTRL2_NUMBYT ((uint32_t)0x00FF0000) 53 /* ENDCFG,RELOADEN,STOP,START,TXDIR clear CTRL2 register Mask */ 54 #define I2C_CTRL2_MASK ((uint32_t)0x03006400) 55 56 /* I2C Register reset value */ 57 #define I2C_CTRL1_RESET_VALUE ((uint32_t)0x00) 58 #define I2C_CTRL2_RESET_VALUE ((uint32_t)0x00) 59 #define I2C_ADDR1_RESET_VALUE ((uint32_t)0x00) 60 #define I2C_ADDR2_RESET_VALUE ((uint32_t)0x00) 61 #define I2C_TIMING_RESET_VALUE ((uint32_t)0x00) 62 #define I2C_TIMEOUT_RESET_VALUE ((uint32_t)0x00) 63 #define I2C_STS_RESET_VALUE ((uint32_t)0x01) 64 #define I2C_INTFCLR_RESET_VALUE ((uint32_t)0x00) 65 #define I2C_PEC_RESET_VALUE ((uint32_t)0x00) 66 #define I2C_TXDATA_RESET_VALUE ((uint32_t)0x00) 67 #define I2C_RXDATA_RESET_VALUE ((uint32_t)0x00) 68 69 /* I2C_channels */ 70 #define I2C_Channel_TempSensor ((uint32_t)I2C_CHANNEL_16) 71 #define I2C_Channel_Vrefint ((uint32_t)I2C_CHANNEL_17) 72 73 /**@} end of group I2C_Macros */ 74 75 /** @defgroup I2C_Enumerations Enumerations 76 @{ 77 */ 78 79 /** 80 * @brief I2C Analog noise filter 81 */ 82 typedef enum 83 { 84 I2C_ANALOG_FILTER_ENABLE = ((uint8_t)0), /*!< Analog noise filter enabled */ 85 I2C_ANALOG_FILTER_DISABLE = ((uint8_t)1), /*!< Analog noise filter disabled */ 86 } I2C_ANALOG_FILTER_T; 87 88 /** 89 * @brief I2C Digital noise filter 90 */ 91 typedef enum 92 { 93 I2C_DIGITAL_FILTER_0 = ((uint8_t)0x00), /*!< Digital filter disabled */ 94 I2C_DIGITAL_FILTER_1 = ((uint8_t)0x01), /*!< Digital filter enabled and filtering capability is 1 T_i2cclk */ 95 I2C_DIGITAL_FILTER_2 = ((uint8_t)0x02), /*!< Digital filter enabled and filtering capability is 3 T_i2cclk */ 96 I2C_DIGITAL_FILTER_3 = ((uint8_t)0x03), /*!< Digital filter enabled and filtering capability is 3 T_i2cclk */ 97 I2C_DIGITAL_FILTER_4 = ((uint8_t)0x04), /*!< Digital filter enabled and filtering capability is 4 T_i2cclk */ 98 I2C_DIGITAL_FILTER_5 = ((uint8_t)0x05), /*!< Digital filter enabled and filtering capability is 5 T_i2cclk */ 99 I2C_DIGITAL_FILTER_6 = ((uint8_t)0x06), /*!< Digital filter enabled and filtering capability is 6 T_i2cclk */ 100 I2C_DIGITAL_FILTER_7 = ((uint8_t)0x07), /*!< Digital filter enabled and filtering capability is 7 T_i2cclk */ 101 I2C_DIGITAL_FILTER_8 = ((uint8_t)0x08), /*!< Digital filter enabled and filtering capability is 8 T_i2cclk */ 102 I2C_DIGITAL_FILTER_9 = ((uint8_t)0x09), /*!< Digital filter enabled and filtering capability is 9 T_i2cclk */ 103 I2C_DIGITAL_FILTER_10 = ((uint8_t)0x0A), /*!< Digital filter enabled and filtering capability is 10 T_i2cclk */ 104 I2C_DIGITAL_FILTER_11 = ((uint8_t)0x0B), /*!< Digital filter enabled and filtering capability is 11 T_i2cclk */ 105 I2C_DIGITAL_FILTER_12 = ((uint8_t)0x0C), /*!< Digital filter enabled and filtering capability is 12 T_i2cclk */ 106 I2C_DIGITAL_FILTER_13 = ((uint8_t)0x0D), /*!< Digital filter enabled and filtering capability is 13 T_i2cclk */ 107 I2C_DIGITAL_FILTER_14 = ((uint8_t)0x0E), /*!< Digital filter enabled and filtering capability is 14 T_i2cclk */ 108 I2C_DIGITAL_FILTER_15 = ((uint8_t)0x0F), /*!< Digital filter enabled and filtering capability is 15 T_i2cclk */ 109 } I2C_DIGITAL_FILTER_T; 110 111 /** 112 * @brief I2C mode 113 */ 114 typedef enum 115 { 116 I2C_MODE_I2C = ((uint32_t)0x00000000), /*!< I2C mode */ 117 I2C_MODE_SMBUSDEVICE = ((uint32_t)0x00100000), /*!< SMBus device mode */ 118 I2C_MODE_SMBUSHOST = ((uint32_t)0x00200000), /*!< SMBus host mode */ 119 } I2C_MODE_T; 120 121 /** 122 * @brief I2C acknowledge 123 */ 124 typedef enum 125 { 126 I2C_ACK_ENABLE = ((uint8_t)0), /*!< ACK generation (slave mode) */ 127 I2C_ACK_DISABLE = ((uint8_t)1), /*!< NACK generation (slave mode) */ 128 } I2C_ACK_T; 129 130 /** 131 * @brief I2C acknowledge address 132 */ 133 typedef enum 134 { 135 I2C_ACK_ADDRESS_7BIT = ((uint8_t)0), /*!< ACK generation (slave mode) */ 136 I2C_ACK_ADDRESS_10BIT = ((uint8_t)1), /*!< NACK generation (slave mode) */ 137 } I2C_ACK_ADDRESS_T; 138 139 /** 140 * @brief I2C transfer direction 141 */ 142 typedef enum 143 { 144 I2C_DIRECTION_TX = ((uint8_t)0), /*!< Transmission direction */ 145 I2C_DIRECTION_RX = ((uint8_t)1), /*!< Reception direction */ 146 } I2C_DIRECTION_T; 147 148 /** 149 * @brief I2C DMA requests 150 */ 151 typedef enum 152 { 153 I2C_DMA_REQ_TX = ((uint8_t)0), /*!< DMA transmission requests enable */ 154 I2C_DMA_REQ_RX = ((uint8_t)1), /*!< DMA reception requests enable */ 155 } I2C_DMA_REQ_T; 156 157 /** 158 * @brief I2C own address2 mask 159 */ 160 typedef enum 161 { 162 I2C_ADDR2MSK_NOMASK = ((uint8_t)0x00), /*!< No masked */ 163 I2C_ADDR2MSK_MASK01 = ((uint8_t)0x01), /*!< Don't care masked ADDR2[1:0] */ 164 I2C_ADDR2MSK_MASK02 = ((uint8_t)0x02), /*!< Don't care masked ADDR2[2:1] */ 165 I2C_ADDR2MSK_MASK03 = ((uint8_t)0x03), /*!< Don't care masked ADDR2[3:1] */ 166 I2C_ADDR2MSK_MASK04 = ((uint8_t)0x04), /*!< Don't care masked ADDR2[4:1] */ 167 I2C_ADDR2MSK_MASK05 = ((uint8_t)0x05), /*!< Don't care masked ADDR2[5:1] */ 168 I2C_ADDR2MSK_MASK06 = ((uint8_t)0x06), /*!< Don't care masked ADDR2[6:1] */ 169 I2C_ADDR2MSK_MASK07 = ((uint8_t)0x07), /*!< Don't care masked ADDR2[7:1] */ 170 } I2C_ADDR2MSK_T; 171 172 /** 173 * @brief I2C registers 174 */ 175 typedef enum 176 { 177 I2C_REGISTER_CTRL1 = ((uint8_t)0x00), /*!< CTRL1 register */ 178 I2C_REGISTER_CTRL2 = ((uint8_t)0x04), /*!< CTRL2 register */ 179 I2C_REGISTER_ADDR1 = ((uint8_t)0x08), /*!< ADDR1 register */ 180 I2C_REGISTER_ADDR2 = ((uint8_t)0x0C), /*!< ADDR2 register */ 181 I2C_REGISTER_TIMING = ((uint8_t)0x10), /*!< TIMING register */ 182 I2C_REGISTER_TIMEOUT = ((uint8_t)0x14), /*!< TIMEOUT register */ 183 I2C_REGISTER_STS = ((uint8_t)0x18), /*!< STS register */ 184 I2C_REGISTER_INTFCLR = ((uint8_t)0x1C), /*!< INTFCLR register */ 185 I2C_REGISTER_PEC = ((uint8_t)0x20), /*!< PEC register */ 186 I2C_REGISTER_RXDATA = ((uint8_t)0x24), /*!< RXDATA register */ 187 I2C_REGISTER_TXDATA = ((uint8_t)0x28), /*!< TXDATA register */ 188 } I2C_REGISTER_T; 189 190 /** 191 * @brief I2C interrupts source 192 */ 193 typedef enum 194 { 195 I2C_INT_TXIE = ((uint8_t)0x02), /*!< TX Interrupt enable */ 196 I2C_INT_RXIE = ((uint8_t)0x04), /*!< RX Interrupt enable */ 197 I2C_INT_ADDRIE = ((uint8_t)0x08), /*!< Address match interrupt enable (slave only) */ 198 I2C_INT_NACKIE = ((uint8_t)0x10), /*!< Not acknowledge received interrupt enable */ 199 I2C_INT_STOPIE = ((uint8_t)0x20), /*!< STOP detection Interrupt enable */ 200 I2C_INT_TXCIE = ((uint8_t)0x40), /*!< Transfer complete interrupt enable */ 201 I2C_INT_ERRIE = ((uint8_t)0x80), /*!< Error interrupts enable */ 202 } I2C_INT_T; 203 204 /** 205 * @brief I2C Flags 206 */ 207 typedef enum 208 { 209 /* STS1 register flag */ 210 I2C_FLAG_TXBE = ((uint32_t)0x0001), /*!< Transmit buffer data register empty flag */ 211 I2C_FLAG_TXINT = ((uint32_t)0x0002), /*!< Transmit interrupt flag */ 212 I2C_FLAG_RXBNE = ((uint32_t)0x0004), /*!< Read buffer data register not empty flag */ 213 I2C_FLAG_ADDR = ((uint32_t)0x0008), /*!< Address Sent/Matched (master/slave) flag */ 214 I2C_FLAG_NACK = ((uint32_t)0x0010), /*!< Not acknowledge received flag */ 215 I2C_FLAG_STOP = ((uint32_t)0x0020), /*!< Stop detected flag */ 216 I2C_FLAG_TXCF = ((uint32_t)0x0040), /*!< Transfer complete flag */ 217 I2C_FLAG_TCRF = ((uint32_t)0x0080), /*!< Transfer complete reload flag */ 218 I2C_FLAG_BUSERR = ((uint32_t)0x0100), /*!< Bus error flag */ 219 I2C_FLAG_ALF = ((uint32_t)0x0200), /*!< Arbitration Loss flag */ 220 I2C_FLAG_OVR = ((uint32_t)0x0400), /*!< Overrun/Underrun flag */ 221 I2C_FLAG_PECERR = ((uint32_t)0x0800), /*!< PEC error flag */ 222 I2C_FLAG_TIMEOUT = ((uint32_t)0x1000), /*!< Timeout or t_low detection flag */ 223 I2C_FLAG_ALERT = ((uint32_t)0x2000), /*!< SMBus alert flag */ 224 I2C_FLAG_BUSY = ((uint32_t)0x8000), /*!< Bus Busy Flag */ 225 } I2C_FLAG_T; 226 227 /** 228 * @brief I2C Interrupt flag 229 */ 230 typedef enum 231 { 232 I2C_INT_FLAG_TXINT = ((uint32_t)0x0002), /*!< Transmit interrupt flag */ 233 I2C_INT_FLAG_RXBNE = ((uint32_t)0x0004), /*!< Read Buffer Data Register Not Empty interrupt flag */ 234 I2C_INT_FLAG_ADDR = ((uint32_t)0x0008), /*!< Address Sent/Matched (master/slave) interrupt flag */ 235 I2C_INT_FLAG_NACK = ((uint32_t)0x0010), /*!< Not acknowledge received interrupt flag */ 236 I2C_INT_FLAG_STOP = ((uint32_t)0x0020), /*!< Stop detected interrupt flag */ 237 I2C_INT_FLAG_TXCF = ((uint32_t)0x0040), /*!< Transfer complete interrupt flag */ 238 I2C_INT_FLAG_TCRF = ((uint32_t)0x0080), /*!< Transfer Complete Reloadinterrupt flag */ 239 I2C_INT_FLAG_BUSERR = ((uint32_t)0x0100), /*!< Bus error interrupt flag */ 240 I2C_INT_FLAG_ALF = ((uint32_t)0x0200), /*!< Arbitration Loss interrupt flag */ 241 I2C_INT_FLAG_OVR = ((uint32_t)0x0400), /*!< Overrun/Underrun interrupt flag */ 242 I2C_INT_FLAG_PECERR = ((uint32_t)0x0800), /*!< PEC error interrupt flag */ 243 I2C_INT_FLAG_TIMEOUT = ((uint32_t)0x1000), /*!< Timeout or t_low detection interrupt flag */ 244 I2C_INT_FLAG_ALERT = ((uint32_t)0x2000), /*!< SMBus alert interrupt flag */ 245 } I2C_INT_FLAG_T; 246 247 /** 248 * @brief I2C Reload End Mode 249 */ 250 typedef enum 251 { 252 I2C_RELOAD_MODE_RELOAD = ((uint32_t)0x01000000), /*!< Enable Reload mode */ 253 I2C_RELOAD_MODE_AUTOEND = ((uint32_t)0x02000000), /*!< Enable Automatic end mode */ 254 I2C_RELOAD_MODE_SOFTEND = ((uint32_t)0x00000000), /*!< Enable Software end mode */ 255 } I2C_RELOAD_MODE_T; 256 257 /** 258 * @brief I2C Start/Stop Mode 259 */ 260 typedef enum 261 { 262 I2C_GENERATE_NO_STARTSTOP = ((uint32_t)0x00000000), /*!< Don't Generate stop and start condition */ 263 I2C_GENERATE_START_WRITE = ((uint32_t)0x00002000), /*!< Generate Restart for write request */ 264 I2C_GENERATE_STOP = ((uint32_t)0x00004000), /*!< Generate stop condition */ 265 I2C_GENERATE_START_READ = ((uint32_t)0x00002400), /*!< Generate Restart for read request */ 266 } I2C_GENERATE_T; 267 268 /**@} end of group I2C_Enumerations */ 269 270 /** @defgroup I2C_Structures Structures 271 @{ 272 */ 273 274 /** 275 * @brief I2C Config struct definition 276 */ 277 typedef struct 278 { 279 uint32_t timing; /*!< Specifies the I2C_TIMINGR_register value */ 280 uint32_t address1; /*!< Specifies the device own address1 */ 281 I2C_ACK_T ack; /*!< Enables or disables the acknowledgement */ 282 I2C_MODE_T mode; /*!< Specifies the I2C mode*/ 283 I2C_ACK_ADDRESS_T ackaddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged */ 284 I2C_ANALOG_FILTER_T analogfilter; /*!< Enables or disables analog noise filter */ 285 I2C_DIGITAL_FILTER_T digitalfilter; /*!< Configures the digital noise filter */ 286 } I2C_Config_T; 287 288 /**@} end of group I2C_Structures */ 289 290 /** @defgroup I2C_Variables Variables 291 @{ 292 */ 293 294 /**@} end of group I2C_Variables*/ 295 296 /** @defgroup I2C_Functions Functions 297 @{ 298 */ 299 300 /* I2C reset and configuration */ 301 void I2C_Reset(I2C_T* i2c); 302 void I2C_Config(I2C_T* i2c, I2C_Config_T* i2cConfig); 303 void I2C_ConfigStructInit(I2C_Config_T* i2cConfig); 304 void I2C_Enable(I2C_T* i2c); 305 void I2C_Disable(I2C_T* i2c); 306 void I2C_SoftwareReset(I2C_T* i2c); 307 void I2C_EnableAutoEnd(I2C_T* i2c); 308 void I2C_DisableAutoEnd(I2C_T* i2c); 309 void I2C_EnableReload(I2C_T* i2c); 310 void I2C_DisableReload(I2C_T* i2c); 311 void I2C_ConfigNumberOfBytes(I2C_T* i2c, uint8_t number); 312 void I2C_ConfigMasterRequest(I2C_T* i2c, I2C_DIRECTION_T direction); 313 void I2C_EnableGenerateStart(I2C_T* i2c); 314 void I2C_DisableGenerateStart(I2C_T* i2c); 315 void I2C_EnableGenerateStop(I2C_T* i2c); 316 void I2C_DisableGenerateStop(I2C_T* i2c); 317 void I2C_EnableAcknowledge(I2C_T* i2c); 318 void I2C_DisableAcknowledge(I2C_T* i2c); 319 uint8_t I2C_ReadAddressMatched(I2C_T* i2c); 320 uint16_t I2C_ReadTransferDirection(I2C_T* i2c); 321 void I2C_HandlingTransfer(I2C_T* i2c, uint16_t address, uint8_t number, I2C_RELOAD_MODE_T reloadend, I2C_GENERATE_T generates); 322 323 void I2C_ConfigTimeoutA(I2C_T* i2c, uint16_t timeout); 324 void I2C_ConfigTimeoutB(I2C_T* i2c, uint16_t timeout); 325 uint32_t I2C_ReadRegister(I2C_T* i2c, uint8_t registers); 326 327 /* Interrupt */ 328 void I2C_EnableInterrupt(I2C_T* i2c, uint8_t interrupt); 329 void I2C_DisableInterrupt(I2C_T* i2c, uint8_t interrupt); 330 331 /* Clock Stretch */ 332 void I2C_EnableStretchClock(I2C_T* i2c); 333 void I2C_DisableStretchClock(I2C_T* i2c); 334 335 /* Stop Mode */ 336 void I2C_EnableStopMode(I2C_T* i2c); /*!< Not for APM32F030 devices */ 337 void I2C_DisableStopMode(I2C_T* i2c); /*!< Not for APM32F030 devices */ 338 339 /* Own address 2*/ 340 void I2C_EnableOwnAddress2(I2C_T* i2c); 341 void I2C_DisableOwnAddress2(I2C_T* i2c); 342 void I2C_OwnAddress2Mask(I2C_T* i2c, uint16_t address, I2C_ADDR2MSK_T mask); 343 344 /* Broadcast */ 345 void I2C_EnableBroadcastCall(I2C_T* i2c); 346 void I2C_DisableBroadcastCall(I2C_T* i2c); 347 348 /* slave */ 349 void I2C_EnableSlaveByteControl(I2C_T* i2c); 350 void I2C_DisableSlaveByteControl(I2C_T* i2c); 351 void I2C_SlaveAddress(I2C_T* i2c, uint16_t address); 352 353 /* master */ 354 void I2C_Enable10BitAddressingMode(I2C_T* i2c); 355 void I2C_Disable10BitAddressingMode(I2C_T* i2c); 356 void I2C_Enable10BitAddressHeader(I2C_T* i2c); 357 void I2C_Disable10BitAddressHeader(I2C_T* i2c); 358 359 /* Clock */ 360 void I2C_EnableClockTimeout(I2C_T* i2c); 361 void I2C_DisableClockTimeout(I2C_T* i2c); 362 void I2C_EnableExtendClockTimeout(I2C_T* i2c); 363 void I2C_DisableExtendClockTimeout(I2C_T* i2c); 364 void I2C_EnableIdleClockTimeout(I2C_T* i2c); 365 void I2C_DisableIdleClockTimeout(I2C_T* i2c); 366 367 /* Transmit and receive */ 368 void I2C_TxData(I2C_T* i2c, uint8_t data); 369 uint8_t I2C_RxData(I2C_T* i2c); 370 371 /* DMA request */ 372 void I2C_EnableDMA(I2C_T* i2c, I2C_DMA_REQ_T request); 373 void I2C_DisableDMA(I2C_T* i2c, I2C_DMA_REQ_T request); 374 375 /* flag */ 376 uint8_t I2C_ReadStatusFlag(I2C_T* i2c, I2C_FLAG_T flag); 377 void I2C_ClearStatusFlag(I2C_T* i2c, uint32_t flag); 378 uint8_t I2C_ReadIntFlag(I2C_T* i2c, I2C_INT_FLAG_T flag); 379 void I2C_ClearIntFlag(I2C_T* i2c, uint32_t flag); 380 381 /* SMBus */ 382 void I2C_EnableSMBusAlert(I2C_T* i2c); 383 void I2C_DisableSMBusAlert(I2C_T* i2c); 384 385 void I2C_EnableSMBusHAEN(I2C_T* i2c); 386 void I2C_DisableSMBusHAEN(I2C_T* i2c); 387 388 void I2C_EnableSMBusDAEN(I2C_T* i2c); 389 void I2C_DisableSMBusDAEN(I2C_T* i2c); 390 391 void I2C_EnablePEC(I2C_T* i2c); 392 void I2C_DisablePEC(I2C_T* i2c); 393 void I2C_EnablePECRequest(I2C_T* i2c); 394 void I2C_DisablePECRequest(I2C_T* i2c); 395 uint8_t I2C_ReadPEC(I2C_T* i2c); 396 397 #ifdef __cplusplus 398 } 399 #endif 400 401 #endif /* __APM32F0XX_I2C_H */ 402 403 /**@} end of group I2C_Functions */ 404 /**@} end of group I2C_Driver */ 405 /**@} end of group APM32F0xx_StdPeriphDriver */ 406