1;/*! 2; * @file startup_apm32f030.s 3; * 4; * @brief CMSIS Cortex-M0 PLUS based Core Device Startup File for Device startup_apm32f030 5; * 6; * @version V1.0.2 7; * 8; * @date 2022-02-21 9; * 10; * @attention 11; * 12; * Copyright (C) 2020-2022 Geehy Semiconductor 13; * 14; * You may not use this file except in compliance with the 15; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16; * 17; * The program is only for reference, which is distributed in the hope 18; * that it will be useful and instructional for customers to develop 19; * their software. Unless required by applicable law or agreed to in 20; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23; * and limitations under the License. 24; */ 25 26; <h> Stack Configuration 27; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 28; </h> 29 30Stack_Size EQU 0x00000400 31 32 AREA STACK, NOINIT, READWRITE, ALIGN=3 33Stack_Mem SPACE Stack_Size 34__initial_sp 35 36 37; <h> Heap Configuration 38; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 39; </h> 40 41Heap_Size EQU 0x00000200 42 43 AREA HEAP, NOINIT, READWRITE, ALIGN=3 44__heap_base 45Heap_Mem SPACE Heap_Size 46__heap_limit 47 48 PRESERVE8 49 THUMB 50 51 52; Vector Table Mapped to Address 0 at Reset 53 AREA RESET, DATA, READONLY 54 EXPORT __Vectors 55 EXPORT __Vectors_End 56 EXPORT __Vectors_Size 57 58__Vectors DCD __initial_sp ; Top of Stack 59 DCD Reset_Handler ; Reset Handler 60 DCD NMI_Handler ; NMI Handler 61 DCD HardFault_Handler ; Hard Fault Handler 62 DCD 0 ; Reserved 63 DCD 0 ; Reserved 64 DCD 0 ; Reserved 65 DCD 0 ; Reserved 66 DCD 0 ; Reserved 67 DCD 0 ; Reserved 68 DCD 0 ; Reserved 69 DCD SVC_Handler ; SVCall Handler 70 DCD 0 ; Reserved 71 DCD 0 ; Reserved 72 DCD PendSV_Handler ; PendSV Handler 73 DCD SysTick_Handler ; SysTick Handler 74 75 ; External Interrupts 76 DCD WWDT_IRQHandler ; Window Watchdog 77 DCD 0 ; Reserved 78 DCD RTC_IRQHandler ; RTC through EINT Line 79 DCD FLASH_IRQHandler ; FLASH 80 DCD RCM_IRQHandler ; RCM 81 DCD EINT0_1_IRQHandler ; EINT Line 0 and 1 82 DCD EINT2_3_IRQHandler ; EINT Line 2 and 3 83 DCD EINT4_15_IRQHandler ; EINT Line 4 to 15 84 DCD 0 ; Reserved 85 DCD DMA1_CH1_IRQHandler ; DMA1 Channel 1 86 DCD DMA1_CH2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 87 DCD DMA1_CH4_5_IRQHandler ; DMA1 Channel 4 and Channel 5 88 DCD ADC1_IRQHandler ; ADC1 89 DCD TMR1_BRK_UP_TRG_COM_IRQHandler ; TMR1 Break, Update, Trigger and Commutation 90 DCD TMR1_CC_IRQHandler ; TMR1 Capture Compare 91 DCD 0 ; Reserved 92 DCD TMR3_IRQHandler ; TMR3 93 DCD TMR6_IRQHandler ; TMR6 94 DCD TMR7_IRQHandler ; TMR7 95 DCD TMR14_IRQHandler ; TMR14 96 DCD TMR15_IRQHandler ; TMR15 97 DCD TMR16_IRQHandler ; TMR16 98 DCD TMR17_IRQHandler ; TMR17 99 DCD I2C1_IRQHandler ; I2C1 100 DCD I2C2_IRQHandler ; I2C2 101 DCD SPI1_IRQHandler ; SPI1 102 DCD SPI2_IRQHandler ; SPI2 103 DCD USART1_IRQHandler ; USART1 104 DCD USART2_IRQHandler ; USART2 105 DCD USART3_6_IRQHandler ; USART3,USART4,USART5,USART6 106 107__Vectors_End 108 109__Vectors_Size EQU __Vectors_End - __Vectors 110 111 AREA |.text|, CODE, READONLY 112 113; Reset handler routine 114Reset_Handler PROC 115 EXPORT Reset_Handler [WEAK] 116 IMPORT __main 117 IMPORT SystemInit 118 LDR R0, =SystemInit 119 BLX R0 120 LDR R0, =__main 121 BX R0 122 ENDP 123 124; Dummy Exception Handlers (infinite loops which can be modified) 125 126NMI_Handler PROC 127 EXPORT NMI_Handler [WEAK] 128 B . 129 ENDP 130HardFault_Handler\ 131 PROC 132 EXPORT HardFault_Handler [WEAK] 133 B . 134 ENDP 135SVC_Handler PROC 136 EXPORT SVC_Handler [WEAK] 137 B . 138 ENDP 139PendSV_Handler PROC 140 EXPORT PendSV_Handler [WEAK] 141 B . 142 ENDP 143SysTick_Handler PROC 144 EXPORT SysTick_Handler [WEAK] 145 B . 146 ENDP 147 148Default_Handler PROC 149 150 EXPORT WWDT_IRQHandler [WEAK] 151 EXPORT RTC_IRQHandler [WEAK] 152 EXPORT FLASH_IRQHandler [WEAK] 153 EXPORT RCM_IRQHandler [WEAK] 154 EXPORT EINT0_1_IRQHandler [WEAK] 155 EXPORT EINT2_3_IRQHandler [WEAK] 156 EXPORT EINT4_15_IRQHandler [WEAK] 157 EXPORT DMA1_CH1_IRQHandler [WEAK] 158 EXPORT DMA1_CH2_3_IRQHandler [WEAK] 159 EXPORT DMA1_CH4_5_IRQHandler [WEAK] 160 EXPORT ADC1_IRQHandler [WEAK] 161 EXPORT TMR1_BRK_UP_TRG_COM_IRQHandler [WEAK] 162 EXPORT TMR1_CC_IRQHandler [WEAK] 163 EXPORT TMR3_IRQHandler [WEAK] 164 EXPORT TMR6_IRQHandler [WEAK] 165 EXPORT TMR7_IRQHandler [WEAK] 166 EXPORT TMR14_IRQHandler [WEAK] 167 EXPORT TMR15_IRQHandler [WEAK] 168 EXPORT TMR16_IRQHandler [WEAK] 169 EXPORT TMR17_IRQHandler [WEAK] 170 EXPORT I2C1_IRQHandler [WEAK] 171 EXPORT I2C2_IRQHandler [WEAK] 172 EXPORT SPI1_IRQHandler [WEAK] 173 EXPORT SPI2_IRQHandler [WEAK] 174 EXPORT USART1_IRQHandler [WEAK] 175 EXPORT USART2_IRQHandler [WEAK] 176 EXPORT USART3_6_IRQHandler [WEAK] 177 178 179WWDT_IRQHandler 180RTC_IRQHandler 181FLASH_IRQHandler 182RCM_IRQHandler 183EINT0_1_IRQHandler 184EINT2_3_IRQHandler 185EINT4_15_IRQHandler 186DMA1_CH1_IRQHandler 187DMA1_CH2_3_IRQHandler 188DMA1_CH4_5_IRQHandler 189ADC1_IRQHandler 190TMR1_BRK_UP_TRG_COM_IRQHandler 191TMR1_CC_IRQHandler 192TMR3_IRQHandler 193TMR6_IRQHandler 194TMR7_IRQHandler 195TMR14_IRQHandler 196TMR15_IRQHandler 197TMR16_IRQHandler 198TMR17_IRQHandler 199I2C1_IRQHandler 200I2C2_IRQHandler 201SPI1_IRQHandler 202SPI2_IRQHandler 203USART1_IRQHandler 204USART2_IRQHandler 205USART3_6_IRQHandler 206 207 B . 208 209 ENDP 210 211 ALIGN 212 213;******************************************************************************* 214; User Stack and Heap initialization 215;******************************************************************************* 216 IF :DEF:__MICROLIB 217 218 EXPORT __initial_sp 219 EXPORT __heap_base 220 EXPORT __heap_limit 221 222 ELSE 223 224 IMPORT __use_two_region_memory 225 EXPORT __user_initial_stackheap 226 227__user_initial_stackheap 228 229 LDR R0, = Heap_Mem 230 LDR R1, =(Stack_Mem + Stack_Size) 231 LDR R2, = (Heap_Mem + Heap_Size) 232 LDR R3, = Stack_Mem 233 BX LR 234 235 ALIGN 236 237 ENDIF 238 239 END 240