1 /*! 2 * @file apm32f10x_adc.h 3 * 4 * @brief This file contains all the functions prototypes for the ADC firmware library 5 * 6 * @version V1.0.4 7 * 8 * @date 2022-12-01 9 * 10 * @attention 11 * 12 * Copyright (C) 2020-2022 Geehy Semiconductor 13 * 14 * You may not use this file except in compliance with the 15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16 * 17 * The program is only for reference, which is distributed in the hope 18 * that it will be useful and instructional for customers to develop 19 * their software. Unless required by applicable law or agreed to in 20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23 * and limitations under the License. 24 */ 25 26 /* Define to prevent recursive inclusion */ 27 #ifndef __APM32F10X_ADC_H 28 #define __APM32F10X_ADC_H 29 30 /* Includes */ 31 #include "apm32f10x.h" 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /** @addtogroup APM32F10x_StdPeriphDriver 37 @{ 38 */ 39 40 /** @addtogroup ADC_Driver ADC Driver 41 @{ 42 */ 43 44 45 /** @defgroup ADC_Macros 46 @{ 47 */ 48 49 /* ADC_IJD Offset */ 50 #define INJDATA_OFFSET ((uint8_t)0x28) 51 52 /* ADC_RDG register address */ 53 #define RDG_ADDRESS ((uint32_t)0x4001244C) 54 55 /* INJSEQ register config */ 56 #define INJSEQ_SET_INJSEQC ((uint32_t)0x0000001F) 57 #define INJSEQ_SET_INJSEQLEN ((uint32_t)0x00300000) 58 59 /* SMPTIM register SET */ 60 #define SMPCYCCFG_SET_SMPTIM1 ((uint32_t)0x00000007) 61 #define SMPCYCCFG_SET_SMPTIM2 ((uint32_t)0x00000007) 62 63 /* REGSEQ register SET */ 64 #define REGSEQC_SET_REGSEQ3 ((uint32_t)0x0000001F) 65 #define REGSEQC_SET_REGSEQ2 ((uint32_t)0x0000001F) 66 #define REGSEQC_SET_REGSEQ1 ((uint32_t)0x0000001F) 67 68 /**@} end of group ADC_Macros*/ 69 70 /** @defgroup ADC_Enumerations 71 @{ 72 */ 73 74 /** 75 * @brief ADC configuration Mode 76 */ 77 typedef enum 78 { 79 ADC_MODE_INDEPENDENT = ((uint32_t)0x00000000), /*!< Independent mode */ 80 ADC_MODE_REG_INJEC_SIMULT = ((uint32_t)0x00010000), /*!< Combined regular simultaneous and injected simultaneous mode */ 81 ADC_MODE_REG_SIMULT_ALTER_TRIG = ((uint32_t)0x00020000), /*!< Combined regular simultaneous and alternate trigger mode */ 82 ADC_MODE_INJEC_SIMULT_FAST_TNTERL = ((uint32_t)0x00030000), /*!< Combined injected simultaneous and fast interleaved mode */ 83 ADC_MODE_INJEC_SIMULT_SLOW_INTERL = ((uint32_t)0x00040000), /*!< Combined injected simultaneous and slow interleaved mode */ 84 ADC_MODE_INJEC_SIMULT = ((uint32_t)0x00050000), /*!< Injected simultaneous mode */ 85 ADC_MODE_REG_SIMULT = ((uint32_t)0x00060000), /*!< Regular simultaneous mode */ 86 ADC_MODE_FAST_INTERL = ((uint32_t)0x00070000), /*!< Fast interleaved mode */ 87 ADC_MODE_SLOW_INTERL = ((uint32_t)0x00080000), /*!< Slow interleaved mode */ 88 ADC_MODE_ALTER_TRIG = ((uint32_t)0x00090000) /*!< Alternate trigger mode */ 89 } ADC_MODE_T; 90 91 /** 92 * @brief ADC external trigger sources for regular channels conversion enumeration 93 */ 94 typedef enum 95 { 96 ADC_EXT_TRIG_CONV_TMR1_CC1 = ((uint32_t)0x00000000), 97 ADC_EXT_TRIG_CONV_TMR1_CC2 = ((uint32_t)0x00020000), 98 ADC_EXT_TRIG_CONV_TMR2_CC2 = ((uint32_t)0x00060000), 99 ADC_EXT_TRIG_CONV_TMR3_TRGO = ((uint32_t)0x00080000), 100 ADC_EXT_TRIG_CONV_TMR4_CC4 = ((uint32_t)0x000A0000), 101 ADC_EXT_TRIG_CONV_EINT11_T8_TRGO = ((uint32_t)0x000C0000), 102 ADC_EXT_TRIG_CONV_TMR1_CC3 = ((uint32_t)0x00040000), 103 ADC_EXT_TRIG_CONV_None = ((uint32_t)0x000E0000), 104 105 ADC_EXT_TRIG_CONV_TMR3_CC1 = ((uint32_t)0x00000000), 106 ADC_EXT_TRIG_CONV_TMR2_CC3 = ((uint32_t)0x00020000), 107 ADC_EXT_TRIG_CONV_TMR8_CC1 = ((uint32_t)0x00060000), 108 ADC_EXT_TRIG_CONV_TMR8_TRGO = ((uint32_t)0x00080000), 109 ADC_EXT_TRIG_CONV_TMR5_CC1 = ((uint32_t)0x000A0000), 110 ADC_EXT_TRIG_CONV_TMR5_CC3 = ((uint32_t)0x000C0000) 111 } ADC_EXT_TRIG_CONV_T; 112 113 /** 114 * @brief ADC Data Align 115 */ 116 typedef enum 117 { 118 ADC_DATA_ALIGN_RIGHT = 0x00000000, 119 ADC_DATA_ALIGN_LEFT = 0x00000800 120 } ADC_DATA_ALIGN_T; 121 122 /** 123 * @brief ADC Channels 124 */ 125 typedef enum 126 { 127 ADC_CHANNEL_0 = ((uint8_t)0x00), 128 ADC_CHANNEL_1 = ((uint8_t)0x01), 129 ADC_CHANNEL_2 = ((uint8_t)0x02), 130 ADC_CHANNEL_3 = ((uint8_t)0x03), 131 ADC_CHANNEL_4 = ((uint8_t)0x04), 132 ADC_CHANNEL_5 = ((uint8_t)0x05), 133 ADC_CHANNEL_6 = ((uint8_t)0x06), 134 ADC_CHANNEL_7 = ((uint8_t)0x07), 135 ADC_CHANNEL_8 = ((uint8_t)0x08), 136 ADC_CHANNEL_9 = ((uint8_t)0x09), 137 ADC_CHANNEL_10 = ((uint8_t)0x0A), 138 ADC_CHANNEL_11 = ((uint8_t)0x0B), 139 ADC_CHANNEL_12 = ((uint8_t)0x0C), 140 ADC_CHANNEL_13 = ((uint8_t)0x0D), 141 ADC_CHANNEL_14 = ((uint8_t)0x0E), 142 ADC_CHANNEL_15 = ((uint8_t)0x0F), 143 ADC_CHANNEL_16 = ((uint8_t)0x10), 144 ADC_CHANNEL_TEMP_SENSOR = ((uint8_t)0x10), 145 ADC_CHANNEL_17 = ((uint8_t)0x11), 146 ADC_CHANNEL_V_REFINT = ((uint8_t)0x11) 147 } ADC_CHANNEL_T; 148 149 /** 150 * @brief ADC Sampling Time 151 */ 152 typedef enum 153 { 154 ADC_SAMPLETIME_1CYCLES5 = ((uint8_t)0x00), 155 ADC_SAMPLETIME_7CYCLES5 = ((uint8_t)0x01), 156 ADC_SAMPLETIME_13CYCLES5 = ((uint8_t)0x02), 157 ADC_SAMPLETIME_28CYCLES5 = ((uint8_t)0x03), 158 ADC_SAMPLETIME_41CYCLES5 = ((uint8_t)0x04), 159 ADC_SAMPLETIME_55CYCLES5 = ((uint8_t)0x05), 160 ADC_SAMPLETIME_71CYCLES5 = ((uint8_t)0x06), 161 ADC_SAMPLETIME_239CYCLES5 = ((uint8_t)0x07) 162 } ADC_SAMPLETIME_T; 163 164 /** 165 * @brief ADC external trigger sources for injected channels conversion 166 */ 167 typedef enum 168 { 169 /* for ADC1 and ADC2 */ 170 ADC_EXT_TRIG_INJEC_CONV_TMR2_TRGO = ((uint8_t)0x02), 171 ADC_EXT_TRIG_INJEC_CONV_TMR2_CC1 = ((uint8_t)0x03), 172 ADC_EXT_TRIG_INJEC_CONV_TMR3_CC4 = ((uint8_t)0x04), 173 ADC_EXT_TRIG_INJEC_CONV_TMR4_TRGO = ((uint8_t)0x05), 174 ADC_EXT_TRIG_INJEC_CONV_EINT15_T8_CC4 = ((uint8_t)0x06), 175 176 /* for ADC1, ADC2 and ADC3 */ 177 ADC_EXT_TRIG_INJEC_CONV_TMR1_TRGO = ((uint8_t)0x00), 178 ADC_EXT_TRIG_INJEC_CONV_TMR1_CC4 = ((uint8_t)0x01), 179 ADC_EXT_TRIG_INJEC_CONV_NONE = ((uint8_t)0x07), 180 181 /* for ADC3 only */ 182 ADC_EXT_TRIG_INJEC_CONV_TMR4_CC3 = ((uint8_t)0x02), 183 ADC_EXT_TRIG_INJEC_CONV_TMR8_CC2 = ((uint8_t)0x03), 184 ADC_EXT_TRIG_INJEC_CONV_TMR8_CC4 = ((uint8_t)0x04), 185 ADC_EXT_TRIG_INJEC_CONV_TMR5_TRGO = ((uint8_t)0x05), 186 ADC_EXT_TRIG_INJEC_CONV_TMR5_CC4 = ((uint8_t)0x06) 187 } ADC_EXT_TRIG_INJEC_CONV_T; 188 189 /** 190 * @brief ADC Injected channels 191 */ 192 typedef enum 193 { 194 ADC_INJEC_CHANNEL_1 = ((uint8_t)0x14), 195 ADC_INJEC_CHANNEL_2 = ((uint8_t)0x18), 196 ADC_INJEC_CHANNEL_3 = ((uint8_t)0x1C), 197 ADC_INJEC_CHANNEL_4 = ((uint8_t)0x20) 198 } ADC_INJEC_CHANNEL_T; 199 200 /** 201 * @brief ADC Analog Watchdog Selection 202 */ 203 typedef enum 204 { 205 ADC_ANALOG_WATCHDOG_SINGLE_REG = ((uint32_t)0x00800200), 206 ADC_ANALOG_WATCHDOG_SINGLE_INJEC = ((uint32_t)0x00400200), 207 ADC_ANALOG_WATCHDOG_SINGLE_REG_INJEC = ((uint32_t)0x00C00200), 208 ADC_ANALOG_WATCHDOG_ALL_REG = ((uint32_t)0x00800000), 209 ADC_ANALOG_WATCHDOG_ALL_INJEC = ((uint32_t)0x00400000), 210 ADC_ANALOG_WATCHDOG_ALL_REG_ALL_INJEC = ((uint32_t)0x00C00000), 211 ADC_ANALOG_WATCHDOG_NONE = ((uint32_t)0x00000000) 212 } ADC_ANALOG_WATCHDOG_T; 213 214 /** 215 * @brief ADC Interrupt definition 216 */ 217 typedef enum 218 { 219 ADC_INT_AWD = ((uint16_t)0x0140), /*!< Analog Watchdog interrupt */ 220 ADC_INT_EOC = ((uint16_t)0x0220), /*!< End Of Conversion interrupt */ 221 ADC_INT_INJEOC = ((uint16_t)0x0480) /*!< Injected Channel End Of Conversion interrupt */ 222 } ADC_INT_T; 223 224 /** 225 * @brief ADC Flag 226 */ 227 typedef enum 228 { 229 ADC_FLAG_AWD = ((uint8_t)0x01), /*!< Analog Watchdog event occur flag */ 230 ADC_FLAG_EOC = ((uint8_t)0x02), /*!< End Of Conversion flag */ 231 ADC_FLAG_INJEOC = ((uint8_t)0x04), /*!< Injected Channel End Of Conversion flag */ 232 ADC_FLAG_INJCS = ((uint8_t)0x08), /*!< Injected Channel Conversion Start flag */ 233 ADC_FLAG_REGCS = ((uint8_t)0x10) /*!< Regular Channel Conversion Start flag */ 234 } ADC_FLAG_T; 235 236 /**@} end of group ADC_Enumerations*/ 237 238 /** @defgroup ADC_Structures Structures 239 @{ 240 */ 241 242 /** 243 * @brief ADC Config structure definition 244 */ 245 typedef struct 246 { 247 ADC_MODE_T mode; 248 uint8_t scanConvMode; /*!< This parameter can be ENABLE or DISABLE. */ 249 uint8_t continuosConvMode; /*!< This parameter can be ENABLE or DISABLE. */ 250 ADC_EXT_TRIG_CONV_T externalTrigConv; 251 ADC_DATA_ALIGN_T dataAlign; 252 uint8_t nbrOfChannel; /*!< This parameter must range from 1 to 16. */ 253 } ADC_Config_T; 254 255 /**@} end of group ADC_Structures*/ 256 257 258 /** @defgroup ADC_Functions Functions 259 @{ 260 */ 261 262 /* ADC reset and common configuration */ 263 void ADC_Reset(ADC_T* adc); 264 void ADC_Config(ADC_T* adc, ADC_Config_T* adcConfig); 265 void ADC_ConfigStructInit(ADC_Config_T* adcConfig); 266 void ADC_ConfigRegularChannel(ADC_T* adc, uint8_t channel, uint8_t rank, uint8_t sampleTime); 267 void ADC_Enable(ADC_T* adc); 268 void ADC_Disable(ADC_T* adc); 269 270 /* ADC for DMA */ 271 void ADC_EnableDMA(ADC_T* adc); 272 void ADC_DisableDMA(ADC_T* adc); 273 274 /* ADC Calibration */ 275 void ADC_ResetCalibration(ADC_T* adc); 276 uint8_t ADC_ReadResetCalibrationStatus(ADC_T* adc); 277 void ADC_StartCalibration(ADC_T* adc); 278 uint8_t ADC_ReadCalibrationStartFlag(ADC_T* adc); 279 280 /* ADC software start conversion */ 281 void ADC_EnableSoftwareStartConv(ADC_T* adc); 282 void ADC_DisableSoftwareStartConv(ADC_T* adc); 283 uint8_t ADC_ReadSoftwareStartConvStatus(ADC_T* adc); 284 285 /* ADC Discontinuous mode */ 286 void ADC_ConfigDiscMode(ADC_T* adc, uint8_t number); 287 void ADC_EnableDiscMode(ADC_T* adc); 288 void ADC_DisableDiscMode(ADC_T* adc); 289 290 /* ADC External trigger conversion */ 291 void ADC_EnableExternalTrigConv(ADC_T* adc); 292 void ADC_DisableExternalTrigConv(ADC_T* adc); 293 294 /* ADC Conversion result */ 295 uint16_t ADC_ReadConversionValue(ADC_T* adc); 296 uint32_t ADC_ReadDualModeConversionValue(ADC_T* adc); 297 298 /* ADC Automatic injected group */ 299 void ADC_EnableAutoInjectedConv(ADC_T* adc); 300 void ADC_DisableAutoInjectedConv(ADC_T* adc); 301 void ADC_EnableInjectedDiscMode(ADC_T* adc); 302 void ADC_DisableInjectedDiscMode(ADC_T* adc); 303 304 /* ADC External trigger for injected channels conversion */ 305 void ADC_ConfigExternalTrigInjectedConv(ADC_T* adc, ADC_EXT_TRIG_INJEC_CONV_T extTrigInjecConv); 306 void ADC_EnableExternalTrigInjectedConv(ADC_T* adc); 307 void ADC_DisableExternalTrigInjectedConv(ADC_T* adc); 308 309 /* ADC Start of the injected channels conversion */ 310 void ADC_EnableSoftwareStartInjectedConv(ADC_T* adc); 311 void ADC_DisableSoftwareStartInjectedConv(ADC_T* adc); 312 uint8_t ADC_ReadSoftwareStartInjectedConvStatus(ADC_T* adc); 313 314 /* ADC injected channel */ 315 void ADC_ConfigInjectedChannel(ADC_T* adc, uint8_t channel, uint8_t rank, uint8_t sampleTime); 316 void ADC_ConfigInjectedSequencerLength(ADC_T* adc, uint8_t length); 317 void ADC_ConfigInjectedOffset(ADC_T* adc, ADC_INJEC_CHANNEL_T channel, uint16_t offSet); 318 uint16_t ADC_ReadInjectedConversionValue(ADC_T* adc, ADC_INJEC_CHANNEL_T channel); 319 320 /* ADC analog watchdog */ 321 void ADC_EnableAnalogWatchdog(ADC_T* adc, uint32_t analogWatchdog); 322 void ADC_DisableAnalogWatchdog(ADC_T* adc); 323 void ADC_ConfigAnalogWatchdogThresholds(ADC_T* adc, uint16_t highThreshold, uint16_t lowThreshold); 324 void ADC_ConfigAnalogWatchdogSingleChannel(ADC_T* adc, uint8_t channel); 325 326 /* ADC temperature sensor */ 327 void ADC_EnableTempSensorVrefint(ADC_T* adc); 328 void ADC_DisableTempSensorVrefint(ADC_T* adc); 329 330 /* Interrupt and flag */ 331 void ADC_EnableInterrupt(ADC_T* adc, uint16_t interrupt); 332 void ADC_DisableInterrupt(ADC_T* adc, uint16_t interrupt); 333 uint8_t ADC_ReadStatusFlag(ADC_T* adc, ADC_FLAG_T flag); 334 void ADC_ClearStatusFlag(ADC_T* adc, uint8_t flag); 335 uint8_t ADC_ReadIntFlag(ADC_T* adc, ADC_INT_T flag); 336 void ADC_ClearIntFlag(ADC_T* adc, uint16_t flag); 337 338 339 340 #ifdef __cplusplus 341 } 342 343 /**@} end of group ADC_Functions*/ 344 /**@} end of group ADC_Driver*/ 345 /**@} end of group APM32F10x_StdPeriphDriver */ 346 #endif 347 348 #endif /* __APM32F10X_ADC_H */ 349