1 /*! 2 * @file apm32f10x_gpio.h 3 * 4 * @brief This file contains all the functions prototypes for the GPIO firmware library 5 * 6 * @version V1.0.4 7 * 8 * @date 2022-12-01 9 * 10 * @attention 11 * 12 * Copyright (C) 2020-2022 Geehy Semiconductor 13 * 14 * You may not use this file except in compliance with the 15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16 * 17 * The program is only for reference, which is distributed in the hope 18 * that it will be useful and instructional for customers to develop 19 * their software. Unless required by applicable law or agreed to in 20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23 * and limitations under the License. 24 */ 25 26 /* Define to prevent recursive inclusion */ 27 #ifndef __APM32F10X_GPIO_H 28 #define __APM32F10X_GPIO_H 29 30 /* Includes */ 31 #include "apm32f10x.h" 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /** @addtogroup APM32F10x_StdPeriphDriver 38 @{ 39 */ 40 41 /** @addtogroup GPIO_Driver GPIO Driver 42 @{ 43 */ 44 45 /** @defgroup GPIO_Enumerations Enumerations 46 @{ 47 */ 48 49 /** 50 * @brief GPIO Output Maximum frequency selection 51 */ 52 typedef enum 53 { 54 GPIO_SPEED_10MHz = 1, 55 GPIO_SPEED_2MHz, 56 GPIO_SPEED_50MHz 57 } GPIO_SPEED_T; 58 59 /** 60 * @brief Configuration Mode enumeration 61 */ 62 typedef enum 63 { 64 GPIO_MODE_ANALOG = 0x0, /*!< Analog mode */ 65 GPIO_MODE_IN_FLOATING = 0x04, /*!< Floating input */ 66 GPIO_MODE_IN_PD = 0x28, /*!< Input with pull-down */ 67 GPIO_MODE_IN_PU = 0x48, /*!< Input with pull-up */ 68 GPIO_MODE_OUT_PP = 0x80, /*!< General purpose output push-pull */ 69 GPIO_MODE_OUT_OD = 0x84, /*!< General purpose output Open-drain */ 70 GPIO_MODE_AF_PP = 0x88, /*!< Alternate function output Push-pull */ 71 GPIO_MODE_AF_OD = 0x8C, /*!< Alternate function output Open-drain */ 72 } GPIO_MODE_T; 73 74 /** 75 * @brief Definition of the GPIO pins 76 */ 77 typedef enum 78 { 79 GPIO_PIN_0 = ((uint16_t)BIT0), 80 GPIO_PIN_1 = ((uint16_t)BIT1), 81 GPIO_PIN_2 = ((uint16_t)BIT2), 82 GPIO_PIN_3 = ((uint16_t)BIT3), 83 GPIO_PIN_4 = ((uint16_t)BIT4), 84 GPIO_PIN_5 = ((uint16_t)BIT5), 85 GPIO_PIN_6 = ((uint16_t)BIT6), 86 GPIO_PIN_7 = ((uint16_t)BIT7), 87 GPIO_PIN_8 = ((uint16_t)BIT8), 88 GPIO_PIN_9 = ((uint16_t)BIT9), 89 GPIO_PIN_10 = ((uint16_t)BIT10), 90 GPIO_PIN_11 = ((uint16_t)BIT11), 91 GPIO_PIN_12 = ((uint16_t)BIT12), 92 GPIO_PIN_13 = ((uint16_t)BIT13), 93 GPIO_PIN_14 = ((uint16_t)BIT14), 94 GPIO_PIN_15 = ((uint16_t)BIT15), 95 GPIO_PIN_ALL = ((uint32_t)0XFFFF), 96 } GPIO_PIN_T; 97 98 /** 99 * @brief GPIO remap type define 100 */ 101 typedef enum 102 { 103 GPIO_NO_REMAP_SPI1 = 0x00000010, 104 GPIO_REMAP_SPI1 = 0x00000011, 105 106 GPIO_NO_REMAP_I2C1 = 0x00000110, 107 GPIO_REMAP_I2C1 = 0x00000111, 108 109 GPIO_NO_REMAP_USART1 = 0x00000210, 110 GPIO_REMAP_USART1 = 0x00000211, 111 112 GPIO_NO_REMAP_USART2 = 0x00000310, 113 GPIO_REMAP_USART2 = 0x00000311, 114 115 GPIO_NO_REMAP_USART3 = 0x00000430, 116 GPIO_PARTIAL_REMAP_USART3 = 0x00000431, 117 GPIO_FULL_REMAP_USART3 = 0x00000433, 118 119 GPIO_NO_REMAP_TMR1 = 0x00000630, 120 GPIO_PARTIAL_REMAP_TMR1 = 0x00000631, 121 GPIO_FULL_REMAP_TMR1 = 0x00000633, 122 123 GPIO_NO_REMAP_TMR2 = 0x00000830, 124 GPIO_PARTIAL_REMAP1_TMR2 = 0x00000831, 125 GPIO_PARTIAL_REMAP2_TMR2 = 0x00000832, 126 GPIO_FULL_REMAP_TMR2 = 0x00000833, 127 128 GPIO_NO_REMAP_TMR3 = 0x00000A30, 129 GPIO_PARTIAL_REMAP_TMR3 = 0x00000A32, 130 GPIO_FULL_REMAP_TMR3 = 0x00000A33, 131 132 GPIO_NO_REMAP_TMR4 = 0x00000C10, 133 GPIO_REMAP_TMR4 = 0x00000C11, 134 135 GPIO_NO_REMAP_CAN1 = 0x00000D30, 136 GPIO_REMAP1_CAN1 = 0x00000D32, 137 GPIO_REMAP2_CAN1 = 0x00000D33, 138 139 GPIO_NO_REMAP_PD01 = 0x00000F10, 140 GPIO_REMAP_PD01 = 0x00000F11, 141 142 GPIO_NO_REMAP_TMR5CH4_LSI = 0x00001010, 143 GPIO_REMAP_TMR5CH4_LSI = 0x00001011, 144 145 #if !defined(APM32F10X_CL) 146 GPIO_NO_REMAP_ADC1_ETRGINJ = 0x00001110, 147 GPIO_REMAP_ADC1_ETRGINJ = 0x00001111, 148 149 GPIO_NO_REMAP_ADC1_ETRGREG = 0x00001210, 150 GPIO_REMAP_ADC1_ETRGREG = 0x00001211, 151 152 GPIO_NO_REMAP_ADC2_ETRGINJ = 0x00001310, 153 GPIO_REMAP_ADC2_ETRGINJ = 0x00001311, 154 155 GPIO_NO_REMAP_ADC2_ETRGREG = 0x00001410, 156 GPIO_REMAP_ADC2_ETRGREG = 0x00001411, 157 158 GPIO_NO_REMAP_ETH = 0x00001510, 159 GPIO_REMAP_ETH = 0x00001511, 160 161 GPIO_NO_REMAP_CAN2 = 0x00001610, 162 GPIO_REMAP_CAN2 = 0x00001611, 163 164 GPIO_REMAP_MII = 0x00001710, 165 GPIO_REMAP_RMII = 0x00001711, 166 167 GPIO_NO_REMAP_SWJ = 0x00001870, 168 GPIO_REMAP_SWJ_NOJTRST = 0x00001871, 169 GPIO_REMAP_SWJ_JTAGDISABLE = 0x00001872, 170 GPIO_REMAP_SWJ_DISABLE = 0x00001874, 171 172 GPIO_NO_REMAP_EMMC_NADV = 0x00010A10, 173 GPIO_REMAP_EMMC_NADV = 0x00010A11, 174 175 #else /* APM32F10X_CL */ 176 GPIO_NO_REMAP_ETH_MAC = 0x00001510, 177 GPIO_REMAP_ETH_MAC = 0x00001511, 178 179 GPIO_NO_REMAP_CAN2 = 0x00001610, 180 GPIO_REMAP_CAN2 = 0x00001611, 181 182 GPIO_REMAP_MACEISEL_MII = 0x00001710, 183 GPIO_REMAP_MACEISEL_RMII = 0x00001711, 184 185 GPIO_NO_REMAP_SWJ = 0x00001870, 186 GPIO_REMAP_SWJ_NOJTRST = 0x00001871, 187 GPIO_REMAP_SWJ_JTAGDISABLE = 0x00001872, 188 GPIO_REMAP_SWJ_DISABLE = 0x00001874, 189 190 GPIO_NO_REMAP_SPI3 = 0x00001C10, 191 GPIO_REMAP_SPI3 = 0x00001C11, 192 193 GPIO_NO_REMAP_TMR2ITR1 = 0x00001D10, 194 GPIO_REMAP_TMR2ITR1 = 0x00001D11, 195 196 GPIO_NO_REMAP_PTP_PPS = 0x00001E10, 197 GPIO_REMAP_PTP_PPS = 0x00001E11, 198 #endif 199 } GPIO_REMAP_T; 200 201 /** 202 * @brief gpio port source define 203 */ 204 typedef enum 205 { 206 GPIO_PORT_SOURCE_A, 207 GPIO_PORT_SOURCE_B, 208 GPIO_PORT_SOURCE_C, 209 GPIO_PORT_SOURCE_D, 210 GPIO_PORT_SOURCE_E, 211 GPIO_PORT_SOURCE_F, 212 GPIO_PORT_SOURCE_G, 213 } GPIO_PORT_SOURCE_T; 214 215 /** 216 * @brief gpio pin source define 217 */ 218 typedef enum 219 { 220 GPIO_PIN_SOURCE_0, 221 GPIO_PIN_SOURCE_1, 222 GPIO_PIN_SOURCE_2, 223 GPIO_PIN_SOURCE_3, 224 GPIO_PIN_SOURCE_4, 225 GPIO_PIN_SOURCE_5, 226 GPIO_PIN_SOURCE_6, 227 GPIO_PIN_SOURCE_7, 228 GPIO_PIN_SOURCE_8, 229 GPIO_PIN_SOURCE_9, 230 GPIO_PIN_SOURCE_10, 231 GPIO_PIN_SOURCE_11, 232 GPIO_PIN_SOURCE_12, 233 GPIO_PIN_SOURCE_13, 234 GPIO_PIN_SOURCE_14, 235 GPIO_PIN_SOURCE_15, 236 } GPIO_PIN_SOURCE_T; 237 238 /**@} end of group GPIO_Enumerations*/ 239 240 241 /** @defgroup GPIO_Structures Structures 242 @{ 243 */ 244 245 /** 246 * @brief GPIO Config structure definition 247 */ 248 typedef struct 249 { 250 uint16_t pin; 251 GPIO_SPEED_T speed; 252 GPIO_MODE_T mode; 253 } GPIO_Config_T; 254 255 /**@} end of group GPIO_Structures*/ 256 257 /** @defgroup GPIO_Functions Functions 258 @{ 259 */ 260 261 /* Reset and common Configuration */ 262 void GPIO_Reset(GPIO_T* port); 263 void GPIO_AFIOReset(void); 264 void GPIO_Config(GPIO_T* port, GPIO_Config_T* gpioConfig); 265 void GPIO_ConfigStructInit(GPIO_Config_T* gpioConfig); 266 267 /* Read */ 268 uint8_t GPIO_ReadInputBit(GPIO_T* port, uint16_t pin); 269 uint16_t GPIO_ReadInputPort(GPIO_T* port); 270 uint8_t GPIO_ReadOutputBit(GPIO_T* port, uint16_t pin); 271 uint16_t GPIO_ReadOutputPort(GPIO_T* port); 272 273 /* Write */ 274 void GPIO_SetBit(GPIO_T* port, uint16_t pin); 275 void GPIO_ResetBit(GPIO_T* port, uint16_t pin); 276 void GPIO_WriteOutputPort(GPIO_T* port, uint16_t portValue); 277 void GPIO_WriteBitValue(GPIO_T* port, uint16_t pin, uint8_t bitVal); 278 279 /* GPIO Configuration */ 280 void GPIO_ConfigPinLock(GPIO_T* port, uint16_t pin); 281 void GPIO_ConfigEventOutput(GPIO_PORT_SOURCE_T portSource, GPIO_PIN_SOURCE_T pinSource); 282 void GPIO_EnableEventOutput(void); 283 void GPIO_DisableEventOutput(void); 284 void GPIO_ConfigPinRemap(GPIO_REMAP_T remap); 285 void GPIO_ConfigEINTLine(GPIO_PORT_SOURCE_T portSource, GPIO_PIN_SOURCE_T pinSource); 286 287 /**@} end of group GPIO_Functions*/ 288 /**@} end of group GPIO_Driver */ 289 /**@} end of group APM32F10x_StdPeriphDriver*/ 290 291 #ifdef __cplusplus 292 } 293 #endif 294 295 #endif /* __APM32F10X_GPIO_H */ 296