1 /*!
2 * @file apm32f4Xx_sdio.c
3 *
4 * @brief This file provides all the SDIO firmware functions
5 *
6 * @version V1.0.2
7 *
8 * @date 2022-06-23
9 *
10 * @attention
11 *
12 * Copyright (C) 2021-2022 Geehy Semiconductor
13 *
14 * You may not use this file except in compliance with the
15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
16 *
17 * The program is only for reference, which is distributed in the hope
18 * that it will be usefull and instructional for customers to develop
19 * their software. Unless required by applicable law or agreed to in
20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
23 * and limitations under the License.
24 */
25
26 #include "apm32f4Xx_sdio.h"
27 #include "apm32f4Xx_rcm.h"
28
29 /** @addtogroup APM32F4xx_StdPeriphDriver
30 @{
31 */
32
33 /** @defgroup SDIO_Driver
34 * @brief SDIO driver modules
35 @{
36 */
37
38 /** @defgroup SDIO_Functions
39 @{
40 */
41
42 /*!
43 * @brief Reset sdio peripheral registers to their default reset values
44 *
45 * @param None
46 *
47 * @retval None
48 */
SDIO_Reset(void)49 void SDIO_Reset(void)
50 {
51 RCM_EnableAPB2PeriphReset(RCM_APB2_PERIPH_SDIO);
52 RCM_DisableAPB2PeriphReset(RCM_APB2_PERIPH_SDIO);
53 }
54
55 /*!
56 * @brief Config the SDIO peripheral according to the specified parameters in the sdioConfig
57 *
58 * @param sdioConfig: pointer to a SDIO_Config_T structure
59 *
60 * @retval None
61 */
SDIO_Config(SDIO_Config_T * sdioConfig)62 void SDIO_Config(SDIO_Config_T *sdioConfig)
63 {
64 SDIO->CLKCTRL_B.CLKDIV = sdioConfig->clockDiv;
65 SDIO->CLKCTRL_B.PWRSAV = sdioConfig->clockPowerSave;
66 SDIO->CLKCTRL_B.BYPASSEN = sdioConfig->clockBypass;
67 SDIO->CLKCTRL_B.WBSEL = sdioConfig->busWide;
68 SDIO->CLKCTRL_B.DEPSEL = sdioConfig->clockEdge;
69 SDIO->CLKCTRL_B.HFCEN = sdioConfig->hardwareFlowControl;
70 }
71
72 /*!
73 * @brief Fills each SDIO_Config_T member with its default value
74 *
75 * @param sdioConfig: pointer to a SDIO_Config_T structure
76 *
77 * @retval None
78 */
SDIO_ConfigStructInit(SDIO_Config_T * sdioConfig)79 void SDIO_ConfigStructInit(SDIO_Config_T *sdioConfig)
80 {
81 sdioConfig->clockDiv = 0x00;
82 sdioConfig->clockEdge = SDIO_CLOCK_EDGE_RISING;
83 sdioConfig->clockBypass = SDIO_CLOCK_BYPASS_DISABLE;
84 sdioConfig->clockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
85 sdioConfig->busWide = SDIO_BUS_WIDE_1B;
86 sdioConfig->hardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
87 }
88
89 /*!
90 * @brief Enables the SDIO clock
91 *
92 * @param None
93 *
94 * @retval None
95 */
SDIO_EnableClock(void)96 void SDIO_EnableClock(void)
97 {
98 SDIO->CLKCTRL_B.CLKEN = SET;
99 }
100
101 /*!
102 * @brief Disables the SDIO clock
103 *
104 * @param None
105 *
106 * @retval None
107 */
SDIO_DisableClock(void)108 void SDIO_DisableClock(void)
109 {
110 SDIO->CLKCTRL_B.CLKEN = RESET;
111 }
112
113 /*!
114 * @brief Sets the power status of the controller
115 *
116 * @param powerState: new state of the Power state
117 * The parameter can be one of following values:
118 * @arg SDIO_POWER_STATE_OFF : Power off
119 * @arg SDIO_POWER_STATE_ON : Power on
120 *
121 * @retval None
122 */
SDIO_ConfigPowerState(SDIO_POWER_STATE_T powerState)123 void SDIO_ConfigPowerState(SDIO_POWER_STATE_T powerState)
124 {
125 SDIO->PWRCTRL_B.PWRCTRL = powerState;
126 }
127
128 /*!
129 * @brief Reads the SDIO power state
130 *
131 * @param None
132 *
133 * @retval The new state SDIO power
134 *
135 * @note 0x00:Power OFF, 0x02:Power UP, 0x03:Power ON
136 */
SDIO_ReadPowerState(void)137 uint32_t SDIO_ReadPowerState(void)
138 {
139 return (uint8_t)SDIO->PWRCTRL_B.PWRCTRL;
140 }
141
142 /*!
143 * @brief Enables the SDIO DMA request
144 *
145 * @param None
146 *
147 * @retval None
148 */
SDIO_EnableDMA(void)149 void SDIO_EnableDMA(void)
150 {
151 SDIO->DCTRL_B.DMAEN = SET;
152 }
153
154 /*!
155 * @brief Disables the SDIO DMA request
156 *
157 * @param None
158 *
159 * @retval None
160 */
SDIO_DisableDMA(void)161 void SDIO_DisableDMA(void)
162 {
163 SDIO->DCTRL_B.DMAEN = RESET;
164 }
165
166 /*!
167 * @brief Configs the SDIO Command and send the command
168 *
169 * @param cmdConfig: pointer to a SDIO_CmdConfig_T structure
170 *
171 * @retval None
172 */
SDIO_TxCommand(SDIO_CmdConfig_T * cmdConfig)173 void SDIO_TxCommand(SDIO_CmdConfig_T *cmdConfig)
174 {
175 uint32_t tempReg = 0;
176
177 SDIO->ARG = cmdConfig->argument;
178 tempReg = SDIO->CMD;
179 /* Clear CMDINDEX, WAITRES, WAITINT, WENDDATA, CPSMEN bits */
180 tempReg &= ((uint32_t)0xFFFFF800);
181 tempReg |= (uint32_t)(cmdConfig->cmdIndex) | (cmdConfig->response) << 6
182 | (cmdConfig->wait) << 8 | (cmdConfig->CPSM) << 10;
183 SDIO->CMD = tempReg;
184 }
185
186 /*!
187 * @brief Fills each cmdConfig member with its default value
188 *
189 * @param cmdConfig: pointer to a SDIO_CmdConfig_T structure
190 *
191 * @retval None
192 */
SDIO_TxCommandStructInit(SDIO_CmdConfig_T * cmdConfig)193 void SDIO_TxCommandStructInit(SDIO_CmdConfig_T *cmdConfig)
194 {
195 cmdConfig->argument = 0x00;
196 cmdConfig->cmdIndex = 0x00;
197 cmdConfig->response = SDIO_RESPONSE_NO;
198 cmdConfig->wait = SDIO_WAIT_NO;
199 cmdConfig->CPSM = SDIO_CPSM_DISABLE;
200 }
201
202 /*!
203 * @brief Reads the SDIO command response
204 *
205 * @param None
206 *
207 * @retval The command index of the last command response received
208 */
SDIO_ReadCommandResponse(void)209 uint8_t SDIO_ReadCommandResponse(void)
210 {
211 return (uint8_t)(SDIO->CMDRES);
212 }
213
214 /*!
215 * @brief Reads the SDIO response
216 *
217 * @param res: Specifies the SDIO response register
218 * The parameter can be one of following values:
219 * @arg SDIO_RES1 : Response Register 1
220 * @arg SDIO_RES2 : Response Register 2
221 * @arg SDIO_RES3 : Response Register 3
222 * @arg SDIO_RES4 : Response Register 4
223 *
224 * @retval The Corresponding response register value
225 */
SDIO_ReadResponse(SDIO_RES_T res)226 uint32_t SDIO_ReadResponse(SDIO_RES_T res)
227 {
228 __IO uint32_t tmp = 0;
229
230 tmp = ((uint32_t)(SDIO_BASE + 0x14)) + res;
231
232 return (*(__IO uint32_t *) tmp);
233 }
234
235 /*!
236 * @brief Configs the SDIO Dataaccording to the specified parameters in the dataConfig
237 *
238 * @param dataConfig: pointer to a SDIO_DataConfig_T structure
239 *
240 * @retval None
241 */
SDIO_ConfigData(SDIO_DataConfig_T * dataConfig)242 void SDIO_ConfigData(SDIO_DataConfig_T *dataConfig)
243 {
244 uint32_t tempReg = 0;
245
246 SDIO->DATATIME = dataConfig->dataTimeOut;
247
248 SDIO->DATALEN = dataConfig->dataLength;
249
250 tempReg = SDIO->DCTRL;
251 /* Clear DTEN, DTSEL, DTDRCFG and DBSIZE bits */
252 tempReg &= ((uint32_t)0xFFFFFF08);
253 tempReg |= (uint32_t)(dataConfig->dataBlockSize) << 4 | (dataConfig->transferDir) << 1
254 | (dataConfig->transferMode) << 2 | (dataConfig->DPSM);
255 SDIO->DCTRL = tempReg;
256 }
257
258 /*!
259 * @brief Fills each SDIO_DataConfig_T member with its default value
260 *
261 * @param dataConfig: pointer to a SDIO_DataConfig_T structure
262 *
263 * @retval None
264 */
SDIO_ConfigDataStructInit(SDIO_DataConfig_T * dataConfig)265 void SDIO_ConfigDataStructInit(SDIO_DataConfig_T *dataConfig)
266 {
267 dataConfig->dataTimeOut = 0xFFFFFFFF;
268 dataConfig->dataLength = 0x00;
269 dataConfig->dataBlockSize = SDIO_DATA_BLOCKSIZE_1B;
270 dataConfig->transferDir = SDIO_TRANSFER_DIR_TO_CARD;
271 dataConfig->transferMode = SDIO_TRANSFER_MODE_BLOCK;
272 dataConfig->DPSM = SDIO_DPSM_DISABLE;
273 }
274
275 /*!
276 * @brief Reads the SDIO Data counter
277 *
278 * @param None
279 *
280 * @retval The SDIO Data counter value
281 */
SDIO_ReadDataCounter(void)282 uint32_t SDIO_ReadDataCounter(void)
283 {
284 return SDIO->DCNT;
285 }
286
287 /*!
288 * @brief Write the SDIO Data
289 *
290 * @param data : a 32-bit data to write
291 *
292 * @retval None
293 */
SDIO_WriteData(uint32_t data)294 void SDIO_WriteData(uint32_t data)
295 {
296 SDIO->FIFODATA = data;
297 }
298
299 /*!
300 * @brief Reads the SDIO Data
301 *
302 * @param None
303 *
304 * @retval The SDIO FIFO Data value
305 */
SDIO_ReadData(void)306 uint32_t SDIO_ReadData(void)
307 {
308 return SDIO->FIFODATA;
309 }
310
311 /*!
312 * @brief Reads the SDIO FIFO count value
313 *
314 * @param None
315 *
316 * @retval The SDIO FIFO count value
317 */
SDIO_ReadFIFOCount(void)318 uint32_t SDIO_ReadFIFOCount(void)
319 {
320 return SDIO->FIFOCNT;
321 }
322
323 /*!
324 * @brief Enables SDIO start read wait
325 *
326 * @param None
327 *
328 * @retval None
329 */
SDIO_EnableStartReadWait(void)330 void SDIO_EnableStartReadWait(void)
331 {
332 SDIO->DCTRL_B.RWSTR = SET;
333 }
334
335 /*!
336 * @brief Disables SDIO stop read wait
337 *
338 * @param None
339 *
340 * @retval None
341 */
SDIO_DisableStartReadWait(void)342 void SDIO_DisableStartReadWait(void)
343 {
344 SDIO->DCTRL_B.RWSTR = RESET;
345 }
346
347 /*!
348 * @brief Disables SDIO start read wait
349 *
350 * @param None
351 *
352 * @retval None
353 */
SDIO_DisableStopReadWait(void)354 void SDIO_DisableStopReadWait(void)
355 {
356 SDIO->DCTRL_B.RWSTOP = RESET;
357 }
358
359 /*!
360 * @brief Enables SDIO stop read wait
361 *
362 * @param None
363 *
364 * @retval None
365 */
SDIO_EnableStopReadWait(void)366 void SDIO_EnableStopReadWait(void)
367 {
368 SDIO->DCTRL_B.RWSTOP = SET;
369 }
370
371 /*!
372 * @brief Config the read wait interval
373 *
374 * @param readWaitMode: SDIO read Wait Mode
375 * The parameter can be one of following values:
376 * @arg SDIO_READ_WAIT_MODE_DATA2 : Read Wait control using SDIO_DATA2
377 * @arg SDIO_READ_WAIT_MODE_CLK : Read Wait control by stopping SDIOCLK
378 *
379 * @retval None
380 *
381 * @note
382 */
SDIO_ConfigSDIOReadWaitMode(SDIO_READ_WAIT_MODE_T readWaitMode)383 void SDIO_ConfigSDIOReadWaitMode(SDIO_READ_WAIT_MODE_T readWaitMode)
384 {
385 SDIO->DCTRL_B.RDWAIT = readWaitMode;
386 }
387 /*!
388 * @brief Enables SDIO SD I/O Mode Operation
389 *
390 * @param None
391 *
392 * @retval None
393 */
SDIO_EnableSDIO(void)394 void SDIO_EnableSDIO(void)
395 {
396 SDIO->DCTRL_B.SDIOF = SET;
397 }
398
399 /*!
400 * @brief Disables SDIO SD I/O Mode Operation
401 *
402 * @param None
403 *
404 * @retval None
405 */
SDIO_DisableSDIO(void)406 void SDIO_DisableSDIO(void)
407 {
408 SDIO->DCTRL_B.SDIOF = RESET;
409 }
410
411 /*!
412 * @brief Ensables SDIO SD I/O Mode suspend command sending
413 *
414 * @param None
415 *
416 * @retval None
417 */
SDIO_EnableTxSDIOSuspend(void)418 void SDIO_EnableTxSDIOSuspend(void)
419 {
420 SDIO->CMD_B.SDIOSC = SET;
421 }
422
423 /*!
424 * @brief Disables SDIO SD I/O Mode suspend command sending
425 *
426 * @param None
427 *
428 * @retval None
429 */
SDIO_DisableTxSDIOSuspend(void)430 void SDIO_DisableTxSDIOSuspend(void)
431 {
432 SDIO->CMD_B.SDIOSC = RESET;
433 }
434
435 /*!
436 * @brief Enables the command completion signal
437 *
438 * @param None
439 *
440 * @retval None
441 */
SDIO_EnableCommandCompletion(void)442 void SDIO_EnableCommandCompletion(void)
443 {
444 SDIO->CMD_B.CMDCPEN = SET;
445 }
446
447 /*!
448 * @brief Disables the command completion signal
449 *
450 * @param None
451 *
452 * @retval None
453 */
SDIO_DisableCommandCompletion(void)454 void SDIO_DisableCommandCompletion(void)
455 {
456 SDIO->CMD_B.CMDCPEN = RESET;
457 }
458
459 /*!
460 * @brief Enables the CE-ATA interrupt
461 *
462 * @param None
463 *
464 * @retval None
465 */
SDIO_EnableCEATAInterrupt(void)466 void SDIO_EnableCEATAInterrupt(void)
467 {
468 SDIO->CMD_B.INTEN = RESET;
469 }
470
471 /*!
472 * @brief Disables the CE-ATA interrupt
473 *
474 * @param None
475 *
476 * @retval None
477 */
SDIO_DisableCEATAInterrupt(void)478 void SDIO_DisableCEATAInterrupt(void)
479 {
480 SDIO->CMD_B.INTEN = SET;
481 }
482
483 /*!
484 * @brief Ensables Sends CE-ATA command
485 *
486 * @param None
487 *
488 * @retval None
489 */
SDIO_EnableTxCEATA(void)490 void SDIO_EnableTxCEATA(void)
491 {
492 SDIO->CMD_B.ATACMD = SET;
493 }
494
495 /*!
496 * @brief Disables Sends CE-ATA command
497 *
498 * @param None
499 *
500 * @retval None
501 */
SDIO_DisableTxCEATA(void)502 void SDIO_DisableTxCEATA(void)
503 {
504 SDIO->CMD_B.ATACMD = RESET;
505 }
506
507 /*!
508 * @brief Enables the specified SDIO interrupt
509 *
510 * @param interrupt: Select the SDIO interrupt source
511 * The parameter can be any combination of following values:
512 * @arg SDIO_INT_COMRESP : Command response received (CRC check failed) interrupt
513 * @arg SDIO_INT_DBDR : Data block sent/received (CRC check failed) interrupt
514 * @arg SDIO_INT_CMDRESTO : Command response timeout interrupt
515 * @arg SDIO_INT_DATATO : Data timeout interrupt
516 * @arg SDIO_INT_TXUDRER : Transmit FIFO underrun error interrupt
517 * @arg SDIO_INT_RXOVRER : Received FIFO overrun error interrupt
518 * @arg SDIO_INT_CMDRES : Command response received (CRC check passed) interrupt
519 * @arg SDIO_INT_CMDSENT : Command sent (no response required) interrupt
520 * @arg SDIO_INT_DATAEND : Data end (data counter, SDIDCOUNT, is zero) interrupt
521 * @arg SDIO_INT_SBE : Start bit not detected on all data signals in wide bus mode interrupt
522 * @arg SDIO_INT_DBCP : Data block sent/received (CRC check passed) interrupt
523 * @arg SDIO_INT_CMDACT : Command transfer in progress interrupt
524 * @arg SDIO_INT_TXACT : Data transmit in progress interrupt
525 * @arg SDIO_INT_RXACT : Data receive in progress interrupt
526 * @arg SDIO_INT_TXFHF : Transmit FIFO Half Empty interrupt
527 * @arg SDIO_INT_RXFHF : Receive FIFO Half Full interrupt
528 * @arg SDIO_INT_TXFF : Transmit FIFO full interrupt
529 * @arg SDIO_INT_RXFF : Receive FIFO full interrupt
530 * @arg SDIO_INT_TXFE : Transmit FIFO empty interrupt
531 * @arg SDIO_INT_RXFE : Receive FIFO empty interrupt
532 * @arg SDIO_INT_TXDA : Data available in transmit FIFO interrupt
533 * @arg SDIO_INT_RXDA : Data available in receive FIFO interrupt
534 * @arg SDIO_INT_SDIOINT : SD I/O interrupt received interrupt
535 * @arg SDIO_INT_ATAEND : CE-ATA command completion signal received for CMD61 interrupt
536 *
537 * @retval None
538 */
SDIO_EnableInterrupt(uint32_t interrupt)539 void SDIO_EnableInterrupt(uint32_t interrupt)
540 {
541 SDIO->MASK |= interrupt;
542 }
543
544 /*!
545 * @brief Disables the specified SDIO interrupt
546 *
547 * @param interrupt: Select the SDIO interrupt source
548 * The parameter can be any combination of following values:
549 * @arg SDIO_INT_COMRESP : Command response received (CRC check failed) interrupt
550 * @arg SDIO_INT_DBDR : Data block sent/received (CRC check failed) interrupt
551 * @arg SDIO_INT_CMDRESTO : Command response timeout interrupt
552 * @arg SDIO_INT_DATATO : Data timeout interrupt
553 * @arg SDIO_INT_TXUDRER : Transmit FIFO underrun error interrupt
554 * @arg SDIO_INT_RXOVRER : Received FIFO overrun error interrupt
555 * @arg SDIO_INT_CMDRES : Command response received (CRC check passed) interrupt
556 * @arg SDIO_INT_CMDSENT : Command sent (no response required) interrupt
557 * @arg SDIO_INT_DATAEND : Data end (data counter, SDIDCOUNT, is zero) interrupt
558 * @arg SDIO_INT_SBE : Start bit not detected on all data signals in wide bus mode interrupt
559 * @arg SDIO_INT_DBCP : Data block sent/received (CRC check passed) interrupt
560 * @arg SDIO_INT_CMDACT : Command transfer in progress interrupt
561 * @arg SDIO_INT_TXACT : Data transmit in progress interrupt
562 * @arg SDIO_INT_RXACT : Data receive in progress interrupt
563 * @arg SDIO_INT_TXFHF : Transmit FIFO Half Empty interrupt
564 * @arg SDIO_INT_RXFHF : Receive FIFO Half Full interrupt
565 * @arg SDIO_INT_TXFF : Transmit FIFO full interrupt
566 * @arg SDIO_INT_RXFF : Receive FIFO full interrupt
567 * @arg SDIO_INT_TXFE : Transmit FIFO empty interrupt
568 * @arg SDIO_INT_RXFE : Receive FIFO empty interrupt
569 * @arg SDIO_INT_TXDA : Data available in transmit FIFO interrupt
570 * @arg SDIO_INT_RXDA : Data available in receive FIFO interrupt
571 * @arg SDIO_INT_SDIOINT : SD I/O interrupt received interrupt
572 * @arg SDIO_INT_ATAEND : CE-ATA command completion signal received for CMD61 interrupt
573 *
574 * @retval None
575 */
SDIO_DisableInterrupt(uint32_t interrupt)576 void SDIO_DisableInterrupt(uint32_t interrupt)
577 {
578 SDIO->MASK &= ~interrupt;
579 }
580
581 /*!
582 * @brief Reads the specified SDIO flag
583 *
584 * @param flag: Select the flag to read
585 * The parameter can be one of following values:
586 * @arg SDIO_FLAG_COMRESP : Command response received (CRC check failed) flag
587 * @arg SDIO_FLAG_DBDR : Data block sent/received (CRC check failed) flag
588 * @arg SDIO_FLAG_CMDRESTO : Command response timeout flag
589 * @arg SDIO_FLAG_DATATO : Data timeout flag
590 * @arg SDIO_FLAG_TXUDRER : Transmit FIFO underrun error flag
591 * @arg SDIO_FLAG_RXOVRER : Received FIFO overrun error flag
592 * @arg SDIO_FLAG_CMDRES : Command response received (CRC check passed) flag
593 * @arg SDIO_FLAG_CMDSENT : Command sent (no response required) flag
594 * @arg SDIO_FLAG_DATAEND : Data end (data counter is zero) flag
595 * @arg SDIO_FLAG_SBE : Start bit not detected on all data signals in wide bus mode flag
596 * @arg SDIO_FLAG_DBCP : Data block sent/received (CRC check passed) flag
597 * @arg SDIO_FLAG_CMDACT : Command transfer in progress flag
598 * @arg SDIO_FLAG_TXACT : Data transmit in progress flag
599 * @arg SDIO_FLAG_RXACT : Data receive in progress flag
600 * @arg SDIO_FLAG_TXFHF : Transmit FIFO Half Empty flag
601 * @arg SDIO_FLAG_RXFHF : Receive FIFO Half Full flag
602 * @arg SDIO_FLAG_TXFF : Transmit FIFO full flag
603 * @arg SDIO_FLAG_RXFF : Receive FIFO full flag
604 * @arg SDIO_FLAG_TXFE : Transmit FIFO empty flag
605 * @arg SDIO_FLAG_RXFE : Receive FIFO empty flag
606 * @arg SDIO_FLAG_TXDA : Data available in transmit FIFO flag
607 * @arg SDIO_FLAG_RXDA : Data available in receive FIFO flag
608 * @arg SDIO_FLAG_SDIOINT : SD I/O interrupt received flag
609 * @arg SDIO_FLAG_ATAEND : CE-ATA command completion signal received for CMD61 flag
610 *
611 * @retval SET or RESET
612 */
SDIO_ReadStatusFlag(SDIO_FLAG_T flag)613 uint8_t SDIO_ReadStatusFlag(SDIO_FLAG_T flag)
614 {
615 return (SDIO->STS & flag) ? SET : RESET;
616 }
617
618 /*!
619 * @brief Clears the specified SDIO flag
620 *
621 * @param flag: Select the flag to clear
622 * The parameter can be any combination of following values:
623 * @arg SDIO_FLAG_COMRESP : Command response received (CRC check failed) flag
624 * @arg SDIO_FLAG_DBDR : Data block sent/received (CRC check failed) flag
625 * @arg SDIO_FLAG_CMDRESTO : Command response timeout flag
626 * @arg SDIO_FLAG_DATATO : Data timeout flag
627 * @arg SDIO_FLAG_TXUDRER : Transmit FIFO underrun error flag
628 * @arg SDIO_FLAG_RXOVRER : Received FIFO overrun error flag
629 * @arg SDIO_FLAG_CMDRES : Command response received (CRC check passed) flag
630 * @arg SDIO_FLAG_CMDSENT : Command sent (no response required) flag
631 * @arg SDIO_FLAG_DATAEND : Data end (data counter is zero) flag
632 * @arg SDIO_FLAG_SBE : Start bit not detected on all data signals in wide bus mode flag
633 * @arg SDIO_FLAG_DBCP : Data block sent/received (CRC check passed) flag
634 * @arg SDIO_FLAG_SDIOINT : SD I/O interrupt received flag
635 * @arg SDIO_FLAG_ATAEND : CE-ATA command completion signal received for CMD61 flag
636 *
637 * @retval None
638 */
SDIO_ClearStatusFlag(uint32_t flag)639 void SDIO_ClearStatusFlag(uint32_t flag)
640 {
641 SDIO->ICF = flag;
642 }
643
644 /*!
645 * @brief Reads the specified SDIO Interrupt flag
646 *
647 * @param flag: Select the SDIO interrupt source
648 * The parameter can be one of following values:
649 * @arg SDIO_INT_COMRESP : Command response received (CRC check failed) interrupt
650 * @arg SDIO_INT_DBDR : Data block sent/received (CRC check failed) interrupt
651 * @arg SDIO_INT_CMDRESTO : Command response timeout interrupt
652 * @arg SDIO_INT_DATATO : Data timeout interrupt
653 * @arg SDIO_INT_TXUDRER : Transmit FIFO underrun error interrupt
654 * @arg SDIO_INT_RXOVRER : Received FIFO overrun error interrupt
655 * @arg SDIO_INT_CMDRES : Command response received (CRC check passed) interrupt
656 * @arg SDIO_INT_CMDSENT : Command sent (no response required) interrupt
657 * @arg SDIO_INT_DATAEND : Data end (data counter is zero) interrupt
658 * @arg SDIO_INT_SBE : Start bit not detected on all data signals in wide bus mode interrupt
659 * @arg SDIO_INT_DBCP : Data block sent/received (CRC check passed) interrupt
660 * @arg SDIO_INT_CMDACT : Command transfer in progress interrupt
661 * @arg SDIO_INT_TXACT : Data transmit in progress interrupt
662 * @arg SDIO_INT_RXACT : Data receive in progress interrupt
663 * @arg SDIO_INT_TXFHF : Transmit FIFO Half Empty interrupt
664 * @arg SDIO_INT_RXFHF : Receive FIFO Half Full interrupt
665 * @arg SDIO_INT_TXFF : Transmit FIFO full interrupt
666 * @arg SDIO_INT_RXFF : Receive FIFO full interrupt
667 * @arg SDIO_INT_TXFE : Transmit FIFO empty interrupt
668 * @arg SDIO_INT_RXFE : Receive FIFO empty interrupt
669 * @arg SDIO_INT_TXDA : Data available in transmit FIFO interrupt
670 * @arg SDIO_INT_RXDA : Data available in receive FIFO interrupt
671 * @arg SDIO_INT_SDIOINT : SD I/O interrupt received interrupt
672 * @arg SDIO_INT_ATAEND : CE-ATA command completion signal received for CMD61 interrupt
673 *
674 * @retval SET or RESET
675 */
SDIO_ReadIntFlag(SDIO_INT_T flag)676 uint8_t SDIO_ReadIntFlag(SDIO_INT_T flag)
677 {
678 uint32_t intEnable;
679 uint32_t intStatus;
680
681 intEnable = (uint32_t)(SDIO->MASK & flag);
682 intStatus = (uint32_t)(SDIO->STS & flag);
683
684 if (intEnable && intStatus)
685 {
686 return SET;
687 }
688
689 return RESET;
690 }
691
692 /*!
693 * @brief Clears the specified SDIO Interrupt pending bits
694 *
695 * @param flag: Select the SDIO interrupt source
696 * The parameter can be any combination of following values:
697 * @arg SDIO_INT_COMRESP : Command response received (CRC check failed) interrupt
698 * @arg SDIO_INT_DBDR : Data block sent/received (CRC check failed) interrupt
699 * @arg SDIO_INT_CMDRESTO : Command response timeout interrupt
700 * @arg SDIO_INT_DATATO : Data timeout interrupt
701 * @arg SDIO_INT_TXUDRER : Transmit FIFO underrun error interrupt
702 * @arg SDIO_INT_RXOVRER : Received FIFO overrun error interrupt
703 * @arg SDIO_INT_CMDRES : Command response received (CRC check passed) interrupt
704 * @arg SDIO_INT_CMDSENT : Command sent (no response required) interrupt
705 * @arg SDIO_INT_DATAEND : Data end (data counter is zero) interrupt
706 * @arg SDIO_INT_SBE : Start bit not detected on all data signals in wide bus mode interrupt
707 * @arg SDIO_INT_DBCP : Data block sent/received (CRC check passed) interrupt
708 * @arg SDIO_INT_SDIOINT : SD I/O interrupt received interrupt
709 * @arg SDIO_INT_ATAEND : CE-ATA command completion signal received for CMD61 interrupt
710 *
711 * @retval None
712 */
SDIO_ClearIntFlag(uint32_t flag)713 void SDIO_ClearIntFlag(uint32_t flag)
714 {
715 SDIO->ICF = flag;
716 }
717
718 /**@} end of group SDIO_Functions */
719 /**@} end of group SDIO_Driver */
720 /**@} end of group APM32F4xx_StdPeriphDriver */
721