1 /*! 2 * @file apm32s10x_adc.h 3 * 4 * @brief This file contains all the functions prototypes for the ADC firmware library 5 * 6 * @version V1.0.1 7 * 8 * @date 2022-12-31 9 * 10 * @attention 11 * 12 * Copyright (C) 2022-2023 Geehy Semiconductor 13 * 14 * You may not use this file except in compliance with the 15 * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE). 16 * 17 * The program is only for reference, which is distributed in the hope 18 * that it will be usefull and instructional for customers to develop 19 * their software. Unless required by applicable law or agreed to in 20 * writing, the program is distributed on an "AS IS" BASIS, WITHOUT 21 * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions 23 * and limitations under the License. 24 */ 25 26 /* Define to prevent recursive inclusion */ 27 #ifndef __APM32S10X_ADC_H 28 #define __APM32S10X_ADC_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 #include "apm32s10x.h" 35 36 /** @addtogroup APM32S10x_StdPeriphDriver 37 @{ 38 */ 39 40 /** @addtogroup ADC_Driver ADC Driver 41 @{ 42 */ 43 44 /** @defgroup ADC_Macros Macros 45 @{ 46 */ 47 48 /* ADC_IJD Offset */ 49 #define INJDATA_OFFSET ((uint8_t)0x28) 50 51 /* ADC_RDG register address */ 52 #define RDG_ADDRESS ((uint32_t)0x4001244C) 53 54 /* INJSEQ register config */ 55 #define INJSEQ_SET_INJSEQC ((uint32_t)0x0000001F) 56 #define INJSEQ_SET_INJSEQLEN ((uint32_t)0x00300000) 57 58 /* SMPTIM register SET */ 59 #define SMPCYCCFG_SET_SMPTIM1 ((uint32_t)0x00000007) 60 #define SMPCYCCFG_SET_SMPTIM2 ((uint32_t)0x00000007) 61 62 /* REGSEQ register SET */ 63 #define REGSEQC_SET_REGSEQ3 ((uint32_t)0x0000001F) 64 #define REGSEQC_SET_REGSEQ2 ((uint32_t)0x0000001F) 65 #define REGSEQC_SET_REGSEQ1 ((uint32_t)0x0000001F) 66 67 /**@} end of group ADC_Macros */ 68 69 /** @defgroup ADC_Enumerations Enumerations 70 @{ 71 */ 72 73 /** 74 * @brief ADC configuration Mode 75 */ 76 typedef enum 77 { 78 ADC_MODE_INDEPENDENT = ((uint32_t)0x00000000), /*!< Independent mode */ 79 ADC_MODE_REG_INJEC_SIMULT = ((uint32_t)0x00010000), /*!< Combined regular simultaneous and injected simultaneous mode */ 80 ADC_MODE_REG_SIMULT_ALTER_TRIG = ((uint32_t)0x00020000), /*!< Combined regular simultaneous and alternate trigger mode */ 81 ADC_MODE_INJEC_SIMULT_FAST_TNTERL = ((uint32_t)0x00030000), /*!< Combined injected simultaneous and fast interleaved mode */ 82 ADC_MODE_INJEC_SIMULT_SLOW_INTERL = ((uint32_t)0x00040000), /*!< Combined injected simultaneous and slow interleaved mode */ 83 ADC_MODE_INJEC_SIMULT = ((uint32_t)0x00050000), /*!< Injected simultaneous mode */ 84 ADC_MODE_REG_SIMULT = ((uint32_t)0x00060000), /*!< Regular simultaneous mode */ 85 ADC_MODE_FAST_INTERL = ((uint32_t)0x00070000), /*!< Fast interleaved mode */ 86 ADC_MODE_SLOW_INTERL = ((uint32_t)0x00080000), /*!< Slow interleaved mode */ 87 ADC_MODE_ALTER_TRIG = ((uint32_t)0x00090000) /*!< Alternate trigger mode */ 88 } ADC_MODE_T; 89 90 /** 91 * @brief ADC external trigger sources for regular channels conversion enumeration 92 */ 93 typedef enum 94 { 95 ADC_EXT_TRIG_CONV_TMR1_CC1 = ((uint32_t)0x00000000), 96 ADC_EXT_TRIG_CONV_TMR1_CC2 = ((uint32_t)0x00020000), 97 ADC_EXT_TRIG_CONV_TMR1_CC3 = ((uint32_t)0x00040000), 98 ADC_EXT_TRIG_CONV_TMR2_CC2 = ((uint32_t)0x00060000), 99 ADC_EXT_TRIG_CONV_TMR3_TRGO = ((uint32_t)0x00080000), 100 ADC_EXT_TRIG_CONV_TMR4_CC4 = ((uint32_t)0x000A0000), 101 ADC_EXT_TRIG_CONV_EINT11 = ((uint32_t)0x000C0000), 102 ADC_EXT_TRIG_CONV_None = ((uint32_t)0x000E0000), 103 } ADC_EXT_TRIG_CONV_T; 104 105 /** 106 * @brief ADC Data Align 107 */ 108 typedef enum 109 { 110 ADC_DATA_ALIGN_RIGHT = 0x00000000, 111 ADC_DATA_ALIGN_LEFT = 0x00000800 112 } ADC_DATA_ALIGN_T; 113 114 /** 115 * @brief ADC Channels 116 */ 117 typedef enum 118 { 119 ADC_CHANNEL_0 = ((uint8_t)0x00), 120 ADC_CHANNEL_1 = ((uint8_t)0x01), 121 ADC_CHANNEL_2 = ((uint8_t)0x02), 122 ADC_CHANNEL_3 = ((uint8_t)0x03), 123 ADC_CHANNEL_4 = ((uint8_t)0x04), 124 ADC_CHANNEL_5 = ((uint8_t)0x05), 125 ADC_CHANNEL_6 = ((uint8_t)0x06), 126 ADC_CHANNEL_7 = ((uint8_t)0x07), 127 ADC_CHANNEL_8 = ((uint8_t)0x08), 128 ADC_CHANNEL_9 = ((uint8_t)0x09), 129 ADC_CHANNEL_10 = ((uint8_t)0x0A), 130 ADC_CHANNEL_11 = ((uint8_t)0x0B), 131 ADC_CHANNEL_12 = ((uint8_t)0x0C), 132 ADC_CHANNEL_13 = ((uint8_t)0x0D), 133 ADC_CHANNEL_14 = ((uint8_t)0x0E), 134 ADC_CHANNEL_15 = ((uint8_t)0x0F), 135 ADC_CHANNEL_16 = ((uint8_t)0x10), 136 ADC_CHANNEL_TEMP_SENSOR = ((uint8_t)0x10), 137 ADC_CHANNEL_17 = ((uint8_t)0x11), 138 ADC_CHANNEL_V_REFINT = ((uint8_t)0x11) 139 } ADC_CHANNEL_T; 140 141 /** 142 * @brief ADC Sampling Time 143 */ 144 typedef enum 145 { 146 ADC_SAMPLETIME_1CYCLES5 = ((uint8_t)0x00), 147 ADC_SAMPLETIME_7CYCLES5 = ((uint8_t)0x01), 148 ADC_SAMPLETIME_13CYCLES5 = ((uint8_t)0x02), 149 ADC_SAMPLETIME_28CYCLES5 = ((uint8_t)0x03), 150 ADC_SAMPLETIME_41CYCLES5 = ((uint8_t)0x04), 151 ADC_SAMPLETIME_55CYCLES5 = ((uint8_t)0x05), 152 ADC_SAMPLETIME_71CYCLES5 = ((uint8_t)0x06), 153 ADC_SAMPLETIME_239CYCLES5 = ((uint8_t)0x07) 154 } ADC_SAMPLETIME_T; 155 156 /** 157 * @brief ADC external trigger sources for injected channels conversion 158 */ 159 typedef enum 160 { 161 ADC_EXT_TRIG_INJEC_CONV_TMR1_TRGO = ((uint8_t)0x00), 162 ADC_EXT_TRIG_INJEC_CONV_TMR1_CC4 = ((uint8_t)0x01), 163 ADC_EXT_TRIG_INJEC_CONV_TMR2_TRGO = ((uint8_t)0x02), 164 ADC_EXT_TRIG_INJEC_CONV_TMR2_CC1 = ((uint8_t)0x03), 165 ADC_EXT_TRIG_INJEC_CONV_TMR3_CC4 = ((uint8_t)0x04), 166 ADC_EXT_TRIG_INJEC_CONV_TMR4_TRGO = ((uint8_t)0x05), 167 ADC_EXT_TRIG_INJEC_CONV_EINT15 = ((uint8_t)0x06), 168 ADC_EXT_TRIG_INJEC_CONV_NONE = ((uint8_t)0x07), 169 } ADC_EXT_TRIG_INJEC_CONV_T; 170 171 /** 172 * @brief ADC Injected channels 173 */ 174 typedef enum 175 { 176 ADC_INJEC_CHANNEL_1 = ((uint8_t)0x14), 177 ADC_INJEC_CHANNEL_2 = ((uint8_t)0x18), 178 ADC_INJEC_CHANNEL_3 = ((uint8_t)0x1C), 179 ADC_INJEC_CHANNEL_4 = ((uint8_t)0x20) 180 } ADC_INJEC_CHANNEL_T; 181 182 /** 183 * @brief ADC Analog Watchdog Selection 184 */ 185 typedef enum 186 { 187 ADC_ANALOG_WATCHDOG_SINGLE_REG = ((uint32_t)0x00800200), 188 ADC_ANALOG_WATCHDOG_SINGLE_INJEC = ((uint32_t)0x00400200), 189 ADC_ANALOG_WATCHDOG_SINGLE_REG_INJEC = ((uint32_t)0x00C00200), 190 ADC_ANALOG_WATCHDOG_ALL_REG = ((uint32_t)0x00800000), 191 ADC_ANALOG_WATCHDOG_ALL_INJEC = ((uint32_t)0x00400000), 192 ADC_ANALOG_WATCHDOG_ALL_REG_ALL_INJEC = ((uint32_t)0x00C00000), 193 ADC_ANALOG_WATCHDOG_NONE = ((uint32_t)0x00000000) 194 } ADC_ANALOG_WATCHDOG_T; 195 196 /** 197 * @brief ADC Interrupt definition 198 */ 199 typedef enum 200 { 201 ADC_INT_AWD = ((uint16_t)0x0140), /*!< Analog Watchdog interrupt */ 202 ADC_INT_EOC = ((uint16_t)0x0220), /*!< End Of Conversion interrupt */ 203 ADC_INT_INJEOC = ((uint16_t)0x0480) /*!< Injected Channel End Of Conversion interrupt */ 204 } ADC_INT_T; 205 206 /** 207 * @brief ADC Flag 208 */ 209 typedef enum 210 { 211 ADC_FLAG_AWD = ((uint8_t)0x01), /*!< Analog Watchdog event occur flag */ 212 ADC_FLAG_EOC = ((uint8_t)0x02), /*!< End Of Conversion flag */ 213 ADC_FLAG_INJEOC = ((uint8_t)0x04), /*!< Injected Channel End Of Conversion flag */ 214 ADC_FLAG_INJCS = ((uint8_t)0x08), /*!< Injected Channel Conversion Start flag */ 215 ADC_FLAG_REGCS = ((uint8_t)0x10) /*!< Regular Channel Conversion Start flag */ 216 } ADC_FLAG_T; 217 218 /**@} end of group ADC_Enumerations */ 219 220 /** @defgroup ADC_Structures Structures 221 @{ 222 */ 223 224 /** 225 * @brief ADC Configure structure definition 226 */ 227 typedef struct 228 { 229 ADC_MODE_T mode; 230 uint8_t scanConvMode; /*!< This parameter can be ENABLE or DISABLE */ 231 uint8_t continuosConvMode; /*!< This parameter can be ENABLE or DISABLE */ 232 ADC_EXT_TRIG_CONV_T externalTrigConv; 233 ADC_DATA_ALIGN_T dataAlign; 234 uint8_t nbrOfChannel; /*!< This parameter must range from 1 to 16 */ 235 } ADC_Config_T; 236 237 /**@} end of group ADC_Structures */ 238 239 /** @defgroup ADC_Functions Functions 240 @{ 241 */ 242 243 /* ADC reset and common configuration */ 244 void ADC_Reset(ADC_T* adc); 245 void ADC_Config(ADC_T* adc, ADC_Config_T* adcConfig); 246 void ADC_ConfigStructInit(ADC_Config_T* adcConfig); 247 void ADC_ConfigRegularChannel(ADC_T* adc, uint8_t channel, uint8_t rank, uint8_t sampleTime); 248 void ADC_Enable(ADC_T* adc); 249 void ADC_Disable(ADC_T* adc); 250 251 /* ADC for DMA */ 252 void ADC_EnableDMA(ADC_T* adc); 253 void ADC_DisableDMA(ADC_T* adc); 254 255 /* ADC Calibration */ 256 void ADC_ResetCalibration(ADC_T* adc); 257 uint8_t ADC_ReadResetCalibrationStatus(ADC_T* adc); 258 void ADC_StartCalibration(ADC_T* adc); 259 uint8_t ADC_ReadCalibrationStartFlag(ADC_T* adc); 260 261 /* ADC software start conversion */ 262 void ADC_EnableSoftwareStartConv(ADC_T* adc); 263 void ADC_DisableSoftwareStartConv(ADC_T* adc); 264 uint8_t ADC_ReadSoftwareStartConvStatus(ADC_T* adc); 265 266 /* ADC Discontinuous mode */ 267 void ADC_ConfigDiscMode(ADC_T* adc, uint8_t number); 268 void ADC_EnableDiscMode(ADC_T* adc); 269 void ADC_DisableDiscMode(ADC_T* adc); 270 271 /* ADC External trigger conversion */ 272 void ADC_EnableExternalTrigConv(ADC_T* adc); 273 void ADC_DisableExternalTrigConv(ADC_T* adc); 274 275 /* ADC Conversion result */ 276 uint16_t ADC_ReadConversionValue(ADC_T* adc); 277 uint32_t ADC_ReadDualModeConversionValue(ADC_T* adc); 278 279 /* ADC Automatic injected group */ 280 void ADC_EnableAutoInjectedConv(ADC_T* adc); 281 void ADC_DisableAutoInjectedConv(ADC_T* adc); 282 void ADC_EnableInjectedDiscMode(ADC_T* adc); 283 void ADC_DisableInjectedDiscMode(ADC_T* adc); 284 285 /* ADC External trigger for injected channels conversion */ 286 void ADC_ConfigExternalTrigInjectedConv(ADC_T* adc, ADC_EXT_TRIG_INJEC_CONV_T extTrigInjecConv); 287 void ADC_EnableExternalTrigInjectedConv(ADC_T* adc); 288 void ADC_DisableExternalTrigInjectedConv(ADC_T* adc); 289 290 /* ADC Start of the injected channels conversion */ 291 void ADC_EnableSoftwareStartInjectedConv(ADC_T* adc); 292 void ADC_DisableSoftwareStartInjectedConv(ADC_T* adc); 293 uint8_t ADC_ReadSoftwareStartInjectedConvStatus(ADC_T* adc); 294 295 /* ADC injected channel */ 296 void ADC_ConfigInjectedChannel(ADC_T* adc, uint8_t channel, uint8_t rank, uint8_t sampleTime); 297 void ADC_ConfigInjectedSequencerLength(ADC_T* adc, uint8_t length); 298 void ADC_ConfigInjectedOffset(ADC_T* adc, ADC_INJEC_CHANNEL_T channel, uint16_t offSet); 299 uint16_t ADC_ReadInjectedConversionValue(ADC_T* adc, ADC_INJEC_CHANNEL_T channel); 300 301 /* ADC analog watchdog */ 302 void ADC_EnableAnalogWatchdog(ADC_T* adc, uint32_t analogWatchdog); 303 void ADC_DisableAnalogWatchdog(ADC_T* adc); 304 void ADC_ConfigAnalogWatchdogThresholds(ADC_T* adc, uint16_t highThreshold, uint16_t lowThreshold); 305 void ADC_ConfigAnalogWatchdogSingleChannel(ADC_T* adc, uint8_t channel); 306 307 /* ADC temperature sensor */ 308 void ADC_EnableTempSensorVrefint(ADC_T* adc); 309 void ADC_DisableTempSensorVrefint(ADC_T* adc); 310 311 /* Interrupt and flag */ 312 void ADC_EnableInterrupt(ADC_T* adc, uint16_t interrupt); 313 void ADC_DisableInterrupt(ADC_T* adc, uint16_t interrupt); 314 uint8_t ADC_ReadStatusFlag(ADC_T* adc, ADC_FLAG_T flag); 315 void ADC_ClearStatusFlag(ADC_T* adc, uint8_t flag); 316 uint8_t ADC_ReadIntFlag(ADC_T* adc, ADC_INT_T flag); 317 void ADC_ClearIntFlag(ADC_T* adc, uint16_t flag); 318 319 /**@} end of group ADC_Functions */ 320 /**@} end of group ADC_Driver */ 321 /**@} end of group APM32S10x_StdPeriphDriver */ 322 323 #ifdef __cplusplus 324 } 325 #endif 326 327 #endif /* __APM32S10X_ADC_H */ 328