1 //*****************************************************************************
2 //
3 //  am_hal_ctimer.h
4 //! @file
5 //!
6 //! @brief Functions for accessing and configuring the CTIMER.
7 //!
8 //! @addtogroup ctimer2 Counter/Timer (CTIMER)
9 //! @ingroup apollo2hal
10 //! @{
11 //
12 //*****************************************************************************
13 
14 //*****************************************************************************
15 //
16 // Copyright (c) 2017, Ambiq Micro
17 // All rights reserved.
18 //
19 // Redistribution and use in source and binary forms, with or without
20 // modification, are permitted provided that the following conditions are met:
21 //
22 // 1. Redistributions of source code must retain the above copyright notice,
23 // this list of conditions and the following disclaimer.
24 //
25 // 2. Redistributions in binary form must reproduce the above copyright
26 // notice, this list of conditions and the following disclaimer in the
27 // documentation and/or other materials provided with the distribution.
28 //
29 // 3. Neither the name of the copyright holder nor the names of its
30 // contributors may be used to endorse or promote products derived from this
31 // software without specific prior written permission.
32 //
33 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
34 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
37 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
38 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
39 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
40 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
41 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43 // POSSIBILITY OF SUCH DAMAGE.
44 //
45 // This is part of revision 1.2.11 of the AmbiqSuite Development Package.
46 //
47 //*****************************************************************************
48 #ifndef AM_HAL_CTIMER_H
49 #define AM_HAL_CTIMER_H
50 
51 //*****************************************************************************
52 //
53 //! Number of timers
54 //
55 //*****************************************************************************
56 #define AM_HAL_CTIMER_TIMERS_NUM    4
57 
58 //*****************************************************************************
59 //
60 //! Timer offset value
61 //
62 //*****************************************************************************
63 #define AM_HAL_CTIMER_TIMER_OFFSET  (AM_REG_CTIMER_TMR1_O - AM_REG_CTIMER_TMR0_O)
64 
65 //*****************************************************************************
66 //
67 //! @name Interrupt Status Bits
68 //! @brief Interrupt Status Bits for enable/disble use
69 //!
70 //! These macros may be used to set and clear interrupt bits
71 //! @{
72 //
73 //*****************************************************************************
74 #define AM_HAL_CTIMER_INT_TIMERA0C0         AM_REG_CTIMER_INTEN_CTMRA0C0INT_M
75 #define AM_HAL_CTIMER_INT_TIMERA0C1         AM_REG_CTIMER_INTEN_CTMRA0C1INT_M
76 #define AM_HAL_CTIMER_INT_TIMERA1C0         AM_REG_CTIMER_INTEN_CTMRA1C0INT_M
77 #define AM_HAL_CTIMER_INT_TIMERA1C1         AM_REG_CTIMER_INTEN_CTMRA1C1INT_M
78 #define AM_HAL_CTIMER_INT_TIMERA2C0         AM_REG_CTIMER_INTEN_CTMRA2C0INT_M
79 #define AM_HAL_CTIMER_INT_TIMERA2C1         AM_REG_CTIMER_INTEN_CTMRA2C1INT_M
80 #define AM_HAL_CTIMER_INT_TIMERA3C0         AM_REG_CTIMER_INTEN_CTMRA3C0INT_M
81 #define AM_HAL_CTIMER_INT_TIMERA3C1         AM_REG_CTIMER_INTEN_CTMRA3C1INT_M
82 
83 #define AM_HAL_CTIMER_INT_TIMERB0C0         AM_REG_CTIMER_INTEN_CTMRB0C0INT_M
84 #define AM_HAL_CTIMER_INT_TIMERB0C1         AM_REG_CTIMER_INTEN_CTMRB0C1INT_M
85 #define AM_HAL_CTIMER_INT_TIMERB1C0         AM_REG_CTIMER_INTEN_CTMRB1C0INT_M
86 #define AM_HAL_CTIMER_INT_TIMERB1C1         AM_REG_CTIMER_INTEN_CTMRB1C1INT_M
87 #define AM_HAL_CTIMER_INT_TIMERB2C0         AM_REG_CTIMER_INTEN_CTMRB2C0INT_M
88 #define AM_HAL_CTIMER_INT_TIMERB2C1         AM_REG_CTIMER_INTEN_CTMRB2C1INT_M
89 #define AM_HAL_CTIMER_INT_TIMERB3C0         AM_REG_CTIMER_INTEN_CTMRB3C0INT_M
90 #define AM_HAL_CTIMER_INT_TIMERB3C1         AM_REG_CTIMER_INTEN_CTMRB3C1INT_M
91 
92 //
93 // Deprecated, use the newer macros above.
94 //
95 #define AM_HAL_CTIMER_INT_TIMERA0           AM_HAL_CTIMER_INT_TIMERA0C0
96 #define AM_HAL_CTIMER_INT_TIMERB0           AM_HAL_CTIMER_INT_TIMERB0C0
97 #define AM_HAL_CTIMER_INT_TIMERA1           AM_HAL_CTIMER_INT_TIMERA1C0
98 #define AM_HAL_CTIMER_INT_TIMERB1           AM_HAL_CTIMER_INT_TIMERB1C0
99 #define AM_HAL_CTIMER_INT_TIMERA2           AM_HAL_CTIMER_INT_TIMERA2C0
100 #define AM_HAL_CTIMER_INT_TIMERB2           AM_HAL_CTIMER_INT_TIMERB2C0
101 #define AM_HAL_CTIMER_INT_TIMERA3           AM_HAL_CTIMER_INT_TIMERA3C0
102 #define AM_HAL_CTIMER_INT_TIMERB3           AM_HAL_CTIMER_INT_TIMERB3C0
103 //! @}
104 
105 //*****************************************************************************
106 //
107 //! @name Configuration options
108 //! @brief Configuration options for \e am_hal_ctimer_config_t
109 //!
110 //! These options are to be used with the \e am_hal_ctimer_config_t structure
111 //! used by \e am_hal_ctimer_config
112 //! @{
113 //
114 //*****************************************************************************
115 #define AM_HAL_CTIMER_CLK_PIN               AM_REG_CTIMER_CTRL0_TMRA0CLK(0x0)
116 #define AM_HAL_CTIMER_HFRC_12MHZ            AM_REG_CTIMER_CTRL0_TMRA0CLK(0x1)
117 #define AM_HAL_CTIMER_HFRC_3MHZ             AM_REG_CTIMER_CTRL0_TMRA0CLK(0x2)
118 #define AM_HAL_CTIMER_HFRC_187_5KHZ         AM_REG_CTIMER_CTRL0_TMRA0CLK(0x3)
119 #define AM_HAL_CTIMER_HFRC_47KHZ            AM_REG_CTIMER_CTRL0_TMRA0CLK(0x4)
120 #define AM_HAL_CTIMER_HFRC_12KHZ            AM_REG_CTIMER_CTRL0_TMRA0CLK(0x5)
121 #define AM_HAL_CTIMER_XT_32_768KHZ          AM_REG_CTIMER_CTRL0_TMRA0CLK(0x6)
122 #define AM_HAL_CTIMER_XT_16_384KHZ          AM_REG_CTIMER_CTRL0_TMRA0CLK(0x7)
123 #define AM_HAL_CTIMER_XT_2_048KHZ           AM_REG_CTIMER_CTRL0_TMRA0CLK(0x8)
124 #define AM_HAL_CTIMER_XT_256HZ              AM_REG_CTIMER_CTRL0_TMRA0CLK(0x9)
125 #define AM_HAL_CTIMER_LFRC_512HZ            AM_REG_CTIMER_CTRL0_TMRA0CLK(0xA)
126 #define AM_HAL_CTIMER_LFRC_32HZ             AM_REG_CTIMER_CTRL0_TMRA0CLK(0xB)
127 #define AM_HAL_CTIMER_LFRC_1HZ              AM_REG_CTIMER_CTRL0_TMRA0CLK(0xC)
128 #define AM_HAL_CTIMER_LFRC_1_16HZ           AM_REG_CTIMER_CTRL0_TMRA0CLK(0xD)
129 #define AM_HAL_CTIMER_RTC_100HZ             AM_REG_CTIMER_CTRL0_TMRA0CLK(0xE)
130 #define AM_HAL_CTIMER_HCLK                  AM_REG_CTIMER_CTRL0_TMRA0CLK(0xF)
131 #define AM_HAL_CTIMER_BUCK                  AM_REG_CTIMER_CTRL0_TMRA0CLK(0x10)
132 //! @}
133 
134 //*****************************************************************************
135 //
136 // Timer function macros.
137 //
138 //*****************************************************************************
139 #define AM_HAL_CTIMER_FN_ONCE               AM_REG_CTIMER_CTRL0_TMRA0FN(0)
140 #define AM_HAL_CTIMER_FN_REPEAT             AM_REG_CTIMER_CTRL0_TMRA0FN(1)
141 #define AM_HAL_CTIMER_FN_PWM_ONCE           AM_REG_CTIMER_CTRL0_TMRA0FN(2)
142 #define AM_HAL_CTIMER_FN_PWM_REPEAT         AM_REG_CTIMER_CTRL0_TMRA0FN(3)
143 #define AM_HAL_CTIMER_FN_CONTINUOUS         AM_REG_CTIMER_CTRL0_TMRA0FN(4)
144 
145 //*****************************************************************************
146 //
147 // Half-timer options.
148 //
149 //*****************************************************************************
150 #define AM_HAL_CTIMER_INT_ENABLE            AM_REG_CTIMER_CTRL0_TMRA0IE0_M
151 #define AM_HAL_CTIMER_PIN_ENABLE            AM_REG_CTIMER_CTRL0_TMRA0PE_M
152 #define AM_HAL_CTIMER_PIN_INVERT            AM_REG_CTIMER_CTRL0_TMRA0POL_M
153 #define AM_HAL_CTIMER_CLEAR                 AM_REG_CTIMER_CTRL0_TMRA0CLR_M
154 
155 //*****************************************************************************
156 //
157 // Additional timer options.
158 //
159 //*****************************************************************************
160 #define AM_HAL_CTIMER_LINK                  AM_REG_CTIMER_CTRL0_CTLINK0_M
161 #define AM_HAL_CTIMER_ADC_TRIG              AM_REG_CTIMER_CTRL3_ADCEN_M
162 
163 //*****************************************************************************
164 //
165 // Timer selection macros.
166 //
167 //*****************************************************************************
168 #define AM_HAL_CTIMER_TIMERA                0x0000FFFF
169 #define AM_HAL_CTIMER_TIMERB                0xFFFF0000
170 #define AM_HAL_CTIMER_BOTH                  0xFFFFFFFF
171 //! @}
172 
173 //*****************************************************************************
174 //
175 // Timer configuration structure
176 //
177 //*****************************************************************************
178 typedef struct
179 {
180     //
181     //! Set to 1 to operate this timer as a 32-bit timer instead of two 16-bit
182     //! timers.
183     //
184     uint32_t ui32Link;
185 
186     //
187     //! Configuration options for TIMERA
188     //
189     uint32_t ui32TimerAConfig;
190 
191     //
192     //! Configuration options for TIMERB
193     //
194     uint32_t ui32TimerBConfig;
195 
196 }
197 am_hal_ctimer_config_t;
198 
199 //*****************************************************************************
200 //
201 // Function pointer type for CTimer interrupt handlers.
202 //
203 //*****************************************************************************
204 typedef void (*am_hal_ctimer_handler_t)(void);
205 
206 #ifdef __cplusplus
207 extern "C"
208 {
209 #endif
210 
211 //*****************************************************************************
212 //
213 // External function definitions
214 //
215 //*****************************************************************************
216 extern void am_hal_ctimer_config(uint32_t ui32TimerNumber,
217                                  am_hal_ctimer_config_t *psConfig);
218 
219 extern void am_hal_ctimer_config_single(uint32_t ui32TimerNumber,
220                                         uint32_t ui32TimerSegment,
221                                         uint32_t ui32ConfigVal);
222 
223 extern void am_hal_ctimer_start(uint32_t ui32TimerNumber,
224                                 uint32_t ui32TimerSegment);
225 
226 extern void am_hal_ctimer_stop(uint32_t ui32TimerNumber,
227                                uint32_t ui32TimerSegment);
228 
229 extern void am_hal_ctimer_clear(uint32_t ui32TimerNumber,
230                                 uint32_t ui32TimerSegment);
231 
232 extern uint32_t am_hal_ctimer_read(uint32_t ui32TimerNumber,
233                                    uint32_t ui32TimerSegment);
234 
235 extern void am_hal_ctimer_pin_enable(uint32_t ui32TimerNumber,
236                                      uint32_t ui32TimerSegment);
237 
238 extern void am_hal_ctimer_pin_disable(uint32_t ui32TimerNumber,
239                                       uint32_t ui32TimerSegment);
240 
241 extern void am_hal_ctimer_pin_invert(uint32_t ui32TimerNumber,
242                                      uint32_t ui32TimerSegment,
243                                      bool bInvertOutput);
244 
245 extern void am_hal_ctimer_compare_set(uint32_t ui32TimerNumber,
246                                       uint32_t ui32TimerSegment,
247                                       uint32_t ui32CompareReg,
248                                       uint32_t ui32Value);
249 
250 extern void am_hal_ctimer_period_set(uint32_t ui32TimerNumber,
251                                      uint32_t ui32TimerSegment,
252                                      uint32_t ui32Period,
253                                      uint32_t ui32OnTime);
254 
255 extern void am_hal_ctimer_adc_trigger_enable(void);
256 extern void am_hal_ctimer_adc_trigger_disable(void);
257 extern void am_hal_ctimer_int_enable(uint32_t ui32Interrupt);
258 extern uint32_t am_hal_ctimer_int_enable_get(void);
259 extern void am_hal_ctimer_int_disable(uint32_t ui32Interrupt);
260 extern void am_hal_ctimer_int_set(uint32_t ui32Interrupt);
261 extern void am_hal_ctimer_int_clear(uint32_t ui32Interrupt);
262 extern uint32_t am_hal_ctimer_int_status_get(bool bEnabledOnly);
263 extern void am_hal_ctimer_int_register(uint32_t ui32Interrupt,
264                                        am_hal_ctimer_handler_t pfnHandler);
265 extern void am_hal_ctimer_int_service(uint32_t ui32Status);
266 
267 #ifdef __cplusplus
268 }
269 #endif
270 
271 #endif // AM_HAL_CTIMER_H
272 
273 //*****************************************************************************
274 //
275 // End Doxygen group.
276 //! @}
277 //
278 //*****************************************************************************
279