1 //*****************************************************************************
2 //
3 //  am_hal_i2c_bit_bang.c
4 //! @file
5 //!
6 //! @brief I2C bit bang module.
7 //!
8 //! These functions implement the I2C bit bang utility
9 //! It implements an I2C interface at close to 400 kHz
10 //
11 //*****************************************************************************
12 
13 //*****************************************************************************
14 //
15 // Copyright (c) 2017, Ambiq Micro
16 // All rights reserved.
17 //
18 // Redistribution and use in source and binary forms, with or without
19 // modification, are permitted provided that the following conditions are met:
20 //
21 // 1. Redistributions of source code must retain the above copyright notice,
22 // this list of conditions and the following disclaimer.
23 //
24 // 2. Redistributions in binary form must reproduce the above copyright
25 // notice, this list of conditions and the following disclaimer in the
26 // documentation and/or other materials provided with the distribution.
27 //
28 // 3. Neither the name of the copyright holder nor the names of its
29 // contributors may be used to endorse or promote products derived from this
30 // software without specific prior written permission.
31 //
32 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
36 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
37 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
38 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
39 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
40 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
41 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 // POSSIBILITY OF SUCH DAMAGE.
43 //
44 // This is part of revision 1.2.11 of the AmbiqSuite Development Package.
45 //
46 //*****************************************************************************
47 
48 #include <stdint.h>
49 #include <stdbool.h>
50 
51 #include "am_mcu_apollo.h"
52 //#include "am_util.h"
53 #include "am_hal_i2c_bit_bang.h"
54 
55 // Max number of clock cycles to wait for clock stretch
56 #define I2C_BB_MAX_CLOCK_STRETCH_WAIT               100
57 
58 #define I2C_BB_DESIRED_FREQ_HZ                      400000
59 
60 #define I2C_BB_CYCLES_PER_DELAY_COUNT               3
61 #define I2C_BB_ONE_BIT_TIME_IN_CYCLES               (AM_HAL_CLKGEN_FREQ_MAX_HZ/I2C_BB_DESIRED_FREQ_HZ)
62 #define I2C_BB_ONE_BIT_TIME_IN_DELAY_COUNT          (I2C_BB_ONE_BIT_TIME_IN_CYCLES/I2C_BB_CYCLES_PER_DELAY_COUNT)
63 
64 // Number of loops (each worth 3 cycles) needed to delay for defined time
65 // This is imprecise, as there is a setup time as well which is not accounted
66 // for
67 // One Bit time = 120 Cycles (400 kHz @ 48 MHz)
68 #define HALF_BIT_TIME    (I2C_BB_ONE_BIT_TIME_IN_DELAY_COUNT/2)
69 #define QUARTER_BIT_TIME (I2C_BB_ONE_BIT_TIME_IN_DELAY_COUNT/4)
70 #define ASM_DELAY        am_hal_flash_delay
71 
72 // Empirically determined adjustments to account for the fact that there is a
73 // variable time spent in actual processing as well, and hence we need not delay
74 // for the full time. This processing time is variable based on exact processing
75 // needed at various times, and will also vary based on compiler type and
76 // optimization levels
77 #define I2C_BB_TIMER_ADJUST     6 // Can not be more than QUARTER_BIT_TIME - 1
78 #define I2C_BB_TIMER_HI_ADJUST  15 // Can not be more than HALF_BIT_TIME - 1
79 #define I2C_BB_TIMER_LO_ADJUST  13 // Can not be more than HALF_BIT_TIME - 1
80 
81 // Wait till it is time to end the SCL Hi Period
82 #define WAIT_I2C_CLOCK_HI_PERIOD()     ASM_DELAY(HALF_BIT_TIME - I2C_BB_TIMER_HI_ADJUST)
83 // Wait till it is time to end the SCL Lo Period
84 #define WAIT_I2C_CLOCK_LOW_PERIOD()    ASM_DELAY(HALF_BIT_TIME - I2C_BB_TIMER_LO_ADJUST)
85 // Delay for Quarter Clock
86 #define WAIT_FOR_QUARTER_I2C_CLOCK()   ASM_DELAY(QUARTER_BIT_TIME - I2C_BB_TIMER_ADJUST)
87 #define WRITE_SCL_LO()    \
88     do { \
89         AM_REGVAL(am_hal_i2c_bit_bang_priv.sck_reg_clr_addr) = (am_hal_i2c_bit_bang_priv.sck_reg_val); \
90     } while(0)
91 
92 #define PULL_SCL_HI()    \
93     do { \
94         AM_REGVAL(am_hal_i2c_bit_bang_priv.sck_reg_set_addr) = (am_hal_i2c_bit_bang_priv.sck_reg_val); \
95     } while(0)
96 
97 #define GET_SCL()   (AM_REGVAL(am_hal_i2c_bit_bang_priv.sck_reg_read_addr) & (am_hal_i2c_bit_bang_priv.sck_reg_val))
98 #define GET_SDA()   (AM_REGVAL(am_hal_i2c_bit_bang_priv.sda_reg_read_addr) & (am_hal_i2c_bit_bang_priv.sda_reg_val))
99 
100 #define WRITE_SDA_LO()    \
101     do { \
102         AM_REGVAL(am_hal_i2c_bit_bang_priv.sda_reg_clr_addr) = (am_hal_i2c_bit_bang_priv.sda_reg_val); \
103     } while(0)
104 
105 #define PULL_SDA_HI()    \
106     do { \
107         AM_REGVAL(am_hal_i2c_bit_bang_priv.sda_reg_set_addr) = (am_hal_i2c_bit_bang_priv.sda_reg_val); \
108     } while(0)
109 
110 
111 //*****************************************************************************
112 //
113 // I2C Bit Bang Private Data Structure
114 //
115 //*****************************************************************************
116 typedef struct am_util_bit_bang_priv
117 {
118     bool  start_flag;
119     uint32_t sck_gpio_number;
120     uint32_t sda_gpio_number;
121     uint32_t sck_reg_set_addr;
122     uint32_t sck_reg_clr_addr;
123     uint32_t sck_reg_read_addr;
124     uint32_t sck_reg_val;
125     uint32_t sda_reg_set_addr;
126     uint32_t sda_reg_clr_addr;
127     uint32_t sda_reg_read_addr;
128     uint32_t sda_reg_val;
129 } am_hal_i2c_bit_bang_priv_t;
130 static am_hal_i2c_bit_bang_priv_t am_hal_i2c_bit_bang_priv;
131 
132 //
133 // Wait for any stretched clock to go high
134 // If it times out - return failure
135 //
136 static __inline bool
i2c_pull_and_wait_scl_hi(void)137 i2c_pull_and_wait_scl_hi(void)
138 {
139     // Maximum time to wait for clock stretching
140     uint32_t maxLoop = 4*I2C_BB_MAX_CLOCK_STRETCH_WAIT + 1;
141     // Pull SCL High
142     PULL_SCL_HI();
143     // Poll for SCL to check for clock stretching
144     while (!GET_SCL())
145     {
146         if (--maxLoop == 0)
147         {
148             // timeout!
149             return true;
150         }
151         WAIT_FOR_QUARTER_I2C_CLOCK();
152     }
153     return false;
154 }
155 
156 //*****************************************************************************
157 //
158 //! @brief Initialize i2c bit bang private data structure
159 //!
160 //! @param sck_gpio_number is the GPIO # for the I2C SCK clock pin
161 //! @param sda_gpio_number is the GPIO # for the I2C SDA data pin
162 //!
163 //! This function initializes the I2C bit bang utility's internal data struct.
164 //!
165 //! returns None.
166 //
167 //*****************************************************************************
168 am_hal_i2c_bit_bang_enum_e
am_hal_i2c_bit_bang_init(uint32_t sck_gpio_number,uint32_t sda_gpio_number)169 am_hal_i2c_bit_bang_init(uint32_t sck_gpio_number,
170                          uint32_t sda_gpio_number)
171 {
172     int i;
173     //
174     // remember GPIO pin assignments for I2C bus signals
175     //
176     am_hal_i2c_bit_bang_priv.sck_gpio_number = sck_gpio_number;
177     am_hal_i2c_bit_bang_priv.sda_gpio_number = sda_gpio_number;
178 
179     am_hal_i2c_bit_bang_priv.sck_reg_set_addr = AM_HAL_GPIO_WTS_REG(sck_gpio_number);
180     am_hal_i2c_bit_bang_priv.sck_reg_clr_addr = AM_HAL_GPIO_WTC_REG(sck_gpio_number);
181     am_hal_i2c_bit_bang_priv.sck_reg_read_addr = AM_HAL_GPIO_RD_REG(sck_gpio_number);
182     am_hal_i2c_bit_bang_priv.sck_reg_val = AM_HAL_GPIO_WTC_M(sck_gpio_number);
183     am_hal_i2c_bit_bang_priv.sda_reg_set_addr = AM_HAL_GPIO_WTS_REG(sda_gpio_number);
184     am_hal_i2c_bit_bang_priv.sda_reg_clr_addr = AM_HAL_GPIO_WTC_REG(sda_gpio_number);
185     am_hal_i2c_bit_bang_priv.sda_reg_read_addr = AM_HAL_GPIO_RD_REG(sda_gpio_number);
186     am_hal_i2c_bit_bang_priv.sda_reg_val =  AM_HAL_GPIO_WTC_M(sda_gpio_number);
187 
188     //
189     // Set SCK GPIO data bit high so we aren't pulling down the clock
190     //
191     am_hal_gpio_out_bit_set(sck_gpio_number);
192     //
193     // Set up SCK GPIO configuration bi-direction, input
194     //
195     am_hal_gpio_pin_config(sck_gpio_number, AM_HAL_PIN_OPENDRAIN | AM_HAL_GPIO_INPEN);
196 
197     //
198     // Set SDA GPIO data bit high so we aren't pulling down the data line
199     //
200     am_hal_gpio_out_bit_set(sda_gpio_number);
201     //
202     // Set up SDA GPIO configuration bi-direction, input
203     //
204     am_hal_gpio_pin_config(sda_gpio_number, AM_HAL_PIN_OPENDRAIN | AM_HAL_GPIO_INPEN);
205 
206     // Now make sure we have control of the clock line
207     //
208     // Wait for any stretched clock to go high. Return if still not high
209     //
210     if (i2c_pull_and_wait_scl_hi())
211     {
212         return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
213     }
214     if (!GET_SDA())
215     {
216         // If previous transaction did not finish - SDA may be pulled low for a Read.
217         // If so - need to flush out the data (max 8 bits) & NACK
218         for (i = 0; i < 9; i++)
219         {
220             //
221             // Pull down on clock line
222             //
223             WRITE_SCL_LO();
224             //
225             // Delay for 1/2 bit cell time to start the clock and let peer write on SDA
226             //
227             WAIT_I2C_CLOCK_LOW_PERIOD();
228             if (i2c_pull_and_wait_scl_hi())
229             {
230                 return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
231             }
232             if (GET_SDA())
233             {
234                 // Send START/STOP to clear the bus
235                 //
236                 // Delay for 1/4 bit cell time
237                 //
238                 WAIT_FOR_QUARTER_I2C_CLOCK();
239                 WRITE_SDA_LO();
240                 //
241                 // Delay for 1/4 bit cell time
242                 //
243                 WAIT_FOR_QUARTER_I2C_CLOCK();
244                 //
245                 // Pull down on clock line
246                 //
247                 WRITE_SCL_LO();
248                 //
249                 // Delay for 1/2 bit cell time to start the clock and let peer write on SDA
250                 //
251                 WAIT_I2C_CLOCK_LOW_PERIOD();
252                 //
253                 // Release the clock line
254                 //
255                 PULL_SCL_HI();
256                 //
257                 // Delay for 1/4 bit cell time
258                 //
259                 WAIT_FOR_QUARTER_I2C_CLOCK();
260                 PULL_SDA_HI();
261                 //
262                 // Delay for 1/4 bit cell time
263                 //
264                 WAIT_FOR_QUARTER_I2C_CLOCK();
265                 break;
266             }
267         }
268         if (i == 9)
269         {
270             // It is it still stuck after 9 clocks - something is wrong. Need to bail out
271             return AM_HAL_I2C_BIT_BANG_DATA_TIMEOUT;
272         }
273     }
274     return AM_HAL_I2C_BIT_BANG_SUCCESS;
275 }
276 
277 //*****************************************************************************
278 //
279 //! @brief Receive one data byte from an I2C device
280 //!
281 //! This function handles sending one byte to a slave device
282 //! bNack defines if we should send an ACK or NACK
283 //!
284 //! returns the byte received
285 //
286 //*****************************************************************************
287 static __inline am_hal_i2c_bit_bang_enum_e
i2c_receive_byte(uint8_t * pRxByte,bool bNack)288 i2c_receive_byte(uint8_t *pRxByte, bool bNack)
289 {
290     int i;
291     uint8_t data_byte = 0;
292 
293     //
294     // Loop through receiving 8 bits
295     //
296     for (i = 0; i < 8; i++)
297     {
298         //
299         // Pull down on clock line
300         //
301         WRITE_SCL_LO();
302 
303         //
304         // release the data line from from the previous ACK
305         //
306         PULL_SDA_HI();
307 
308         //
309         // Delay for 1/2 bit cell time to start the clock and let peer write on SDA
310         //
311         WAIT_I2C_CLOCK_LOW_PERIOD();
312 
313         if (i2c_pull_and_wait_scl_hi())
314         {
315             return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
316         }
317         //
318         // grab the data bit here
319         //
320         if ( GET_SDA() )
321         {
322             //
323             // set the bit in the data byte to be returned
324             //
325             data_byte |=  (0x80 >> i);
326         }
327 
328         //
329         // Delay for 1/2 bit cell time while clock is high
330         //
331         WAIT_I2C_CLOCK_HI_PERIOD();
332     }
333 
334     *pRxByte = data_byte;
335     //
336     // Pull down on clock line
337     //
338     WRITE_SCL_LO();
339 
340     //
341     // pull the data line down so we can ACK/NAK the byte we just received
342     //
343     if (bNack)
344     {
345         //
346         // Pull up on data line with clock low to indicate NAK
347         //
348         PULL_SDA_HI();
349     }
350     else
351     {
352         //
353         // Pull down on data line with clock low to indicate ACK
354         //
355         WRITE_SDA_LO();
356     }
357     //
358     // Delay for 1/2 bit cell time before sending ACK to device
359     //
360     WAIT_I2C_CLOCK_LOW_PERIOD();
361 
362     if (i2c_pull_and_wait_scl_hi())
363     {
364         return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
365     }
366     //
367     // Delay for 1/2 bit cell time while clock is high to le peer sample the ACK/NAK
368     //
369     WAIT_I2C_CLOCK_HI_PERIOD();
370     //
371     // Give the received data byte back to them
372     //
373     return AM_HAL_I2C_BIT_BANG_SUCCESS;
374 }
375 
376 //*****************************************************************************
377 //
378 //! @brief Send one data bytes to an I2C device
379 //!
380 //! @param one_byte the byte to send, could be address could be data
381 //!
382 //! This function handles sending one byte to a slave device
383 //! Starts with 0 clock and runs till full cycle
384 //!
385 //! returns I2C BB ENUM
386 //!     {
387 //!     AM_HAL_I2C_BIT_BANG_SUCCESS,
388 //!     AM_HAL_I2C_BIT_BANG_ADDRESS_NAKED
389 //!     }
390 //
391 //*****************************************************************************
392 static __inline am_hal_i2c_bit_bang_enum_e
i2c_send_byte(uint8_t one_byte)393 i2c_send_byte(uint8_t one_byte)
394 {
395     int i;
396     bool data_naked = false;
397 
398     //
399     // Loop through sending 8 bits
400     //
401     for (i = 0; i < 8; i++)
402     {
403         //
404         // Pull down on clock line
405         //
406         WRITE_SCL_LO();
407 
408         //
409         // output the next data bit
410         //
411         if ( one_byte & (0x80 >> i) )
412         {
413             PULL_SDA_HI();
414         }
415         else
416         {
417             WRITE_SDA_LO();
418         }
419 
420         //
421         // Delay for 1/2 bit cell time to start the clock
422         //
423         WAIT_I2C_CLOCK_LOW_PERIOD();
424 
425         if (i2c_pull_and_wait_scl_hi())
426         {
427             return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
428         }
429         //
430         // Delay for 1/2 bit cell time while clock is high
431         //
432         WAIT_I2C_CLOCK_HI_PERIOD();
433     }
434 
435     //
436     // Pull down on clock line
437     //
438     WRITE_SCL_LO();
439 
440     //
441     // Delay for 1/2 bit cell time to start the clock
442     //
443     WAIT_I2C_CLOCK_LOW_PERIOD();
444 
445     if (i2c_pull_and_wait_scl_hi())
446     {
447         return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
448     }
449     //
450     // Grab the state of the ACK bit and return it
451     //
452     data_naked = GET_SDA();
453     //
454     // Delay for 1/2 bit cell time to complete the high period
455     //
456     WAIT_I2C_CLOCK_HI_PERIOD();
457     if ( data_naked )
458     {
459         return AM_HAL_I2C_BIT_BANG_DATA_NAKED;
460     }
461     else
462     {
463         return AM_HAL_I2C_BIT_BANG_SUCCESS;
464     }
465 }
466 
467 //*****************************************************************************
468 //
469 //! @brief Receive a string of data bytes from an I2C device
470 //!
471 //! @param address (only 8 bit I2C addresses are supported)
472 //!        LSB is I2C R/W
473 //! @param number_of_bytes to transfer (# payload bytes)
474 //! @param pData pointer to data buffer to receive payload
475 //!
476 //! This function handles receiving a payload from a slave device
477 //!
478 //! returns ENUM{AM_HAL_I2C_BIT_BANG_SUCCESS,AM_HAL_I2C_BIT_BANG_ADDRESS_NAKED}
479 //
480 //*****************************************************************************
481 am_hal_i2c_bit_bang_enum_e
am_hal_i2c_bit_bang_receive(uint8_t address,uint32_t number_of_bytes,uint8_t * pData,uint8_t ui8Offset,bool bUseOffset,bool bNoStop)482 am_hal_i2c_bit_bang_receive(uint8_t address, uint32_t number_of_bytes,
483                             uint8_t *pData, uint8_t ui8Offset,
484                             bool bUseOffset, bool bNoStop)
485 {
486     uint32_t ui32I;
487     am_hal_i2c_bit_bang_enum_e status = AM_HAL_I2C_BIT_BANG_SUCCESS;
488 
489 
490     if (i2c_pull_and_wait_scl_hi())
491     {
492         return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
493     }
494     //
495     // Pull down on data line with clock high --> START CONDITION
496     //
497     WRITE_SDA_LO();
498 
499     //
500     // Delay for 1/2 bit cell time to start the clock
501     //
502     WAIT_I2C_CLOCK_HI_PERIOD();
503 
504     //
505     // send the address byte and wait for the ACK/NAK
506     //
507     status = i2c_send_byte(address);
508     if ( status != AM_HAL_I2C_BIT_BANG_SUCCESS )
509     {
510         if ( status == AM_HAL_I2C_BIT_BANG_DATA_NAKED)
511         {
512             return AM_HAL_I2C_BIT_BANG_ADDRESS_NAKED;
513         }
514         return status;
515     }
516 
517     if ( bUseOffset )
518     {
519         status = i2c_send_byte(ui8Offset);
520         if ( status != AM_HAL_I2C_BIT_BANG_SUCCESS )
521         {
522             return status;
523         }
524     }
525 
526     //
527     // receive the requested number of data bytes
528     //
529     for (ui32I = 0; ui32I < number_of_bytes - 1; ui32I++)
530     {
531         //
532         // receive the data bytes and send ACK for each one
533         //
534         status = i2c_receive_byte(pData, false);
535         if (status != AM_HAL_I2C_BIT_BANG_SUCCESS)
536         {
537             return status;
538         }
539         pData++;
540     }
541     // Send NAK for the last byte
542     status = i2c_receive_byte(pData, true);
543     if (status != AM_HAL_I2C_BIT_BANG_SUCCESS)
544     {
545         return status;
546     }
547 
548     //********************
549     // Send stop condition
550     //********************
551     //
552     // Pull down on clock line
553     //
554     WRITE_SCL_LO();
555 
556     //
557     // Delay for 1/4 bit cell time
558     //
559     WAIT_FOR_QUARTER_I2C_CLOCK();
560 
561 
562     if (!bNoStop)
563     {
564         //
565         // Pull down on data line with clock low
566         //
567         WRITE_SDA_LO();
568     }
569     else
570     {
571         //
572         // Release data line with clock low itself, as we are not sending STOP
573         //
574         PULL_SDA_HI();
575     }
576     //
577     //
578     // Delay for 1/4 bit cell time
579     //
580     WAIT_FOR_QUARTER_I2C_CLOCK();
581 
582     if (i2c_pull_and_wait_scl_hi())
583     {
584         return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
585     }
586     //
587     // Delay for 1/2 bit cell time while clock is high
588     //
589     WAIT_I2C_CLOCK_HI_PERIOD();
590 
591     if (!bNoStop)
592     {
593         //
594         // release data line with clock high --> STOP CONDITION
595         //
596         PULL_SDA_HI();
597     }
598 
599     //
600     // message successfully received (how could we fail???)
601     //
602     return AM_HAL_I2C_BIT_BANG_SUCCESS;
603 }
604 
605 //*****************************************************************************
606 //
607 //! @brief Send a string of data bytes to an I2C device
608 //!
609 //! @param address (only 8 bit I2C addresses are supported)
610 //!        LSB is I2C R/W
611 //! @param number_of_bytes to transfer (# payload bytes)
612 //! @param pData pointer to data buffer containing payload
613 //!
614 //! This function handles sending a payload to a slave device
615 //!
616 //! returns ENUM {AM_HAL_I2C_BIT_BANG_SUCCESS, AM_HAL_I2C_BIT_BANG_DATA_NAKED,
617 //!               AM_HAL_I2C_BIT_BANG_ADDRESS_NAKED}
618 //
619 //*****************************************************************************
620 am_hal_i2c_bit_bang_enum_e
am_hal_i2c_bit_bang_send(uint8_t address,uint32_t number_of_bytes,uint8_t * pData,uint8_t ui8Offset,bool bUseOffset,bool bNoStop)621 am_hal_i2c_bit_bang_send(uint8_t address, uint32_t number_of_bytes,
622                          uint8_t *pData, uint8_t ui8Offset,
623                          bool bUseOffset, bool bNoStop)
624 {
625     uint32_t ui32I;
626     am_hal_i2c_bit_bang_enum_e status;
627     bool data_naked = false;
628 
629     if (i2c_pull_and_wait_scl_hi())
630     {
631         return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
632     }
633     //
634     // Pull down on data line with clock high --> START CONDITION
635     //
636     WRITE_SDA_LO();
637 
638     //
639     // Delay for 1/2 bit cell time to start the clock
640     //
641     WAIT_I2C_CLOCK_HI_PERIOD();
642 
643     //
644     // send the address byte and wait for the ACK/NAK
645     //
646     status = i2c_send_byte(address);
647     if ( status != AM_HAL_I2C_BIT_BANG_SUCCESS )
648     {
649         if ( status == AM_HAL_I2C_BIT_BANG_DATA_NAKED)
650         {
651             return AM_HAL_I2C_BIT_BANG_ADDRESS_NAKED;
652         }
653         return status;
654     }
655 
656     if ( bUseOffset )
657     {
658         status = i2c_send_byte(ui8Offset);
659         if ( status != AM_HAL_I2C_BIT_BANG_SUCCESS )
660         {
661             return status;
662         }
663     }
664 
665     //
666     // send the requested number of data bytes
667     //
668     for (ui32I = 0; ui32I < number_of_bytes; ui32I++)
669     {
670         //
671         // send out the data bytes while watching for premature NAK
672         //
673         status =  i2c_send_byte(*pData++);
674         if (status != AM_HAL_I2C_BIT_BANG_SUCCESS)
675         {
676             if (status == AM_HAL_I2C_BIT_BANG_DATA_NAKED)
677             {
678                 if (ui32I != (number_of_bytes-1))
679                 {
680                     data_naked = true;
681                     // TODO - should we be sending the STOP bit in this case regardless of bNoStop?
682                     break;
683                 }
684                 else
685                 {
686                     status = AM_HAL_I2C_BIT_BANG_SUCCESS;
687                 }
688             }
689             else
690             {
691                 return status;
692             }
693         }
694     }
695 
696     //********************
697     // Send stop condition
698     //********************
699 
700     //
701     // Pull down on clock line
702     //
703     WRITE_SCL_LO();
704 
705     //
706     // Delay for 1/4 bit cell time
707     //
708     WAIT_FOR_QUARTER_I2C_CLOCK();
709 
710 
711     if (!bNoStop)
712     {
713         //
714         // Pull down on data line with clock low
715         //
716         WRITE_SDA_LO();
717     }
718     else
719     {
720         //
721         // Release data line with clock low itself, as we are not sending STOP
722         //
723         PULL_SDA_HI();
724     }
725 
726     //
727     // Delay for 1/4 bit cell time
728     //
729     WAIT_FOR_QUARTER_I2C_CLOCK();
730 
731     if (i2c_pull_and_wait_scl_hi())
732     {
733         return AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT;
734     }
735     if (!bNoStop)
736     {
737         //
738         // release data line with clock high --> STOP CONDITION
739         //
740         PULL_SDA_HI();
741     }
742 
743     //
744     // Delay for 1/2 bit cell time while clock is high
745     //
746     WAIT_I2C_CLOCK_HI_PERIOD();
747 
748     if ( data_naked )
749     {
750         return AM_HAL_I2C_BIT_BANG_DATA_NAKED;  // if it happens early
751     }
752 
753     //
754     // message successfully sent
755     //
756     return AM_HAL_I2C_BIT_BANG_SUCCESS;
757 }
758