1 //*****************************************************************************
2 //
3 //  am_hal_interrupt.h
4 //! @file
5 //!
6 //! @brief Helper functions supporting interrupts and NVIC operation.
7 //!
8 //! These functions may be used for NVIC-level interrupt configuration.
9 //!
10 //! @addtogroup interrupt2 Interrupt (ARM NVIC support functions)
11 //! @ingroup apollo2hal
12 //! @{
13 //
14 //*****************************************************************************
15 
16 //*****************************************************************************
17 //
18 // Copyright (c) 2017, Ambiq Micro
19 // All rights reserved.
20 //
21 // Redistribution and use in source and binary forms, with or without
22 // modification, are permitted provided that the following conditions are met:
23 //
24 // 1. Redistributions of source code must retain the above copyright notice,
25 // this list of conditions and the following disclaimer.
26 //
27 // 2. Redistributions in binary form must reproduce the above copyright
28 // notice, this list of conditions and the following disclaimer in the
29 // documentation and/or other materials provided with the distribution.
30 //
31 // 3. Neither the name of the copyright holder nor the names of its
32 // contributors may be used to endorse or promote products derived from this
33 // software without specific prior written permission.
34 //
35 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
36 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
37 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
38 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
39 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
40 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
41 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
42 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
43 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
44 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
45 // POSSIBILITY OF SUCH DAMAGE.
46 //
47 // This is part of revision 1.2.11 of the AmbiqSuite Development Package.
48 //
49 //*****************************************************************************
50 #ifndef AM_HAL_INTERRUPT_H
51 #define AM_HAL_INTERRUPT_H
52 
53 //*****************************************************************************
54 //
55 //! @name ISR number macros.
56 //! @brief ISR macros.
57 //!
58 //! These macros are used for all ui32Interrupt arguments in this module.
59 //! @{
60 //
61 //*****************************************************************************
62 //
63 // Hardware interrupts
64 //
65 #define AM_HAL_INTERRUPT_MAX                (47)    //AM_HAL_INTERRUPT_SOFTWARE3
66 #define AM_HAL_INTERRUPT_RESET              1
67 #define AM_HAL_INTERRUPT_NMI                2
68 #define AM_HAL_INTERRUPT_HARDFAULT          3
69 #define AM_HAL_INTERRUPT_MPUFAULT           4
70 #define AM_HAL_INTERRUPT_BUSFAULT           5
71 #define AM_HAL_INTERRUPT_USAGEFAULT         6
72 
73 #define AM_HAL_INTERRUPT_SVCALL             11
74 #define AM_HAL_INTERRUPT_DEBUGMON           12
75 #define AM_HAL_INTERRUPT_PENDSV             14
76 #define AM_HAL_INTERRUPT_SYSTICK            15
77 
78 //
79 // Begin IRQs
80 //
81 #define AM_HAL_INTERRUPT_BROWNOUT           16
82 #define AM_HAL_INTERRUPT_WATCHDOG           17
83 #define AM_HAL_INTERRUPT_CLKGEN             18
84 #define AM_HAL_INTERRUPT_VCOMP              19
85 #define AM_HAL_INTERRUPT_IOSLAVE            20
86 #define AM_HAL_INTERRUPT_IOSACC             21
87 #define AM_HAL_INTERRUPT_IOMASTER0          22
88 #define AM_HAL_INTERRUPT_IOMASTER1          23
89 #define AM_HAL_INTERRUPT_IOMASTER2          24
90 #define AM_HAL_INTERRUPT_IOMASTER3          25
91 #define AM_HAL_INTERRUPT_IOMASTER4          26
92 #define AM_HAL_INTERRUPT_IOMASTER5          27
93 #define AM_HAL_INTERRUPT_GPIO               28
94 #define AM_HAL_INTERRUPT_CTIMER             29
95 #define AM_HAL_INTERRUPT_UART0              30
96 #define AM_HAL_INTERRUPT_UART1              31
97 #define AM_HAL_INTERRUPT_UART               (AM_HAL_INTERRUPT_UART0)
98 #define AM_HAL_INTERRUPT_ADC                32
99 #define AM_HAL_INTERRUPT_PDM                33
100 #define AM_HAL_INTERRUPT_STIMER             34
101 #define AM_HAL_INTERRUPT_STIMER_CMPR0       35
102 #define AM_HAL_INTERRUPT_STIMER_CMPR1       36
103 #define AM_HAL_INTERRUPT_STIMER_CMPR2       37
104 #define AM_HAL_INTERRUPT_STIMER_CMPR3       38
105 #define AM_HAL_INTERRUPT_STIMER_CMPR4       39
106 #define AM_HAL_INTERRUPT_STIMER_CMPR5       40
107 #define AM_HAL_INTERRUPT_STIMER_CMPR6       41
108 #define AM_HAL_INTERRUPT_STIMER_CMPR7       42
109 #define AM_HAL_INTERRUPT_FLASH              43
110 
111 #define AM_HAL_INTERRUPT_SOFTWARE0          44
112 #define AM_HAL_INTERRUPT_SOFTWARE1          45
113 #define AM_HAL_INTERRUPT_SOFTWARE2          46
114 #define AM_HAL_INTERRUPT_SOFTWARE3          47
115 //! @}
116 
117 //*****************************************************************************
118 //
119 //! @brief Interrupt priority
120 //!
121 //! This macro is made to be used with the \e am_hal_interrupt_priority_set()
122 //! function. It converts a priority number to the format used by the ARM
123 //! standard priority register, where only the top 3 bits are used.
124 //!
125 //! For example, AM_HAL_INTERRUPT_PRIORITY(1) yields a value of 0x20.
126 //
127 //*****************************************************************************
128 #define AM_HAL_INTERRUPT_PRIORITY(n)        (((uint32_t)(n) & 0x7) << 5)
129 
130 #ifdef __cplusplus
131 extern "C"
132 {
133 #endif
134 //*****************************************************************************
135 //
136 // External function definitions
137 //
138 //*****************************************************************************
139 extern void am_hal_interrupt_enable(uint32_t ui32Interrupt);
140 extern void am_hal_interrupt_disable(uint32_t ui32Interrupt);
141 extern void am_hal_interrupt_pend_set(uint32_t ui32Interrupt);
142 extern void am_hal_interrupt_pend_clear(uint32_t ui32Interrupt);
143 extern void am_hal_interrupt_priority_set(uint32_t ui32Interrupt,
144                                           uint32_t ui32Priority);
145 extern uint32_t am_hal_interrupt_master_disable(void);
146 extern uint32_t am_hal_interrupt_master_enable(void);
147 extern void am_hal_interrupt_master_set(uint32_t ui32InterruptState);
148 
149 #ifdef __cplusplus
150 }
151 #endif
152 
153 #endif // AM_HAL_INTERRUPT_H
154 
155 //*****************************************************************************
156 //
157 // End Doxygen group.
158 //! @}
159 //
160 //*****************************************************************************
161