1 //*****************************************************************************
2 //
3 //! @file startup_iar.c
4 //!
5 //! @brief Definitions for interrupt handlers, the vector table, and the stack.
6 //
7 //*****************************************************************************
8 
9 //*****************************************************************************
10 //
11 // Copyright (c) 2017, Ambiq Micro
12 // All rights reserved.
13 //
14 // Redistribution and use in source and binary forms, with or without
15 // modification, are permitted provided that the following conditions are met:
16 //
17 // 1. Redistributions of source code must retain the above copyright notice,
18 // this list of conditions and the following disclaimer.
19 //
20 // 2. Redistributions in binary form must reproduce the above copyright
21 // notice, this list of conditions and the following disclaimer in the
22 // documentation and/or other materials provided with the distribution.
23 //
24 // 3. Neither the name of the copyright holder nor the names of its
25 // contributors may be used to endorse or promote products derived from this
26 // software without specific prior written permission.
27 //
28 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
32 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 // POSSIBILITY OF SUCH DAMAGE.
39 //
40 // This is part of revision 1.2.9 of the AmbiqSuite Development Package.
41 //
42 //*****************************************************************************
43 
44 #include <stdint.h>
45 
46 //*****************************************************************************
47 //
48 // Enable the IAR extensions for this source file.
49 //
50 //*****************************************************************************
51 #pragma language = extended
52 
53 //*****************************************************************************
54 //
55 // Weak function links.
56 //
57 //*****************************************************************************
58 #pragma weak am_mpufault_isr        = am_fault_isr
59 #pragma weak am_busfault_isr        = am_fault_isr
60 #pragma weak am_usagefault_isr      = am_fault_isr
61 #pragma weak am_svcall_isr          = am_default_isr
62 #pragma weak am_debugmon_isr        = am_default_isr
63 #pragma weak am_pendsv_isr          = am_default_isr
64 #pragma weak am_systick_isr         = am_default_isr
65 #pragma weak am_brownout_isr        = am_default_isr
66 #pragma weak am_watchdog_isr        = am_default_isr
67 #pragma weak am_clkgen_isr          = am_default_isr
68 #pragma weak am_vcomp_isr           = am_default_isr
69 #pragma weak am_ioslave_ios_isr     = am_default_isr
70 #pragma weak am_ioslave_acc_isr     = am_default_isr
71 #pragma weak am_iomaster0_isr       = am_default_isr
72 #pragma weak am_iomaster1_isr       = am_default_isr
73 #pragma weak am_iomaster2_isr       = am_default_isr
74 #pragma weak am_iomaster3_isr       = am_default_isr
75 #pragma weak am_iomaster4_isr       = am_default_isr
76 #pragma weak am_iomaster5_isr       = am_default_isr
77 #pragma weak am_gpio_isr            = am_default_isr
78 #pragma weak am_ctimer_isr          = am_default_isr
79 #pragma weak am_uart_isr            = am_default_isr
80 #pragma weak am_uart1_isr           = am_default_isr
81 #pragma weak am_adc_isr             = am_default_isr
82 #pragma weak am_pdm_isr             = am_default_isr
83 #pragma weak am_stimer_isr          = am_default_isr
84 #pragma weak am_stimer_cmpr0_isr    = am_default_isr
85 #pragma weak am_stimer_cmpr1_isr    = am_default_isr
86 #pragma weak am_stimer_cmpr2_isr    = am_default_isr
87 #pragma weak am_stimer_cmpr3_isr    = am_default_isr
88 #pragma weak am_stimer_cmpr4_isr    = am_default_isr
89 #pragma weak am_stimer_cmpr5_isr    = am_default_isr
90 #pragma weak am_stimer_cmpr6_isr    = am_default_isr
91 #pragma weak am_stimer_cmpr7_isr    = am_default_isr
92 #pragma weak am_flash_isr           = am_default_isr
93 #pragma weak am_software0_isr       = am_default_isr
94 #pragma weak am_software1_isr       = am_default_isr
95 #pragma weak am_software2_isr       = am_default_isr
96 #pragma weak am_software3_isr       = am_default_isr
97 
98 
99 //*****************************************************************************
100 //
101 // Forward declaration of the default fault handlers.
102 //
103 //*****************************************************************************
104 extern __stackless void am_reset_isr(void);
105 extern __weak void am_nmi_isr(void);
106 extern __weak void am_fault_isr(void);
107 extern void am_mpufault_isr(void);
108 extern void am_busfault_isr(void);
109 extern void am_usagefault_isr(void);
110 extern void am_svcall_isr(void);
111 extern void am_debugmon_isr(void);
112 extern void am_pendsv_isr(void);
113 extern void am_systick_isr(void);
114 extern void am_brownout_isr(void);
115 extern void am_watchdog_isr(void);
116 extern void am_clkgen_isr(void);
117 extern void am_vcomp_isr(void);
118 extern void am_ioslave_ios_isr(void);
119 extern void am_ioslave_acc_isr(void);
120 extern void am_iomaster0_isr(void);
121 extern void am_iomaster1_isr(void);
122 extern void am_iomaster2_isr(void);
123 extern void am_iomaster3_isr(void);
124 extern void am_iomaster4_isr(void);
125 extern void am_iomaster5_isr(void);
126 extern void am_gpio_isr(void);
127 extern void am_ctimer_isr(void);
128 extern void am_uart_isr(void);
129 extern void am_uart1_isr(void);
130 extern void am_adc_isr(void);
131 extern void am_pdm_isr(void);
132 extern void am_stimer_isr(void);
133 extern void am_stimer_cmpr0_isr(void);
134 extern void am_stimer_cmpr1_isr(void);
135 extern void am_stimer_cmpr2_isr(void);
136 extern void am_stimer_cmpr3_isr(void);
137 extern void am_stimer_cmpr4_isr(void);
138 extern void am_stimer_cmpr5_isr(void);
139 extern void am_stimer_cmpr6_isr(void);
140 extern void am_stimer_cmpr7_isr(void);
141 extern void am_flash_isr(void);
142 extern void am_software0_isr(void);
143 extern void am_software1_isr(void);
144 extern void am_software2_isr(void);
145 extern void am_software3_isr(void);
146 
147 extern void am_default_isr(void);
148 
149 //*****************************************************************************
150 //
151 // The entry point for the application startup code.
152 //
153 //*****************************************************************************
154 extern void __iar_program_start(void);
155 
156 //*****************************************************************************
157 //
158 // Reserve space for the system stack.
159 //
160 //*****************************************************************************
161 static uint32_t pui32Stack[1024] @ ".noinit";
162 
163 //*****************************************************************************
164 //
165 // A union that describes the entries of the vector table.  The union is needed
166 // since the first entry is the stack pointer and the remainder are function
167 // pointers.
168 //
169 //*****************************************************************************
170 typedef union
171 {
172     void (*pfnHandler)(void);
173     uint32_t ui32Ptr;
174 }
175 uVectorEntry;
176 
177 //*****************************************************************************
178 //
179 // The vector table.  Note that the proper constructs must be placed on this to
180 // ensure that it ends up at physical address 0x0000.0000.
181 //
182 // Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
183 // am_usagefault_isr does not work if am_fault_isr is defined externally.
184 // Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
185 //
186 //*****************************************************************************
187 __root const uVectorEntry __vector_table[] @ ".intvec" =
188 {
189     { .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
190                                                 // The initial stack pointer
191     am_reset_isr,                               // The reset handler
192     am_nmi_isr,                                 // The NMI handler
193     am_fault_isr,                               // The hard fault handler
194     am_fault_isr,                               // The MPU fault handler
195     am_fault_isr,                               // The bus fault handler
196     am_fault_isr,                               // The usage fault handler
197     0,                                          // Reserved
198     0,                                          // Reserved
199     0,                                          // Reserved
200     0,                                          // Reserved
201     am_svcall_isr,                              // SVCall handle
202     am_debugmon_isr,                            // Debug monitor handler
203     0,                                          // Reserved
204     am_pendsv_isr,                              // The PendSV handler
205     am_systick_isr,                             // The SysTick handler
206 
207     //
208     // Peripheral Interrupts
209     //
210     am_brownout_isr,                            //  0: Brownout
211     am_watchdog_isr,                            //  1: Watchdog
212     am_clkgen_isr,                              //  2: CLKGEN
213     am_vcomp_isr,                               //  3: Voltage Comparator
214     am_ioslave_ios_isr,                         //  4: I/O Slave general
215     am_ioslave_acc_isr,                         //  5: I/O Slave access
216     am_iomaster0_isr,                           //  6: I/O Master 0
217     am_iomaster1_isr,                           //  7: I/O Master 1
218     am_iomaster2_isr,                           //  8: I/O Master 2
219     am_iomaster3_isr,                           //  9: I/O Master 3
220     am_iomaster4_isr,                           // 10: I/O Master 4
221     am_iomaster5_isr,                           // 11: I/O Master 5
222     am_gpio_isr,                                // 12: GPIO
223     am_ctimer_isr,                              // 13: CTIMER
224     am_uart_isr,                                // 14: UART0
225     am_uart1_isr,                               // 15: UART1
226     am_adc_isr,                                 // 16: ADC
227     am_pdm_isr,                                 // 17: PDM
228     am_stimer_isr,                              // 18: STIMER
229     am_stimer_cmpr0_isr,                        // 19: STIMER COMPARE0
230     am_stimer_cmpr1_isr,                        // 20: STIMER COMPARE1
231     am_stimer_cmpr2_isr,                        // 21: STIMER COMPARE2
232     am_stimer_cmpr3_isr,                        // 22: STIMER COMPARE3
233     am_stimer_cmpr4_isr,                        // 23: STIMER COMPARE4
234     am_stimer_cmpr5_isr,                        // 24: STIMER COMPARE5
235     am_stimer_cmpr6_isr,                        // 25: STIMER COMPARE6
236     am_stimer_cmpr7_isr,                        // 26: STIMER COMPARE7
237     am_flash_isr,                               // 27: FLASH
238     am_software0_isr,                           // 28: SOFTWARE0
239     am_software1_isr,                           // 29: SOFTWARE1
240     am_software2_isr,                           // 30: SOFTWARE2
241     am_software3_isr                            // 31: SOFTWARE3
242 };
243 
244 //*****************************************************************************
245 //
246 // This is the code that gets called when the processor first starts execution
247 // following a reset event.  Only the absolutely necessary set is performed,
248 // after which the application supplied entry() routine is called.
249 //
250 //*****************************************************************************
251 void
am_reset_isr(void)252 am_reset_isr(void)
253 {
254     //
255     // Call the application's entry point.
256     //
257     __iar_program_start();
258 }
259 
260 //*****************************************************************************
261 //
262 // This is the code that gets called when the processor receives a NMI.  This
263 // simply enters an infinite loop, preserving the system state for examination
264 // by a debugger.
265 //
266 //*****************************************************************************
267 __weak void
am_nmi_isr(void)268 am_nmi_isr(void)
269 {
270     //
271     // Enter an infinite loop.
272     //
273     while(1)
274     {
275     }
276 }
277 
278 //*****************************************************************************
279 //
280 // This is the code that gets called when the processor receives a fault
281 // interrupt.  This simply enters an infinite loop, preserving the system state
282 // for examination by a debugger.
283 //
284 //*****************************************************************************
285 __weak void
am_fault_isr(void)286 am_fault_isr(void)
287 {
288     //
289     // Enter an infinite loop.
290     //
291     while(1)
292     {
293     }
294 }
295 
296 //*****************************************************************************
297 //
298 // This is the code that gets called when the processor receives an unexpected
299 // interrupt.  This simply enters an infinite loop, preserving the system state
300 // for examination by a debugger.
301 //
302 //*****************************************************************************
303 static void
am_default_isr(void)304 am_default_isr(void)
305 {
306     //
307     // Go into an infinite loop.
308     //
309     while(1)
310     {
311     }
312 }
313