1 /*
2 * Copyright (c) 2006-2021, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2015-04-14 ArdaFu first version
9 */
10
11 #include "asm9260t.h"
12 #include "rtthread.h"
13
HW_SetPinMux(rt_uint8_t port,rt_uint8_t pin,rt_uint8_t mux_type)14 void HW_SetPinMux(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t mux_type)
15 {
16 rt_uint32_t addr = HW_IOCON(port, pin);
17 rt_uint32_t val = inl(addr); // read origin value
18
19 val &= ~7UL; // clear MUX field
20 val |= mux_type; // set MUX field with new value
21
22 outl(val ,addr); // Set new value
23 }
24
HW_GpioSetDir(rt_uint8_t port,rt_uint8_t pin,rt_uint8_t isOut)25 void HW_GpioSetDir(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t isOut)
26 {
27 rt_uint32_t addr = HW_GPIO_DATA_BASE | ((port>>2)<<16) | 0x8000;
28 rt_uint32_t val;
29 addr = isOut? REG_SET(addr) : REG_CLR(addr);
30 val = (1 << ((port%4)*8+pin));
31 outl(val, addr);
32 }
33
HW_GpioSetVal(rt_uint8_t port,rt_uint8_t pin)34 void HW_GpioSetVal(rt_uint8_t port, rt_uint8_t pin)
35 {
36 rt_uint32_t addr, val;
37 addr = REG_SET(HW_GPIO_DATA_BASE | ((port>>2)<<16));
38 val = (1 << ((port%4)*8+pin));
39 outl(val, addr);
40 }
41
HW_GpioClrVal(rt_uint8_t port,rt_uint8_t pin)42 void HW_GpioClrVal(rt_uint8_t port, rt_uint8_t pin)
43 {
44 rt_uint32_t addr, val;
45 addr = REG_CLR(HW_GPIO_DATA_BASE | ((port>>2)<<16));
46 val = (1 << ((port%4)*8+pin));
47 outl(val, addr);
48 }
49