1 /*
2 * Copyright (c) 2006-2021, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2011-01-13 weety first version
9 * 2015-04-27 ArdaFu Port bsp from at91sam9260 to asm9260t
10 */
11
12 #include <rthw.h>
13 #include "asm9260t.h"
14 #include "interrupt.h"
15
16 #define MAX_HANDLERS (64)
17
18 extern rt_atomic_t rt_interrupt_nest;
19
20 /* exception and interrupt handler table */
21 struct rt_irq_desc irq_desc[MAX_HANDLERS];
22
23 rt_uint32_t rt_interrupt_from_thread;
24 rt_uint32_t rt_interrupt_to_thread;
25 rt_uint32_t rt_thread_switch_interrupt_flag;
26
27
28 /* --------------------------------------------------------------------
29 * Interrupt initialization
30 * -------------------------------------------------------------------- */
31
32 /*
33 * The default interrupt priority levels (0 = lowest, 3 = highest).
34 */
35 static rt_uint32_t default_irq_priority[MAX_HANDLERS/4] =
36 {
37 0x00000000UL, /* INT3 - INT0 */
38 0x00000000UL, /* INT7 - INT4 */
39 0x00000000UL, /* INT11 - INT8 */
40 0x02000000UL, /* INT15 - INT12 */
41 0x02020202UL, /* INT19 - INT16 */
42 0x02020202UL, /* INT23 - INT20 */
43 0x00000002UL, /* INT27 - INT24 */
44 0x01010100UL, /* INT31 - INT28 */
45 0x00000001UL, /* INT35 - INT32 */
46 0x00000000UL, /* INT39 - INT36 */
47 0x00000000UL, /* INT43 - INT40 */
48 0x00000000UL, /* INT47 - INT44 */
49 0x00000000UL, /* INT51 - INT48 */
50 0x00000000UL, /* INT55 - INT52 */
51 0x00000000UL, /* INT59 - INT56 */
52 0x00000000UL, /* INT63 - INT60 */
53 };
54
55
56 void rt_hw_interrupt_mask(int irq);
57 void rt_hw_interrupt_umask(int irq);
58
rt_hw_interrupt_handle(rt_uint32_t vector,void * param)59 rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector, void *param)
60 {
61 rt_kprintf("UN-handled interrupt %d occurred!!!\n", vector);
62 return RT_NULL;
63 }
64
65 /**
66 * This function will initialize hardware interrupt
67 */
rt_hw_interrupt_init(void)68 void rt_hw_interrupt_init(void)
69 {
70 register rt_uint32_t idx;
71 /* Initialize the ICOLL interrupt controller */
72 outl((1<<8), REG_SET(HW_AHBCLKCTRL1)); // Enable ICOLL clock
73 outl((1<<8), REG_CLR(HW_PRESETCTRL1)); // Reset ICOLL start
74 outl((1<<8), REG_SET(HW_PRESETCTRL1)); // Reset ICOLL stop
75
76 for(idx = 0; idx < (MAX_HANDLERS/4); idx++)
77 {
78 rt_uint32_t reg = (HW_ICOLL_PRIORITY0 + 0x10*idx);
79 outl(default_irq_priority[idx], REG_VAL(reg));
80 }
81
82 /* init exceptions table */
83 for(idx=0; idx < MAX_HANDLERS; idx++)
84 {
85 irq_desc[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
86 irq_desc[idx].param = RT_NULL;
87 #ifdef RT_USING_INTERRUPT_INFO
88 rt_snprintf(irq_desc[idx].name, RT_NAME_MAX - 1, "default");
89 irq_desc[idx].counter = 0;
90 #endif
91 }
92
93 /* init interrupt nest, and context in thread sp */
94 rt_interrupt_nest = 0;
95 rt_interrupt_from_thread = 0;
96 rt_interrupt_to_thread = 0;
97 rt_thread_switch_interrupt_flag = 0;
98
99 outl(0x00000000, REG_CLR(HW_ICOLL_VBASE)); //todo: fix this bug
100
101 outl(0x00020000, REG_CLR(HW_ICOLL_CTRL)); // Clear CTRL REG
102 outl(0x00050000, REG_SET(HW_ICOLL_CTRL));
103 outl(0x00000004, HW_ICOLL_UNDEF_VECTOR);
104 outl(~0UL, REG_CLR(HW_ICOLL_CLEAR0));
105 outl(~0UL, REG_CLR(HW_ICOLL_CLEAR1));
106 }
107
108
109 /**
110 * This function will mask a interrupt.
111 * @param vector the interrupt number
112 */
rt_hw_interrupt_mask(int irq)113 void rt_hw_interrupt_mask(int irq)
114 {
115 rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((irq & 0x3CUL) << 2);
116 rt_uint32_t bit = 4UL << ((irq & 3UL)<<3);
117 outl(bit, REG_CLR(reg));
118 }
119
120 /**
121 * This function will un-mask a interrupt.
122 * @param vector the interrupt number
123 */
rt_hw_interrupt_umask(int irq)124 void rt_hw_interrupt_umask(int irq)
125 {
126 rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((irq & 0x3CUL) << 2);
127 rt_uint32_t bit = 4UL << ((irq & 3UL)<<3);
128 outl(bit, REG_SET(reg));
129 }
130
131 /**
132 * This function will install a interrupt service routine to a interrupt.
133 * @param vector the interrupt number
134 * @param handler the interrupt service routine to be installed
135 * @param param the interrupt service function parameter
136 * @param name the interrupt name
137 * @return old handler
138 */
rt_hw_interrupt_install(int vector,rt_isr_handler_t handler,void * param,const char * name)139 rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
140 void *param, const char *name)
141 {
142 rt_isr_handler_t old_handler = RT_NULL;
143
144 if(vector < MAX_HANDLERS)
145 {
146 old_handler = irq_desc[vector].handler;
147 if (handler != RT_NULL)
148 {
149 irq_desc[vector].handler = (rt_isr_handler_t)handler;
150 irq_desc[vector].param = param;
151 #ifdef RT_USING_INTERRUPT_INFO
152 rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
153 irq_desc[vector].counter = 0;
154 #endif
155 }
156 }
157
158 return old_handler;
159 }
160
161
162
rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)163 rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)
164 {
165 //volatile rt_uint32_t irqstat;
166 rt_uint32_t id;
167 /* AIC need this dummy read */
168 inl(HW_ICOLL_VECTOR);
169 /* get irq number */
170 id = inl(HW_ICOLL_STAT);
171 /* clear pending register */
172 //irqstat = inl(HW_ICOLL_VECTOR);
173 return id;
174 }
175
rt_hw_interrupt_ack(rt_uint32_t fiq_irq,rt_uint32_t id)176 void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
177 {
178 rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((id & 0x3CUL) << 2);
179 rt_uint32_t level = 1UL << (0x3 & (inl(REG_VAL(reg)) >>((id & 3UL)<<3)));
180
181 if(id & 0x20)
182 outl((1UL<<(id&0x1F)), REG_SET(HW_ICOLL_CLEAR1));
183 else
184 outl((1UL<<id), REG_SET(HW_ICOLL_CLEAR0));
185
186 outl(level, HW_ICOLL_LEVELACK);
187 }
188
189 #ifdef RT_USING_FINSH
list_irq(void)190 void list_irq(void)
191 {
192 int irq;
193 rt_kprintf("number\tcount\tname\n");
194 for (irq = 0; irq < MAX_HANDLERS; irq++)
195 {
196 if (rt_strncmp(irq_desc[irq].name, "default", sizeof("default")))
197 {
198 rt_kprintf("%02ld: %10ld %s\n",
199 irq, irq_desc[irq].counter, irq_desc[irq].name);
200 }
201 }
202 }
203
204 #include <finsh.h>
205 FINSH_FUNCTION_EXPORT(list_irq, list system irq);
206
207 #endif
208