1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2024-04-10 shelton first version 9 */ 10 11 #include "board.h" 12 system_clock_config(void)13void system_clock_config(void) 14 { 15 /* reset crm */ 16 crm_reset(); 17 18 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); 19 20 /* wait till hext is ready */ 21 while(crm_hext_stable_wait() == ERROR) 22 { 23 } 24 25 /* config pll clock resource */ 26 crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_48, CRM_PLL_OUTPUT_RANGE_GT72MHZ); 27 28 /* config hext division */ 29 crm_hext_clock_div_set(CRM_HEXT_DIV_2); 30 31 /* enable pll */ 32 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); 33 34 /* wait till pll is ready */ 35 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) 36 { 37 } 38 39 /* config ahbclk */ 40 crm_ahb_div_set(CRM_AHB_DIV_1); 41 42 /* config apb2clk */ 43 crm_apb2_div_set(CRM_APB2_DIV_2); 44 45 /* config apb1clk */ 46 crm_apb1_div_set(CRM_APB1_DIV_2); 47 48 /* enable auto step mode */ 49 crm_auto_step_mode_enable(TRUE); 50 51 /* select pll as system clock source */ 52 crm_sysclk_switch(CRM_SCLK_PLL); 53 54 /* wait till pll is used as system clock source */ 55 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) 56 { 57 } 58 59 /* disable auto step mode */ 60 crm_auto_step_mode_enable(FALSE); 61 62 /* update system_core_clock global variable */ 63 system_core_clock_update(); 64 } 65