1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2022-05-10     shelton      first version
9  */
10 
11 #ifndef __BOARD_H__
12 #define __BOARD_H__
13 
14 #include <rtthread.h>
15 #include "at32f413.h"
16 #include "at32_msp.h"
17 #include "drv_common.h"
18 #include "drv_gpio.h"
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23 
24 #define AT32_FLASH_START_ADRESS         ((uint32_t)0x08000000)
25 #define FLASH_PAGE_SIZE                 (2 * 1024)
26 #define AT32_FLASH_SIZE                 (256 * 1024)
27 #define AT32_FLASH_END_ADDRESS          ((uint32_t)(AT32_FLASH_START_ADRESS + AT32_FLASH_SIZE))
28 
29 /* internal sram memory size[kbytes] <32>, default: 32*/
30 #define AT32_SRAM_SIZE                  32
31 #define AT32_SRAM_END                   (0x20000000 + AT32_SRAM_SIZE * 1024)
32 
33 #if defined(__ARMCC_VERSION)
34 extern int Image$$RW_IRAM1$$ZI$$Limit;
35 #define HEAP_BEGIN                      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
36 #elif __ICCARM__
37 #pragma section="CSTACK"
38 #define HEAP_BEGIN                      (__segment_end("CSTACK"))
39 #else
40 extern int __bss_end;
41 #define HEAP_BEGIN                      ((void *)&__bss_end)
42 #endif
43 
44 #define HEAP_END                        AT32_SRAM_END
45 
46 void system_clock_config(void);
47 
48 #ifdef __cplusplus
49 }
50 #endif
51 
52 #endif /* __BOARD_H__ */
53