1 /**
2   **************************************************************************
3   * @file     usb_core.c
4   * @brief    usb driver
5   **************************************************************************
6   *                       Copyright notice & Disclaimer
7   *
8   * The software Board Support Package (BSP) that is made available to
9   * download from Artery official website is the copyrighted work of Artery.
10   * Artery authorizes customers to use, copy, and distribute the BSP
11   * software and its related documentation for the purpose of design and
12   * development in conjunction with Artery microcontrollers. Use of the
13   * software is governed by this copyright notice and the following disclaimer.
14   *
15   * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
16   * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
17   * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
18   * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
19   * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
20   * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
21   *
22   **************************************************************************
23   */
24 #include "usb_core.h"
25 
26 /** @defgroup USB_drivers_core
27   * @brief usb global drivers core
28   * @{
29   */
30 
31 /** @defgroup USB_core_private_functions
32   * @{
33   */
34 
35 usb_sts_type usb_core_config(otg_core_type *udev, uint8_t core_id);
36 
37 /**
38   * @brief  usb core config
39   * @param  otgdev: to the structure of otg_core_type
40   * @param  core_id: usb core id number (USB_FULL_SPEED_CORE_ID)
41   * @retval usb_sts_type
42   */
usb_core_config(otg_core_type * otgdev,uint8_t core_id)43 usb_sts_type usb_core_config(otg_core_type *otgdev, uint8_t core_id)
44 {
45   /* set usb speed and core id */
46   otgdev->cfg.speed = core_id;
47   otgdev->cfg.core_id = core_id;
48 
49   /* default sof out and vbus ignore */
50   otgdev->cfg.sof_out = FALSE;
51   otgdev->cfg.vbusig = FALSE;
52 
53   /* set max size */
54   otgdev->cfg.max_size = 64;
55 
56   /* set support number of channel and endpoint */
57 #ifdef USE_OTG_HOST_MODE
58   otgdev->cfg.hc_num = USB_HOST_CHANNEL_NUM;
59 #endif
60 #ifdef USE_OTG_DEVICE_MODE
61   otgdev->cfg.ept_num = USB_EPT_MAX_NUM;
62 #endif
63   otgdev->cfg.fifo_size = OTG_FIFO_SIZE;
64   if(core_id == USB_FULL_SPEED_CORE_ID)
65   {
66     otgdev->cfg.phy_itface = 2;
67   }
68 #ifdef USB_SOF_OUTPUT_ENABLE
69   otgdev->cfg.sof_out = TRUE;
70 #endif
71 
72 #ifdef USB_VBUS_IGNORE
73   otgdev->cfg.vbusig = TRUE;
74 #endif
75   otgdev->cfg.dma_en = FALSE;
76 
77 #ifdef OTG_USE_DMA
78   otgdev->cfg.dma_en = TRUE;
79 #endif
80 
81   return USB_OK;
82 }
83 
84 #ifdef USE_OTG_DEVICE_MODE
85 /**
86   * @brief  usb device initialization
87   * @param  otgdev: to the structure of otg_core_type
88   * @param  core_id: usb core id number (USB_FULL_SPEED_CORE_ID)
89   * @param  usb_id: select use OTG1 or OTG2
90   *         this parameter can be one of the following values:
91   *         - USB_OTG1_ID
92   *         - USB_OTG2_ID
93   * @param  dev_handler: usb class callback handler
94   * @param  desc_handler: device config callback handler
95   * @retval usb_sts_type
96   */
usbd_init(otg_core_type * otgdev,uint8_t core_id,uint8_t usb_id)97 usb_sts_type usbd_init(otg_core_type *otgdev,
98                   uint8_t core_id, uint8_t usb_id)
99 {
100   usb_sts_type usb_sts = USB_OK;
101 
102   /* select use OTG1 or OTG2 */
103   otgdev->usb_reg = usb_global_select_core(usb_id);
104 
105   /* usb device core config */
106   usb_core_config(otgdev, core_id);
107 
108   if(otgdev->cfg.sof_out)
109   {
110     otgdev->usb_reg->gccfg_bit.sofouten = TRUE;
111   }
112 
113   if(otgdev->cfg.vbusig)
114   {
115     otgdev->usb_reg->gccfg_bit.vbusig = TRUE;
116   }
117   if(otgdev->cfg.dma_en)
118   {
119     otgdev->dev.dma_en = TRUE;
120   }
121   else
122   {
123     otgdev->dev.dma_en = FALSE;
124   }
125   /* usb device core init */
126   usbd_core_init(&(otgdev->dev), otgdev->usb_reg,
127                 core_id);
128 
129   return usb_sts;
130 }
131 #endif
132 
133 #ifdef USE_OTG_HOST_MODE
134 
135 /**
136   * @brief  usb host initialization.
137   * @param  otgdev: to the structure of otg_core_type
138   * @param  core_id: usb core id number (USB_FULL_SPEED_CORE_ID)
139   * @param  usb_id: select use OTG1 or OTG2
140   *         this parameter can be one of the following values:
141   *         - USB_OTG1_ID
142   *         - USB_OTG2_ID
143   * @param  class_handler: usb class callback handler
144   * @param  user_handler: user callback handler
145   * @retval usb_sts_type
146   */
usbh_init(otg_core_type * otgdev,uint8_t core_id,uint8_t usb_id)147 usb_sts_type usbh_init(otg_core_type *otgdev,
148                   uint8_t core_id, uint8_t usb_id)
149 {
150   usb_sts_type status = USB_OK;
151 
152   /* select use otg1 or otg2 */
153   otgdev->usb_reg = usb_global_select_core(usb_id);
154 
155   /* usb core config */
156   usb_core_config(otgdev, core_id);
157 
158   if(otgdev->cfg.sof_out)
159   {
160     otgdev->usb_reg->gccfg_bit.sofouten = TRUE;
161   }
162 
163   if(otgdev->cfg.vbusig)
164   {
165     otgdev->usb_reg->gccfg_bit.vbusig = TRUE;
166   }
167   if(otgdev->cfg.dma_en)
168   {
169     otgdev->host.dma_en = TRUE;
170   }
171   else
172   {
173     otgdev->host.dma_en = FALSE;
174   }
175 
176   /* usb host core init */
177   usbh_core_init(&otgdev->host, otgdev->usb_reg,
178                 core_id);
179 
180   return status;
181 }
182 #endif
183 
184 /**
185   * @}
186   */
187 
188 /**
189   * @}
190   */
191 
192