1 /* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ 2 3 /*This file is prepared for Doxygen automatic documentation generation.*/ 4 /*! \file ********************************************************************* 5 * 6 * \brief NEWLIB_ADDONS miscellaneous macros include file for AVR32. 7 * 8 * - Compiler: GNU GCC for AVR32 9 * - Supported devices: All AVR32 devices can be used. 10 * - AppNote: 11 * 12 * \author Atmel Corporation: http://www.atmel.com \n 13 * Support and FAQ: http://support.atmel.no/ 14 * 15 ******************************************************************************/ 16 17 /* Copyright (c) 2009 Atmel Corporation. All rights reserved. 18 * 19 * Redistribution and use in source and binary forms, with or without 20 * modification, are permitted provided that the following conditions are met: 21 * 22 * 1. Redistributions of source code must retain the above copyright notice, this 23 * list of conditions and the following disclaimer. 24 * 25 * 2. Redistributions in binary form must reproduce the above copyright notice, 26 * this list of conditions and the following disclaimer in the documentation 27 * and/or other materials provided with the distribution. 28 * 29 * 3. The name of Atmel may not be used to endorse or promote products derived 30 * from this software without specific prior written permission. 31 * 32 * 4. This software may only be redistributed and used in connection with an Atmel 33 * AVR product. 34 * 35 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 36 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 37 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 38 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 39 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 40 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 41 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 42 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 44 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 45 * 46 */ 47 48 #ifndef __AVR32_NEWLIB_ADDONS_IO_H__ 49 #define __AVR32_NEWLIB_ADDONS_IO_H__ 50 51 #include <_ansi.h> 52 53 _BEGIN_STD_C 54 55 typedef char u8; 56 typedef unsigned int u32; 57 58 #define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) 59 #define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) 60 #define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) 61 62 #define __raw_readb(a) (*(volatile unsigned char *)(a)) 63 #define __raw_readw(a) (*(volatile unsigned short *)(a)) 64 #define __raw_readl(a) (*(volatile unsigned int *)(a)) 65 66 /* As long as I/O is only performed in P4 (or possibly P3), we're safe */ 67 #define writeb(v,a) __raw_writeb(v,a) 68 #define writew(v,a) __raw_writew(v,a) 69 #define writel(v,a) __raw_writel(v,a) 70 71 #define readb(a) __raw_readb(a) 72 #define readw(a) __raw_readw(a) 73 #define readl(a) __raw_readl(a) 74 75 /* Memory segments when segmentation is enabled */ 76 #define P0SEG 0x00000000 77 #define P1SEG 0x80000000 78 #define P2SEG 0xa0000000 79 #define P3SEG 0xc0000000 80 #define P4SEG 0xe0000000 81 82 /* Returns the privileged segment base of a given address */ 83 #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 84 85 /* Returns the physical address of a PnSEG (n=1,2) address */ 86 #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) 87 88 /* 89 * Map an address to a certain privileged segment 90 */ 91 #define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) 92 #define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) 93 #define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) 94 #define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) 95 96 97 #define cached(addr) P1SEGADDR(addr) 98 #define uncached(addr) P2SEGADDR(addr) 99 #define physaddr(addr) PHYSADDR(addr) 100 101 #define BF(field, value) \ 102 ({ union { \ 103 struct { \ 104 unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ 105 unsigned long __val: field ## _SIZE ; \ 106 }; \ 107 unsigned long __ul; \ 108 } __tmp; \ 109 __tmp.__ul = 0; \ 110 __tmp.__val = value; \ 111 __tmp.__ul;}) 112 113 #define BF_D(field, value) \ 114 ({ union { \ 115 struct { \ 116 unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ 117 unsigned long long __val: field ## _SIZE ; \ 118 }; \ 119 unsigned long long __ul; \ 120 } __tmp; \ 121 __tmp.__ul = 0; \ 122 __tmp.__val = value; \ 123 __tmp.__ul;}) 124 125 #define BFINS(var, field, value) \ 126 { union {\ 127 struct { \ 128 unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ 129 unsigned long __val: field ## _SIZE ; \ 130 }; \ 131 unsigned long __ul; \ 132 } __tmp; \ 133 __tmp.__ul = var; \ 134 __tmp.__val = value; \ 135 var = __tmp.__ul;} 136 137 #define BFEXT(var, field) \ 138 ({ union {\ 139 struct { \ 140 unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ 141 unsigned long __val: field ## _SIZE ; \ 142 }; \ 143 unsigned long __ul; \ 144 } __tmp; \ 145 __tmp.__ul = var; \ 146 __tmp.__val; }) 147 148 #define BFINS_D(var, field, value) \ 149 { union {\ 150 struct { \ 151 unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ 152 unsigned long long __val: field ## _SIZE ; \ 153 }; \ 154 unsigned long long __ul; \ 155 } __tmp; \ 156 __tmp.__ul = var; \ 157 __tmp.__val = value; \ 158 var = __tmp.__ul;} 159 160 #define BFEXT_D(var, field) \ 161 ({ union {\ 162 struct { \ 163 unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ 164 unsigned long long __val: field ## _SIZE ; \ 165 }; \ 166 unsigned long long __ul; \ 167 } __tmp; \ 168 __tmp.__ul = var; \ 169 __tmp.__val; }) 170 171 172 _END_STD_C 173 174 #endif 175