1/* MANAGED-BY-SYSTEM-BUILDER                                    */
2/* VisualDSP++ 5.0 Update 6                                     */
3/* CRT Printer version: 5.6.0.4                                 */
4/* crtgen.exe version: 5.6.0.4                                  */
5/* VDSG version: 5.6.0.4                                        */
6
7/*
8** bf533_basiccrt.s generated on May 08, 2012 at 10:55:43.
9**
10** Copyright (C) 2000-2008 Analog Devices Inc., All Rights Reserved.
11** This contains Analog Devices Background IP and Development IP as
12** defined in the ADI/Intel Collaboration Agreement.
13**
14** This file is generated automatically based upon the options selected
15** in the Startup Code Wizard. Changes to the startup configuration
16** should be made by changing the appropriate options rather than
17** editing this file. Additional user code to be executed before calling
18** main can be inserted between the labels .start_of_user_code1 and
19** .end_of_user_code1 or .start_of_user_code2 and .end_of_user_code2.
20** This code is preserved if the CRT is re-generated.
21**
22** Configuration:-
23**     product_name:                 VisualDSP++ 5.0 Update 6
24**     processor:                    ADSP-BF533
25**     si_revision:                  automatic
26**     cplb_init:                    true
27**     cplb_ctrl:                    (
28**                                    CPLB_ENABLE_ICACHE
29**                                    CPLB_ENABLE_ICPLBS
30**                                   )
31**     mem_init:                     false
32**     device_init:                  true
33**     init_regs:                    false
34**     zero_return_regs:             false
35**     use_profiling:                false
36**     use_vdk:                      false
37**     set_clock_and_power:          false
38**
39*/
40
41/////////////////////////////////////////////////////////////////
42// blackfin-edinburgh-core
43#include <sys/platform.h>
44#include <sys/anomaly_macros_rtl.h>
45
46/////////////////////////////////////////////////////////////////
47// standard
48#define IVBh (EVT0 >> 16)
49#define IVBl (EVT0 & 0xFFFF)
50#define UNASSIGNED_VAL 0x8181
51#define INTERRUPT_BITS 0x400	// just IVG15
52#define SYSCFG_VALUE 0x30
53
54	.section/DOUBLEANY program;
55	.file_attr requiredForROMBoot;
56	.align 2;
57
58start:
59
60
61/*$VDSG<insert-code-very-beginning>                             */
62.start_of_user_code_very_beginning:
63  // Insert additional code to be executed before any other Startup Code here.
64  // This code is preserved if the CRT is re-generated.
65.end_of_user_code_very_beginning:
66/*$VDSG<insert-code-very-beginning>                             */
67
68/////////////////////////////////////////////////////////////////
69// blackfin-edinburgh-core
70#if WA_05000109
71	// Avoid Anomaly 05-00-0109
72	R1 = SYSCFG_VALUE;
73	SYSCFG = R1;
74#endif
75
76/////////////////////////////////////////////////////////////////
77// standard
78#if WA_05000229
79	// Avoid Anomaly 05-00-0229: DMA5_CONFIG and SPI_CTL not cleared on reset.
80	R1 = 0x400;
81#if defined(__ADSPBF538__) || defined(__ADSPBF539__)
82	P0.L = SPI0_CTL & 0xFFFF;
83	P0.H = SPI0_CTL >> 16;
84	W[P0] = R1.L;
85#else
86	P0.L = SPI_CTL & 0xFFFF;
87	P0.H = SPI_CTL >> 16;
88	W[P0] = R1.L;
89#endif
90	P0.L = DMA5_CONFIG & 0xFFFF;
91	P0.H = DMA5_CONFIG >> 16;
92	R1 = 0;
93	W[P0] = R1.L;
94#endif
95	// Clear loop counters to disable hardware loops
96	R7 = 0;
97	LC0 = R7;
98	LC1 = R7;
99
100	// Clear the DAG Length regs, to force linear addressing
101	L0 = R7;
102	L1 = R7;
103	L2 = R7;
104	L3 = R7;
105
106	// Clear ITEST_COMMAND and DTEST_COMMAND registers
107	I0.L = (ITEST_COMMAND & 0xFFFF);
108	I0.H = (ITEST_COMMAND >> 16);
109	I1.L = (DTEST_COMMAND & 0xFFFF);
110	I1.H = (DTEST_COMMAND >> 16);
111	[I0] = R7;
112	[I1] = R7;
113	CSYNC;
114
115	// Initialise the Event Vector table.
116	P0.H = IVBh;
117	P0.L = IVBl;
118
119	// Install __unknown_exception_occurred in EVT so that
120	// there is defined behaviour.
121	P0 += 2*4;		// Skip Emulation and Reset
122	P1 = 13;
123	R1.L = __unknown_exception_occurred;
124	R1.H = __unknown_exception_occurred;
125	LSETUP (.ivt,.ivt) LC0 = P1;
126.ivt:	[P0++] = R1;
127
128	// Set IVG15's handler to be the start of the mode-change
129	// code. Then, before we return from the Reset back to user
130	// mode, we'll raise IVG15. This will mean we stay in supervisor
131	// mode, and continue from the mode-change point, but at a
132	// much lower priority.
133	P1.H = supervisor_mode;
134	P1.L = supervisor_mode;
135	[P0] = P1;
136
137/////////////////////////////////////////////////////////////////
138// cplb-handler
139#include "cplb.h"
140	P1.H = _cplb_hdr;
141	P1.L = _cplb_hdr;
142	[P0-48] = P1;	// write exception handler
143.extern _cplb_hdr;
144
145
146/////////////////////////////////////////////////////////////////
147// standard
148	// Initialise the stack.
149	// Note: this points just past the end of the section.
150	// First write should be with [--SP].
151	SP.L=ldf_stack_end;
152	SP.H=ldf_stack_end;
153	usp = sp;
154
155	// We're still in supervisor mode at the moment, so the FP
156	// needs to point to the supervisor stack.
157	FP = SP;
158
159	// Make space for incoming "parameters" for functions
160	// we call from here:
161	SP += -12;
162
163	R0 = INTERRUPT_BITS;
164	R0 <<= 5;	// Bits 0-4 not settable.
165	CALL.X __install_default_handlers;
166
167	R1 = SYSCFG;
168	R4 = R0;		// Save modified list
169	BITSET(R1,1);
170	SYSCFG = R1;	// Enable the cycle counter
171
172/////////////////////////////////////////////////////////////////
173// blackfin-edinburgh-core
174#if WA_05000137
175	// Avoid Anomaly 02-00-0137
176	// Set the port preferences of DAG0 and DAG1 to be
177	// different; this gives better performance when
178	// performing daul-dag operations on SDRAM.
179	P0.L = DMEM_CONTROL & 0xFFFF;
180	P0.H = DMEM_CONTROL >> 16;
181	R0 = [P0];
182	BITSET(R0, 12);
183	BITCLR(R0, 13);
184	[P0] = R0;
185	CSYNC;
186#endif
187
188
189/*$VDSG<insert-code-early-startup>                              */
190.start_of_user_code1:
191  // Insert additional code to be executed before main here.
192  // This code is preserved if the CRT is re-generated.
193.end_of_user_code1:
194/*$VDSG<insert-code-early-startup>                              */
195
196/////////////////////////////////////////////////////////////////
197// cplb-init
198	// initialise the CPLBs if they're needed. This was not possible
199	// before we set up the stacks.
200	R0 = 81;				// cplb_ctrl = 81
201	CALL.X _cplb_init;
202.extern _cplb_init;
203.type _cplb_init,STT_FUNC;
204
205	.section/DOUBLEANY data1;
206___cplb_ctrl:
207	.align 4;
208	.byte4=81;
209.global ___cplb_ctrl;
210.type ___cplb_ctrl,STT_OBJECT;
211	.section/DOUBLEANY program;
212	.align 2;
213
214/////////////////////////////////////////////////////////////////
215// standard
216	//  Enable interrupts
217	STI R4;		// Using the mask from default handlers
218	RAISE 15;
219
220	// Move the processor into user mode.
221	P0.L=still_interrupt_in_ipend;
222	P0.H=still_interrupt_in_ipend;
223	RETI=P0;
224	NOP;		// Purely to prevent a stall warning
225
226still_interrupt_in_ipend:
227	// execute RTI until we've `finished` servicing all
228	// interrupts of priority higher than IVG15. Normally one
229	// would expect to only have the reset interrupt in IPEND
230	// being serviced, but occasionally when debugging this may
231	// not be the case - if restart is hit when servicing an
232	// interrupt.
233	//
234	// When we clear all bits from IPEND, we'll enter user mode,
235	// then we'll automatically jump to supervisor_mode to start
236	// servicing IVG15 (which we will 'service' for the whole
237	// program, so that the program is in supervisor mode.
238	// Need to do this to 'finish' servicing the reset interupt.
239	RTI;
240
241supervisor_mode:
242	[--SP] = RETI;	// re-enables the interrupt system
243	R0.L = UNASSIGNED_VAL;
244	R0.H = UNASSIGNED_VAL;
245
246	// Push a RETS and Old FP onto the stack, for sanity.
247	[--SP]=R0;
248	[--SP]=R0;
249	// Make sure the FP is sensible.
250	FP = SP;
251	// Leave space for incoming "parameters"
252	SP += -12;
253
254
255/*$VDSG<insert-code-before-device-initialization>               */
256.start_of_user_code2:
257  // Insert additional code to be executed before device initialization here.
258  // This code is preserved if the CRT is re-generated.
259.end_of_user_code2:
260/*$VDSG<insert-code-before-device-initialization>               */
261
262/////////////////////////////////////////////////////////////////
263// device-initialization
264	// initialise the devices known about for stdio.
265	CALL.X _init_devtab;
266.extern _init_devtab;
267.type _init_devtab,STT_FUNC;
268
269/////////////////////////////////////////////////////////////////
270// cplusplus
271	CALL.X ___ctorloop; // run global scope C++ constructors
272.extern ___ctorloop;
273.type ___ctorloop,STT_FUNC;
274
275
276/*$VDSG<insert-code-before-main-entry>                          */
277.start_of_user_code3:
278  // Insert additional code to be executed before main here.
279  // This code is preserved if the CRT is re-generated.
280.end_of_user_code3:
281/*$VDSG<insert-code-before-main-entry>                          */
282
283/////////////////////////////////////////////////////////////////
284// get-args
285	// Read command-line arguments.
286	CALL.X __getargv;
287	r1.l=__Argv;
288	r1.h=__Argv;
289
290.extern __getargv;
291.type __getargv,STT_FUNC;
292.extern __Argv;
293.type __Argv,STT_OBJECT;
294
295/////////////////////////////////////////////////////////////////
296// standard
297	// Call the application program.
298	CALL.X _main;
299
300/////////////////////////////////////////////////////////////////
301// call-exit
302	CALL.X _exit;	// passing in main's return value
303.extern _exit;
304.type _exit,STT_FUNC;
305
306/////////////////////////////////////////////////////////////////
307// standard
308.start.end:		// Required by the linker to know the size of the routine
309                // that is needed for absolute placement.
310
311.global start;
312.type start,STT_FUNC;
313.global .start.end;
314.type .start.end,STT_FUNC;
315.extern _main;
316.type _main,STT_FUNC;
317.extern ldf_stack_end;
318.extern __unknown_exception_occurred;
319.type __unknown_exception_occurred,STT_FUNC;
320.extern __install_default_handlers;
321.type __install_default_handlers,STT_FUNC;
322
323
324/////////////////////////////////////////////////////////////////
325// cplusplus
326.section/DOUBLEANY ctor;
327	.align 4;
328___ctor_table:
329	.byte4=0;
330.global ___ctor_table;
331.type ___ctor_table,STT_OBJECT;
332.section/DOUBLEANY .gdt;
333        .align 4;
334___eh_gdt:
335.global ___eh_gdt;
336        .byte4=0;
337.type ___eh_gdt,STT_OBJECT;
338.section/DOUBLEANY .frt;
339        .align 4;
340___eh_frt:
341.global ___eh_frt;
342        .byte4=0;
343.type ___eh_frt,STT_OBJECT;
344
345