1/* MANAGED-BY-SYSTEM-BUILDER */ 2/* VisualDSP++ 5.0 Update 6 */ 3/* LDF Printer version: 5.6.0.4 */ 4/* ldfgen.exe version: 5.6.0.4 */ 5/* VDSG version: 5.6.0.4 */ 6 7/* 8** ADSP-BF533 linker description file generated on Feb 22, 2012 at 14:26:29. 9** 10** Copyright (C) 2000-2008 Analog Devices Inc., All Rights Reserved. 11** 12** This file is generated automatically based upon the options selected 13** in the LDF Wizard. Changes to the LDF configuration should be made by 14** changing the appropriate options rather than editing this file. 15** 16** Configuration:- 17** crt_doj: bf533_basiccrt.doj 18** processor: ADSP-BF533 19** product_name: VisualDSP++ 5.0 Update 6 20** si_revision: automatic 21** default_silicon_revision_from_archdef: 0.5 22** cplb_init_cplb_ctrl: ( 23** CPLB_ENABLE_ICACHE 24** CPLB_ENABLE_DCACHE 25** CPLB_ENABLE_DCACHE2 26** CPLB_ENABLE_CPLBS 27** CPLB_ENABLE_ICPLBS 28** CPLB_ENABLE_DCPLBS 29** ) 30** using_cplusplus: true 31** mem_init: false 32** use_vdk: false 33** use_eh: true 34** use_argv: false 35** running_from_internal_memory: true 36** user_heap_src_file: E:\eclipse\3m_dsp\ARZ-3M3B-DSP_base26\rt-thread\bsp\bf533\vdsp\bf533_heaptab.c 37** libraries_use_stdlib: true 38** libraries_use_fileio_libs: false 39** libraries_use_ieeefp_emulation_libs: false 40** libraries_use_eh_enabled_libs: false 41** system_heap: L1 42** system_heap_min_size: 1k 43** system_stack: L1 44** system_stack_min_size: 1k 45** use_sdram: true 46** use_sdram_size: 64MB 47** use_sdram_partitioned: none 48** 49*/ 50 51ARCHITECTURE(ADSP-BF533) 52 53SEARCH_DIR($ADI_DSP/Blackfin/lib) 54 55 56// Workarounds are enabled, exceptions are disabled. 57#define RT_LIB_NAME(x) lib ## x ## y.dlb 58#define RT_LIB_NAME_EH(x) lib ## x ## y.dlb 59#define RT_LIB_NAME_MT(x) lib ## x ## y.dlb 60#define RT_LIB_NAME_EH_MT(x) lib ## x ## y.dlb 61#define RT_OBJ_NAME(x) x ## y.doj 62#define RT_OBJ_NAME_MT(x) x ## mty.doj 63 64 65$LIBRARIES = 66 67/*$VDSG<insert-user-libraries-at-beginning> */ 68/* Text inserted between these $VDSG comments will be preserved */ 69/*$VDSG<insert-user-libraries-at-beginning> */ 70 71 RT_LIB_NAME_MT(small532) 72 ,RT_LIB_NAME_MT(io532) 73 ,RT_LIB_NAME_MT(c532) 74 ,RT_LIB_NAME_MT(event532) 75 ,RT_LIB_NAME_MT(x532) 76 ,RT_LIB_NAME_EH_MT(cpp532) 77 ,RT_LIB_NAME_EH_MT(cpprt532) 78 ,RT_LIB_NAME(f64ieee532) 79 ,RT_LIB_NAME(dsp532) 80 ,RT_LIB_NAME(sftflt532) 81 ,RT_LIB_NAME(etsi532) 82 ,RT_LIB_NAME(ssl532) 83 ,RT_LIB_NAME(drv532) 84 ,RT_LIB_NAME(usb532) 85 ,RT_OBJ_NAME_MT(idle532) 86 ,RT_LIB_NAME_MT(rt_fileio532) 87 88/*$VDSG<insert-user-libraries-at-end> */ 89/* Text inserted between these $VDSG comments will be preserved */ 90/*$VDSG<insert-user-libraries-at-end> */ 91 92 ; 93 94$OBJECTS = 95 "bf533_basiccrt.doj" 96 97/*$VDSG<insert-user-objects-at-beginning> */ 98/* Text inserted between these $VDSG comments will be preserved */ 99/*$VDSG<insert-user-objects-at-beginning> */ 100 101 , RT_LIB_NAME(profile532) 102 , $COMMAND_LINE_OBJECTS 103 , "cplbtab533.doj" 104 105/*$VDSG<insert-user-objects-at-end> */ 106/* Text inserted between these $VDSG comments will be preserved */ 107/*$VDSG<insert-user-objects-at-end> */ 108 109 , RT_OBJ_NAME(crtn532) 110 ; 111 112$OBJS_LIBS_INTERNAL = 113 114/*$VDSG<insert-libraries-internal> */ 115/* Text inserted between these $VDSG comments will be preserved */ 116/*$VDSG<insert-libraries-internal> */ 117 118 $OBJECTS{prefersMem("internal")}, $LIBRARIES{prefersMem("internal")} 119 120/*$VDSG<insert-libraries-internal-end> */ 121/* Text inserted between these $VDSG comments will be preserved */ 122/*$VDSG<insert-libraries-internal-end> */ 123 124 ; 125 126$OBJS_LIBS_NOT_EXTERNAL = 127 128/*$VDSG<insert-libraries-not-external> */ 129/* Text inserted between these $VDSG comments will be preserved */ 130/*$VDSG<insert-libraries-not-external> */ 131 132 $OBJECTS{!prefersMem("external")}, $LIBRARIES{!prefersMem("external")} 133 134/*$VDSG<insert-libraries-not-external-end> */ 135/* Text inserted between these $VDSG comments will be preserved */ 136/*$VDSG<insert-libraries-not-external-end> */ 137 138 ; 139 140 141/*$VDSG<insert-user-macros> */ 142/* Text inserted between these $VDSG comments will be preserved */ 143/*$VDSG<insert-user-macros> */ 144 145 146/*$VDSG<customize-async-macros> */ 147/* This code is preserved if the LDF is re-generated. */ 148 149 150#define ASYNC0_MEMTYPE RAM 151#define ASYNC1_MEMTYPE RAM 152#define ASYNC2_MEMTYPE RAM 153#define ASYNC3_MEMTYPE RAM 154 155 156/*$VDSG<customize-async-macros> */ 157 158 159MEMORY 160{ 161/* 162** ADSP-BF533 MEMORY MAP. 163** 164** The known memory spaces are as follows: 165** 166** 0xFFE00000 - 0xFFFFFFFF Core MMR registers (2MB) 167** 0xFFC00000 - 0xFFDFFFFF System MMR registers (2MB) 168** 0xFFB01000 - 0xFFBFFFFF Reserved 169** 0xFFB00000 - 0xFFB00FFF Scratch SRAM (4K) 170** 0xFFA14000 - 0xFFAFFFFF Reserved 171** 0xFFA10000 - 0xFFA13FFF Code SRAM / cache (16K) 172** 0xFFA00000 - 0xFFA0FFFF Code SRAM (64K) 173** 0xFF908000 - 0xFF9FFFFF Reserved 174** 0xFF904000 - 0xFF907FFF Data Bank B SRAM / cache (16K) 175** 0xFF900000 - 0xFF903FFF Data Bank B SRAM (16K) 176** 0xFF808000 - 0xFF8FFFFF Reserved 177** 0xFF804000 - 0xFF807FFF Data Bank A SRAM / cache (16K) 178** 0xFF800000 - 0xFF803FFF Data Bank A SRAM (16K) 179** 0xEF000000 - 0xFF7FFFFF Reserved 180** 0x20400000 - 0xEEFFFFFF Reserved 181** 0x20300000 - 0x203FFFFF ASYNC MEMORY BANK 3 (1MB) 182** 0x20200000 - 0x202FFFFF ASYNC MEMORY BANK 2 (1MB) 183** 0x20100000 - 0x201FFFFF ASYNC MEMORY BANK 1 (1MB) 184** 0x20000000 - 0x200FFFFF ASYNC MEMORY BANK 0 (1MB) 185** 0x00000000 - 0x07FFFFFF SDRAM MEMORY (16MB - 128MB) 186*/ 187 188 MEM_L1_SCRATCH { TYPE(RAM) START(0xFFB00000) END(0xFFB00FFF) WIDTH(8) } 189 MEM_L1_CODE_CACHE { TYPE(RAM) START(0xFFA10000) END(0xFFA13FFF) WIDTH(8) } 190 MEM_L1_CODE { TYPE(RAM) START(0xFFA00000) END(0xFFA0FFFF) WIDTH(8) } 191 MEM_L1_DATA_B_CACHE { TYPE(RAM) START(0xFF904000) END(0xFF907FFF) WIDTH(8) } 192 MEM_L1_DATA_B { TYPE(RAM) START(0xFF900000) END(0xFF903FFF) WIDTH(8) } 193 MEM_L1_DATA_A_CACHE { TYPE(RAM) START(0xFF804000) END(0xFF807FFF) WIDTH(8) } 194 MEM_L1_DATA_A { TYPE(RAM) START(0xFF800000) END(0xFF803FFF) WIDTH(8) } 195 MEM_ASYNC3 { TYPE(ASYNC3_MEMTYPE) START(0x20300000) END(0x203FFFFF) WIDTH(8) } 196 MEM_ASYNC2 { TYPE(ASYNC2_MEMTYPE) START(0x20200000) END(0x202FFFFF) WIDTH(8) } 197 MEM_ASYNC1 { TYPE(ASYNC1_MEMTYPE) START(0x20100000) END(0x201FFFFF) WIDTH(8) } 198 MEM_ASYNC0 { TYPE(ASYNC0_MEMTYPE) START(0x20000000) END(0x200FFFFF) WIDTH(8) } 199 MEM_SDRAM0 { TYPE(RAM) START(0x00000004) END(0x03ffffff) WIDTH(8) } 200 201 /*$VDSG<insert-new-memory-segments> */ 202 /* Text inserted between these $VDSG comments will be preserved */ 203 /*$VDSG<insert-new-memory-segments> */ 204 205} /* MEMORY */ 206 207PROCESSOR p0 208{ 209 OUTPUT($COMMAND_LINE_OUTPUT_FILE) 210 RESOLVE(start, 0xFFA00000) 211 KEEP(start, _main) 212 KEEP_SECTIONS(FSymTab,VSymTab,RTMSymTab) 213 214 /*$VDSG<insert-user-ldf-commands> */ 215 /* Text inserted between these $VDSG comments will be preserved */ 216 /*$VDSG<insert-user-ldf-commands> */ 217 218 SECTIONS 219 { 220 /* Workaround for hardware errata 05-00-0189 and 05-00-0310 - 221 ** "Speculative (and fetches made at boundary of reserved memory 222 ** space) for instruction or data fetches may cause false 223 ** protection exceptions" and "False hardware errors caused by 224 ** fetches at the boundary of reserved memory ". 225 ** 226 ** Done by avoiding use of 76 bytes from at the end of blocks 227 ** that are adjacent to reserved memory. Workaround is enabled 228 ** for appropriate silicon revisions (-si-revision switch). 229 */ 230 RESERVE(___wab0=MEMORY_END(MEM_L1_SCRATCH) - 75, ___l0 = 76) 231 RESERVE(___wab2=MEMORY_END(MEM_L1_CODE) - 75, ___l2 = 76) 232 RESERVE(___wab3=MEMORY_END(MEM_L1_DATA_B_CACHE) - 75, ___l3 = 76) 233 RESERVE(___wab5=MEMORY_END(MEM_L1_DATA_A_CACHE) - 75, ___l5 = 76) 234 RESERVE(___wab7=MEMORY_END(MEM_ASYNC3) - 75, ___l7 = 76) 235 RESERVE(___wab9=MEMORY_END(MEM_SDRAM0) - 75, ___l9 = 76) 236 237 /*$VDSG<insert-new-sections-at-the-start> */ 238 /* Text inserted between these $VDSG comments will be preserved */ 239 /*$VDSG<insert-new-sections-at-the-start> */ 240 241 scratchpad NO_INIT 242 { 243 INPUT_SECTION_ALIGN(4) 244 245 /*$VDSG<insert-input-sections-at-the-start-of-scratchpad> */ 246 /* Text inserted between these $VDSG comments will be preserved */ 247 /*$VDSG<insert-input-sections-at-the-start-of-scratchpad> */ 248 249 INPUT_SECTIONS($OBJECTS(L1_scratchpad) $LIBRARIES(L1_scratchpad)) 250 251 /*$VDSG<insert-input-sections-at-the-end-of-scratchpad> */ 252 /* Text inserted between these $VDSG comments will be preserved */ 253 /*$VDSG<insert-input-sections-at-the-end-of-scratchpad> */ 254 255 } > MEM_L1_SCRATCH 256 257 L1_code 258 { 259 INPUT_SECTION_ALIGN(4) 260 INPUT_SECTIONS($OBJECTS(L1_code) $LIBRARIES(L1_code)) 261 262 /*$VDSG<insert-input-sections-at-the-start-of-l1_code> */ 263 /* Text inserted between these $VDSG comments will be preserved */ 264 /*$VDSG<insert-input-sections-at-the-start-of-l1_code> */ 265 266 INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code)) 267 INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb)) 268 INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code)) 269 INPUT_SECTIONS($OBJS_LIBS_INTERNAL(program)) 270 INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(program)) 271 INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program)) 272 273 /*$VDSG<insert-input-sections-at-the-end-of-l1_code> */ 274 /* Text inserted between these $VDSG comments will be preserved */ 275 /*$VDSG<insert-input-sections-at-the-end-of-l1_code> */ 276 277 } > MEM_L1_CODE 278 279 L1_code_cache 280 { 281 INPUT_SECTION_ALIGN(4) 282 ___l1_code_cache = 1; 283 } > MEM_L1_CODE_CACHE 284 285 L1_data_a_1 286 { 287 INPUT_SECTION_ALIGN(4) 288 INPUT_SECTIONS($OBJECTS(L1_data_a) $LIBRARIES(L1_data_a)) 289 INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data)) 290 291 /*$VDSG<insert-input-sections-at-the-start-of-L1_data_a> */ 292 /* Text inserted between these $VDSG comments will be preserved */ 293 /*$VDSG<insert-input-sections-at-the-start-of-L1_data_a> */ 294 295 RESERVE(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length = 1024,4) 296 } > MEM_L1_DATA_A 297 298 L1_data_a_bsz ZERO_INIT 299 { 300 INPUT_SECTION_ALIGN(4) 301 INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz)) 302 } > MEM_L1_DATA_A 303 304 L1_data_a_tables 305 { 306 INPUT_SECTION_ALIGN(4) 307 FORCE_CONTIGUITY 308 INPUT_SECTIONS($OBJECTS(vtbl) $LIBRARIES(vtbl)) 309 INPUT_SECTIONS($OBJECTS(ctor) $LIBRARIES(ctor)) 310 INPUT_SECTIONS($OBJECTS(ctorl) $LIBRARIES(ctorl)) 311 INPUT_SECTIONS($OBJECTS(.frt) $LIBRARIES(.frt)) 312 INPUT_SECTIONS($OBJECTS(.rtti) $LIBRARIES(.rtti)) 313 INPUT_SECTIONS($OBJECTS(.gdt) $LIBRARIES(.gdt)) 314 INPUT_SECTIONS($OBJECTS(.gdtl) $LIBRARIES(.gdtl)) 315 INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt)) 316 INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht)) 317 } > MEM_L1_DATA_A 318 319 L1_data_a 320 { 321 INPUT_SECTION_ALIGN(4) 322 INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data)) 323 INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata)) 324 INPUT_SECTIONS($OBJS_LIBS_INTERNAL(data1)) 325 INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(data1)) 326 INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1)) 327 INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata)) 328 329 /*$VDSG<insert-input-sections-at-the-end-of-L1_data_a> */ 330 /* Text inserted between these $VDSG comments will be preserved */ 331 /*$VDSG<insert-input-sections-at-the-end-of-L1_data_a> */ 332 333 } > MEM_L1_DATA_A 334 335 bsz_L1_data_a ZERO_INIT 336 { 337 INPUT_SECTION_ALIGN(4) 338 INPUT_SECTIONS($OBJS_LIBS_INTERNAL(bsz)) 339 INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(bsz)) 340 INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz)) 341 } > MEM_L1_DATA_A 342 343 L1_data_a_stack_heap 344 { 345 INPUT_SECTION_ALIGN(4) 346 RESERVE_EXPAND(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length , 0, 4) 347 ldf_stack_space = heaps_and_stack_in_L1_data_a; 348 ldf_stack_end = (ldf_stack_space + (heaps_and_stack_in_L1_data_a_length - 4)) & 0xfffffffc; 349 } > MEM_L1_DATA_A 350 351 L1_data_a_cache 352 { 353 INPUT_SECTION_ALIGN(4) 354 ___l1_data_cache_a = 1; 355 } > MEM_L1_DATA_A_CACHE 356 357 L1_data_b_bsz ZERO_INIT 358 { 359 INPUT_SECTION_ALIGN(4) 360 INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz)) 361 } > MEM_L1_DATA_B 362 363 L1_data_b 364 { 365 INPUT_SECTION_ALIGN(4) 366 INPUT_SECTIONS($OBJECTS(L1_data_b) $LIBRARIES(L1_data_b)) 367 INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data)) 368 369 /*$VDSG<insert-input-sections-at-the-start-of-L1_data_b> */ 370 /* Text inserted between these $VDSG comments will be preserved */ 371 /*$VDSG<insert-input-sections-at-the-start-of-L1_data_b> */ 372 373 RESERVE(heaps_and_stack_in_L1_data_b, heaps_and_stack_in_L1_data_b_length = 1024,4) 374 INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data)) 375 INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata)) 376 INPUT_SECTIONS($OBJS_LIBS_INTERNAL(data1)) 377 INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(data1)) 378 INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1)) 379 INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata)) 380 INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt) ) 381 INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht) ) 382 383 /*$VDSG<insert-input-sections-at-the-end-of-L1_data_b> */ 384 /* Text inserted between these $VDSG comments will be preserved */ 385 /*$VDSG<insert-input-sections-at-the-end-of-L1_data_b> */ 386 387 } > MEM_L1_DATA_B 388 389 bsz_L1_data_b ZERO_INIT 390 { 391 INPUT_SECTION_ALIGN(4) 392 INPUT_SECTIONS($OBJS_LIBS_INTERNAL(bsz)) 393 INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(bsz)) 394 INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz)) 395 } > MEM_L1_DATA_B 396 397 L1_data_b_stack_heap 398 { 399 INPUT_SECTION_ALIGN(4) 400 RESERVE_EXPAND(heaps_and_stack_in_L1_data_b, heaps_and_stack_in_L1_data_b_length , 0, 4) 401 ldf_heap_space = heaps_and_stack_in_L1_data_b; 402 ldf_heap_end = (ldf_heap_space + (heaps_and_stack_in_L1_data_b_length - 4)) & 0xfffffffc; 403 ldf_heap_length = ldf_heap_end - ldf_heap_space; 404 } > MEM_L1_DATA_B 405 406 L1_data_b_cache 407 { 408 INPUT_SECTION_ALIGN(4) 409 ___l1_data_cache_b = 1; 410 } > MEM_L1_DATA_B_CACHE 411 412 sdram 413 { 414 INPUT_SECTION_ALIGN(4) 415 INPUT_SECTIONS($OBJECTS(sdram0) $LIBRARIES(sdram0)) 416 INPUT_SECTIONS($OBJECTS(sdram0_bank0) $LIBRARIES(sdram0_bank0)) 417 INPUT_SECTIONS($OBJECTS(sdram0_bank1) $LIBRARIES(sdram0_bank1)) 418 INPUT_SECTIONS($OBJECTS(sdram0_bank2) $LIBRARIES(sdram0_bank2)) 419 INPUT_SECTIONS($OBJECTS(sdram0_bank3) $LIBRARIES(sdram0_bank3)) 420 421 /*$VDSG<insert-input-sections-at-the-start-of-sdram> */ 422 /* Text inserted between these $VDSG comments will be preserved */ 423 /*$VDSG<insert-input-sections-at-the-start-of-sdram> */ 424 425 INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code)) 426 INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program)) 427 INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb)) 428 INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code)) 429 INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1)) 430 INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata)) 431 INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata)) 432 INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data)) 433 INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt)) 434 INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht)) 435 436 /*$VDSG<insert-input-sections-at-the-end-of-sdram> */ 437 /* Text inserted between these $VDSG comments will be preserved */ 438 /*$VDSG<insert-input-sections-at-the-end-of-sdram> */ 439 440 } > MEM_SDRAM0 441 442 bsz_sdram0 ZERO_INIT 443 { 444 INPUT_SECTION_ALIGN(4) 445 INPUT_SECTIONS($OBJECTS(sdram_bsz) $LIBRARIES(sdram_bsz)) 446 INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz)) 447 } > MEM_SDRAM0 448 449 rt_thread_section 450 { 451 /* section information for finsh shell */ 452 INPUT_SECTION_ALIGN(4) 453 __fsymtab_start = .; 454 INPUT_SECTIONS($OBJECTS(FSymTab) $LIBRARIES(FSymTab)) 455 __fsymtab_end = .; 456 457 INPUT_SECTION_ALIGN(4) 458 __vsymtab_start = .; 459 INPUT_SECTIONS($OBJECTS(VSymTab) $LIBRARIES(VSymTab)) 460 __vsymtab_end = .; 461 462 /* section information for modules */ 463 INPUT_SECTION_ALIGN(4) 464 __rtmsymtab_start = .; 465 INPUT_SECTIONS($OBJECTS(RTMSymTab) $LIBRARIES(RTMSymTab)) 466 __rtmsymtab_end = .; 467 468 RESERVE(heaps_in_sdram_space, heaps_in_sdram_length = 2048,4) 469 } > MEM_SDRAM0 470 471 sdram_stack_heap 472 { 473 RESERVE_EXPAND(heaps_in_sdram_space, heaps_in_sdram_length , 0, 4) 474 rtt_heap_start = heaps_in_sdram_space; 475 rtt_heap_end = (heaps_in_sdram_space + heaps_in_sdram_length - 32) & 0xfffffffc; 476 rtt_heap_length = rtt_heap_end - rtt_heap_start; 477 } > MEM_SDRAM0 478 479 480 /*$VDSG<insert-new-sections-at-the-end> */ 481 /* Text inserted between these $VDSG comments will be preserved */ 482 /*$VDSG<insert-new-sections-at-the-end> */ 483 484 } /* SECTIONS */ 485} /* p0 */ 486 487