1/**************************************************************************************** 2* @file bl702_flash.ld 3* 4* @brief This file is the map file (gnuarm or armgcc). 5* 6* Copyright (C) BouffaloLab 2021 7* 8**************************************************************************************** 9*/ 10 11/* configure the CPU type */ 12OUTPUT_ARCH( "riscv" ) 13/* link with the standard c library */ 14/* INPUT(-lc) */ 15/* link with the standard GCC library */ 16/* INPUT(-lgcc) */ 17/* configure the entry point */ 18ENTRY(__start) 19 20StackSize = 0x1000; /* 4KB */ 21 22MEMORY 23{ 24 fw_header_memory (rx) : ORIGIN = 0x23000000 - 0x1000, LENGTH = 4K 25 xip_memory (rx) : ORIGIN = 0x23000000, LENGTH = 1024K 26 itcm_memory (rx) : ORIGIN = 0x22014000, LENGTH = 12K 27 dtcm_memory (rx) : ORIGIN = 0x42017000, LENGTH = 4K 28 ram_memory (!rx) : ORIGIN = 0x42018000, LENGTH = 96K 29 hbn_memory (rx) : ORIGIN = 0x40010000, LENGTH = 0xE00 /* hbn ram 4K used 3.5K*/ 30} 31 32SECTIONS 33{ 34 PROVIDE(__metal_chicken_bit = 0); 35 36 .fw_header : 37 { 38 KEEP(*(.fw_header)) 39 } > fw_header_memory 40 41 .text : 42 { 43 . = ALIGN(4); 44 __text_code_start__ = .; 45 46 KEEP (*(SORT_NONE(.init))) 47 KEEP (*(SORT_NONE(.vector))) 48 49 *(.text) 50 *(.text.*) 51 52 /* section information for finsh shell */ 53 . = ALIGN(4); 54 __fsymtab_start = .; 55 KEEP(*(FSymTab)) 56 __fsymtab_end = .; 57 . = ALIGN(4); 58 __vsymtab_start = .; 59 KEEP(*(VSymTab)) 60 __vsymtab_end = .; 61 . = ALIGN(4); 62 63 /* section information for modules */ 64 . = ALIGN(4); 65 __rtmsymtab_start = .; 66 KEEP(*(RTMSymTab)) 67 __rtmsymtab_end = .; 68 69 /* section information for initialization */ 70 . = ALIGN(4); 71 __rt_init_start = .; 72 KEEP(*(SORT(.rti_fn*))) 73 __rt_init_end = .; 74 75 /*put .rodata**/ 76 *(EXCLUDE_FILE( *bl702_glb*.o* \ 77 *bl702_pds*.o* \ 78 *bl702_common*.o* \ 79 *bl702_sf_cfg*.o* \ 80 *bl702_sf_cfg_ext*.o* \ 81 *bl702_sf_ctrl*.o* \ 82 *bl702_sflash*.o* \ 83 *bl702_sflash_ext*.o* \ 84 *bl702_xip_sflash*.o* \ 85 *bl702_xip_sflash_ext*.o* \ 86 *bl702_ef_ctrl*.o*) .rodata*) 87 88 *(.srodata) 89 *(.srodata.*) 90 91 . = ALIGN(4); 92 __text_code_end__ = .; 93 } > xip_memory 94 95 . = ALIGN(4); 96 __itcm_load_addr = .; 97 98 .itcm_region : AT (__itcm_load_addr) 99 { 100 . = ALIGN(4); 101 __tcm_code_start__ = .; 102 103 *(.tcm_code.*) 104 *(.tcm_const.*) 105 *(.sclock_rlt_code.*) 106 *(.sclock_rlt_const.*) 107 108 *bl702_glb*.o*(.rodata*) 109 *bl702_pds*.o*(.rodata*) 110 *bl702_common*.o*(.rodata*) 111 *bl702_sf_cfg*.o*(.rodata*) 112 *bl702_sf_cfg_ext*.o*(.rodata*) 113 *bl702_sf_ctrl*.o*(.rodata*) 114 *bl702_sflash*.o*(.rodata*) 115 *bl702_sflash_ext*.o*(.rodata*) 116 *bl702_xip_sflash*.o*(.rodata*) 117 *bl702_xip_sflash_ext*.o*(.rodata*) 118 *bl702_ef_ctrl*.o*(.rodata*) 119 120 . = ALIGN(4); 121 __tcm_code_end__ = .; 122 } > itcm_memory 123 124 __hbn_load_addr = __itcm_load_addr + SIZEOF(.itcm_region); 125 126 .hbn_ram_region : AT (__hbn_load_addr) 127 { 128 . = ALIGN(4); 129 __hbn_ram_start__ = .; 130 *bl702_hbn_wakeup*.o*(.rodata*) 131 *(.hbn_ram_code*) 132 *(.hbn_ram_data) 133 . = ALIGN(4); 134 __hbn_ram_end__ = .; 135 } > hbn_memory 136 137 __dtcm_load_addr = __hbn_load_addr + SIZEOF(.hbn_ram_region); 138 139 .dtcm_region : AT (__dtcm_load_addr) 140 { 141 . = ALIGN(4); 142 __tcm_data_start__ = .; 143 144 *(.tcm_data) 145 /* *finger_print.o(.data*) */ 146 147 . = ALIGN(4); 148 __tcm_data_end__ = .; 149 } > dtcm_memory 150 151 /*************************************************************************/ 152 /* .stack_dummy section doesn't contains any symbols. It is only 153 * used for linker to calculate size of stack sections, and assign 154 * values to stack symbols later */ 155 .stack_dummy (NOLOAD): 156 { 157 . = ALIGN(0x4); 158 . = . + StackSize; 159 . = ALIGN(0x4); 160 } > dtcm_memory 161 162 /* Set stack top to end of RAM, and stack limit move down by 163 * size of stack_dummy section */ 164 __StackTop = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory); 165 PROVIDE( __freertos_irq_stack_top = __StackTop); 166 PROVIDE( __rt_rvstack = . ); 167 __StackLimit = __StackTop - SIZEOF(.stack_dummy); 168 169 /* Check if data + heap + stack exceeds RAM limit */ 170 ASSERT(__StackLimit >= __tcm_data_end__, "region RAM overflowed with stack") 171 /*************************************************************************/ 172 173 __ram_load_addr = __dtcm_load_addr + SIZEOF(.dtcm_region); 174 175 /* Data section */ 176 RAM_DATA : AT (__ram_load_addr) 177 { 178 . = ALIGN(4); 179 __ram_data_start__ = .; 180 181 PROVIDE( __global_pointer$ = . + 0x800 ); 182 183 *(.data) 184 *(.data.*) 185 *(.sdata) 186 *(.sdata.*) 187 *(.sdata2) 188 *(.sdata2.*) 189 190 *(.nocache_ram) 191 192 . = ALIGN(4); 193 __bflog_tags_start__ = .; 194 *(.bflog_tags_array) 195 . = ALIGN(4); 196 __bflog_tags_end__ = .; 197 __ram_data_end__ = .; 198 } > ram_memory 199 200 .bss (NOLOAD) : 201 { 202 . = ALIGN(4); 203 __bss_start__ = .; 204 205 *(.bss*) 206 *(.sbss*) 207 *(COMMON) 208 209 . = ALIGN(4); 210 __bss_end__ = .; 211 } > ram_memory 212 213 .noinit_data (NOLOAD) : 214 { 215 . = ALIGN(4); 216 __noinit_data_start__ = .; 217 218 *(.noinit_data*) 219 *(.nocache_noinit_ram) 220 221 . = ALIGN(4); 222 __noinit_data_end__ = .; 223 } > ram_memory 224 225 .heap (NOLOAD): 226 { 227 . = ALIGN(4); 228 __HeapBase = .; 229 230 KEEP(*(.heap*)) 231 232 . = ALIGN(4); 233 __HeapLimit = .; 234 } > ram_memory 235 236 PROVIDE (__heap_min_size = 0x400); 237 __HeapLimit = ORIGIN(ram_memory) + LENGTH(ram_memory); 238 239 ASSERT((__HeapLimit - __HeapBase ) >= __heap_min_size, "heap size is too short.") 240 241} 242 243