1 #ifndef _BFLB_EMAC_H 2 #define _BFLB_EMAC_H 3 4 #include "bflb_core.h" 5 6 /** @addtogroup LHAL 7 * @{ 8 */ 9 10 /** @addtogroup EMAC 11 * @{ 12 */ 13 14 #define EMAC_DO_FLUSH_DATA (1) 15 16 /* EMAC clock use external or use internal; 0: used external 1: used internal */ 17 #define EMAC_CLK_USE_EXTERNAL (0) 18 #define EMAC_CLK_USE_INTERNAL (1) 19 20 /** @defgroup EMAC_CMD emac feature control cmd definition 21 * @{ 22 */ 23 #define EMAC_CMD_NO_PREAMBLE_MODE (0x01) 24 #define EMAC_CMD_EN_PROMISCUOUS (0x02) 25 #define EMAC_CMD_FRAME_GAP_CHECK (0x03) 26 #define EMAC_CMD_FULL_DUPLEX (0x04) 27 #define EMAC_CMD_EN_TX_CRC_FIELD (0x05) 28 #define EMAC_CMD_RECV_HUGE_FRAMES (0x06) 29 #define EMAC_CMD_EN_AUTO_PADDING (0x07) 30 #define EMAC_CMD_RECV_SMALL_FRAME (0x08) 31 #define EMAC_CMD_SET_PHY_ADDRESS (0x09) 32 #define EMAC_CMD_SET_MAC_ADDRESS (0x0A) 33 #define EMAC_CMD_SET_PACKET_GAP (0x0B) 34 #define EMAC_CMD_SET_MIN_FRAME (0x0C) 35 #define EMAC_CMD_SET_MAX_FRAME (0x0D) 36 #define EMAC_CMD_SET_MAXRET (0x0E) 37 #define EMAC_CMD_SET_COLLVALID (0x0F) 38 /** 39 * @} 40 */ 41 42 /** @defgroup PHY_STATE phy state definition 43 * @{ 44 */ 45 #define PHY_STATE_DOWN (0) /* PHY is not usable */ 46 #define PHY_STATE_READY (1) /* PHY is OK, wait for controller */ 47 #define PHY_STATE_UP (2) /* Network is ready for TX/RX */ 48 #define PHY_STATE_RUNNING (3) /* working */ 49 #define PHY_STATE_NOLINK (4) /* no cable connected */ 50 #define PHY_STATE_STOPPED (5) /* PHY has been stopped */ 51 #define PHY_STATE_TESTING (6) /* in test mode */ 52 /** 53 * @} 54 */ 55 56 /* EMAC PACKET */ 57 #define EMAC_NORMAL_PACKET (uint32_t)(0) 58 #define EMAC_FRAGMENT_PACKET (uint32_t)(0x01) 59 #define EMAC_NOCOPY_PACKET (uint32_t)(0x02) 60 61 /* ETH packet size */ 62 /* ETH | Header | Extra | VLAN tag | Payload | CRC | */ 63 /* Size | 14 | 2 | 4 | 46 ~ 1500 | 4 | */ 64 #define ETH_MAX_PACKET_SIZE ((uint32_t)1524U) /*!< ETH_HEADER + ETH_EXTRA + ETH_VLAN_TAG + ETH_MAX_ETH_PAYLOAD + ETH_CRC */ 65 #define ETH_HEADER_SZIE ((uint32_t)14U) /*!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */ 66 #define ETH_CRC_SIZE ((uint32_t)4U) /*!< Ethernet CRC */ 67 #define ETH_EXTRA_SIZE ((uint32_t)2U) /*!< Extra bytes in some cases */ 68 #define ETH_VLAN_TAG_SIZE ((uint32_t)4U) /*!< optional 802.1q VLAN Tag */ 69 #define ETH_MIN_ETH_PAYLOAD_SIZE ((uint32_t)46U) /*!< Minimum Ethernet payload size */ 70 #define ETH_MAX_ETH_PAYLOAD_SIZE ((uint32_t)1500U) /*!< Maximum Ethernet payload size */ 71 #define ETH_JUMBO_FRAME_PAYLOAD_SIZE ((uint32_t)9000U) /*!< Jumbo frame payload size */ 72 73 /* ETH tx & rx buffer size */ 74 #ifndef ETH_TX_BUFFER_SIZE 75 #define ETH_TX_BUFFER_SIZE (ETH_MAX_PACKET_SIZE) 76 #endif 77 #ifndef ETH_RX_BUFFER_SIZE 78 #define ETH_RX_BUFFER_SIZE (ETH_MAX_PACKET_SIZE) 79 #endif 80 81 /* emac interrupt UNMASK/MASK define */ 82 #define EMAC_INT_EN_TX_DONE (1 << 0) 83 #define EMAC_INT_EN_TX_ERROR (1 << 1) 84 #define EMAC_INT_EN_RX_DONE (1 << 2) 85 #define EMAC_INT_EN_RX_ERROR (1 << 3) 86 #define EMAC_INT_EN_RX_BUSY (1 << 4) 87 #define EMAC_INT_EN_TX_CTRL (1 << 5) 88 #define EMAC_INT_EN_RX_CTRL (1 << 6) 89 #define EMAC_INT_EN_ALL (0x7f << 0) 90 91 /* emac interrupt status define */ 92 #define EMAC_INT_STS_TX_DONE (1 << 0) 93 #define EMAC_INT_STS_TX_ERROR (1 << 1) 94 #define EMAC_INT_STS_RX_DONE (1 << 2) 95 #define EMAC_INT_STS_RX_ERROR (1 << 3) 96 #define EMAC_INT_STS_RX_BUSY (1 << 4) 97 #define EMAC_INT_STS_TX_CTRL (1 << 5) 98 #define EMAC_INT_STS_RX_CTRL (1 << 6) 99 #define EMAC_INT_STS_ALL (0x7f << 0) 100 101 /* emac buffer descriptors type define */ 102 #define EMAC_BD_TYPE_INVLAID (0) 103 #define EMAC_BD_TYPE_TX (1) 104 #define EMAC_BD_TYPE_RX (2) 105 #define EMAC_BD_TYPE_NONE (3) 106 #define EMAC_BD_TYPE_MAX (0x7FFFFFFF) 107 108 /** 109 * @brief EMAC configuration structure 110 * 111 * @param mac_addr EMAC mac addr 112 * @param inside_clk EMAC select inside or external @ref EMAC_CLK_USE_EXTERNAL or EMAC_CLK_USE_INTERNAL 113 * @param mii_clk_div mii clock div 114 * @param min_frame_len min frame len 115 * @param max_frame_len max frame len 116 * 117 */ 118 struct bflb_emac_config_s { 119 uint8_t mac_addr[6]; 120 uint8_t inside_clk; 121 uint8_t mii_clk_div; 122 uint16_t min_frame_len; 123 uint16_t max_frame_len; 124 }; 125 126 /** 127 * @brief EMAC phy configuration structure 128 * 129 * @param auto_negotiation EMAC phy speed and mode auto negotiation 130 * @param full_duplex EMAC phy duplex mode 131 * @param phy_state EMAC phy down,ready,up,running,nolink,halted, @ref PHY_STATE 132 * @param use_irq EMAC phy interrupt enable 0: no IRQ used 133 * @param speed EMAC phy speed mode 134 * @param phy_address EMAC phy address 135 * @param phy_id EMAC phy read phy id 136 */ 137 struct bflb_emac_phy_cfg_s { 138 uint8_t auto_negotiation; 139 uint8_t full_duplex; 140 uint8_t phy_state; 141 uint8_t use_irq; 142 uint16_t speed; 143 uint16_t phy_address; 144 uint32_t phy_id; 145 }; 146 147 #ifdef __cplusplus 148 extern "C" { 149 #endif 150 151 /** 152 * @brief 153 * 154 * @param [in] dev 155 * @param [in] config 156 */ 157 void bflb_emac_init(struct bflb_device_s *dev, const struct bflb_emac_config_s *config); 158 159 /** 160 * @brief 161 * 162 * @param [in] dev 163 */ 164 void bflb_emac_stop(struct bflb_device_s *dev); 165 166 /** 167 * @brief 168 * 169 * @param [in] dev 170 */ 171 void bflb_emac_start(struct bflb_device_s *dev); 172 173 /** 174 * @brief 175 * 176 * @param [in] dev 177 */ 178 void bflb_emac_start_tx(struct bflb_device_s *dev); 179 180 /** 181 * @brief 182 * 183 * @param [in] dev 184 */ 185 void bflb_emac_stop_tx(struct bflb_device_s *dev); 186 187 /** 188 * @brief 189 * 190 * @param [in] dev 191 */ 192 void bflb_emac_start_rx(struct bflb_device_s *dev); 193 194 /** 195 * @brief 196 * 197 * @param [in] dev 198 */ 199 void bflb_emac_stop_rx(struct bflb_device_s *dev); 200 201 /** 202 * @brief 203 * 204 * @param [in] dev 205 * @param [in] eth_tx_buff 206 * @param [in] tx_buf_count 207 * @param [in] eth_rx_buff 208 * @param [in] rx_buf_count 209 */ 210 void bflb_emac_bd_init(struct bflb_device_s *dev, uint8_t *eth_tx_buff, uint8_t tx_buf_count, uint8_t *eth_rx_buff, uint8_t rx_buf_count); 211 212 /** 213 * @brief 214 * 215 * @param [in] dev 216 * @param [in] bdt 217 * @return uint32_t 218 */ 219 uint32_t bflb_emac_bd_get_cur_active(struct bflb_device_s *dev, uint8_t bdt); 220 221 /** 222 * @brief 223 * 224 * @param [in] index 225 */ 226 void bflb_emac_bd_rx_enqueue(uint32_t index); 227 228 /** 229 * @brief 230 * 231 * @param [in] index 232 */ 233 void bflb_emac_bd_rx_on_err(uint32_t index); 234 235 /** 236 * @brief 237 * 238 * @param [in] index 239 */ 240 void bflb_emac_bd_tx_dequeue(uint32_t index); 241 242 /** 243 * @brief 244 * 245 * @param [in] index 246 */ 247 void bflb_emac_bd_tx_on_err(uint32_t index); 248 249 /** 250 * @brief 251 * 252 * @param [in] flags 253 * @param [in] len 254 * @param [in] data_in 255 * @return int 256 */ 257 int bflb_emac_bd_tx_enqueue(uint32_t flags, uint32_t len, const uint8_t *data_in); 258 259 /** 260 * @brief 261 * 262 * @param [in] flags 263 * @param [in] len 264 * @param [in] data_out 265 * @return int 266 */ 267 int bflb_emac_bd_rx_dequeue(uint32_t flags, uint32_t *len, uint8_t *data_out); 268 269 /** 270 * @brief 271 * 272 * @return int 273 */ 274 int emac_bd_fragment_support(void); 275 276 /** 277 * @brief 278 * 279 * @param [in] dev 280 * @param [in] flag 281 * @param [in] enable 282 */ 283 void bflb_emac_int_enable(struct bflb_device_s *dev, uint32_t flag, bool enable); 284 285 /** 286 * @brief 287 * 288 * @param [in] dev 289 * @param [in] flag 290 */ 291 void bflb_emac_int_clear(struct bflb_device_s *dev, uint32_t flag); 292 293 /** 294 * @brief 295 * 296 * @param [in] dev 297 * @return uint32_t 298 */ 299 uint32_t bflb_emac_get_int_status(struct bflb_device_s *dev); 300 301 /** 302 * @brief 303 * 304 * @param [in] dev 305 * @param [in] cmd 306 * @param [in] arg 307 * @return int 308 */ 309 int bflb_emac_feature_control(struct bflb_device_s *dev, int cmd, size_t arg); 310 311 /** 312 * @brief 313 * 314 * @param [in] dev 315 * @param [in] phy_reg 316 * @param [in] phy_reg_val 317 * @return int 318 */ 319 int bflb_emac_phy_reg_read(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t *phy_reg_val); 320 321 /** 322 * @brief 323 * 324 * @param [in] dev 325 * @param [in] phy_reg 326 * @param [in] phy_reg_val 327 * @return int 328 */ 329 int bflb_emac_phy_reg_write(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t phy_reg_val); 330 331 #ifdef __cplusplus 332 } 333 #endif 334 335 /** 336 * @} 337 */ 338 339 /** 340 * @} 341 */ 342 343 #endif