1 #ifndef _BFLB_SPI_H 2 #define _BFLB_SPI_H 3 4 #include "bflb_core.h" 5 6 /** @addtogroup LHAL 7 * @{ 8 */ 9 10 /** @addtogroup SPI 11 * @{ 12 */ 13 14 #if defined(BL602) || defined(BL702) 15 #define SPI_FIFO_WORD_NUM_MAX 4 16 #define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 0 17 #elif defined(BL606P) || defined(BL808) 18 #define SPI_FIFO_BYTE_NUM_MAX 32 19 #define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1 20 #elif defined(BL616) || defined(BL628) 21 #define SPI_FIFO_BYTE_NUM_MAX 32 22 #define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1 23 #elif defined(BL702L) 24 #define SPI_FIFO_BYTE_NUM_MAX 16 25 #define SPI_FIFO_WIDTH_VARIABLE_SUPPORT 1 26 #else 27 #error "unknown device" 28 #endif 29 30 /** @defgroup SPI_ROLE spi role definition 31 * @{ 32 */ 33 #define SPI_ROLE_MASTER 0 34 #define SPI_ROLE_SLAVE 1 35 /** 36 * @} 37 */ 38 39 /** @defgroup SPI_MODE spi mode definition 40 * @{ 41 */ 42 #define SPI_MODE0 0 /* CPOL=0 CHPHA=0 */ 43 #define SPI_MODE1 1 /* CPOL=0 CHPHA=1 */ 44 #define SPI_MODE2 2 /* CPOL=1 CHPHA=0 */ 45 #define SPI_MODE3 3 /* CPOL=1 CHPHA=1 */ 46 /** 47 * @} 48 */ 49 50 /** @defgroup SPI_DATA_WIDTH spi data width definition 51 * @{ 52 */ 53 #define SPI_DATA_WIDTH_8BIT 1 54 #define SPI_DATA_WIDTH_16BIT 2 55 #define SPI_DATA_WIDTH_24BIT 3 56 #define SPI_DATA_WIDTH_32BIT 4 57 /** 58 * @} 59 */ 60 61 /** @defgroup SPI_BIT_ORDER spi bit order definition 62 * @{ 63 */ 64 #define SPI_BIT_LSB 1 65 #define SPI_BIT_MSB 0 66 /** 67 * @} 68 */ 69 70 /** @defgroup SPI_BYTE_ORDER spi byte order definition 71 * @{ 72 */ 73 #define SPI_BYTE_LSB 0 74 #if !defined(BL602) && !defined(BL702) 75 #define SPI_BYTE_MSB 1 76 #endif 77 /** 78 * @} 79 */ 80 81 /** @defgroup SPI_INTSTS spi interrupt status definition 82 * @{ 83 */ 84 #define SPI_INTSTS_TC (1 << 0) 85 #define SPI_INTSTS_TX_FIFO (1 << 1) 86 #define SPI_INTSTS_RX_FIFO (1 << 2) 87 #define SPI_INTSTS_SLAVE_TIMEOUT (1 << 3) 88 #define SPI_INTSTS_SLAVE_TX_UNDERRUN (1 << 4) 89 #define SPI_INTSTS_FIFO_ERR (1 << 5) 90 /** 91 * @} 92 */ 93 94 /** @defgroup SPI_INTCLR spi interrupt clear definition 95 * @{ 96 */ 97 #define SPI_INTCLR_TC (1 << 16) 98 #define SPI_INTCLR_SLAVE_TIMEOUT (1 << 19) 99 #define SPI_INTCLR_SLAVE_TX_UNDERRUN (1 << 20) 100 /** 101 * @} 102 */ 103 104 /** @defgroup SPI_CMD spi feature control cmd definition 105 * @{ 106 */ 107 #define SPI_CMD_SET_DATA_WIDTH (0x01) 108 #define SPI_CMD_GET_DATA_WIDTH (0x02) 109 #define SPI_CMD_CLEAR_TX_FIFO (0x03) 110 #define SPI_CMD_CLEAR_RX_FIFO (0x04) 111 #define SPI_CMD_SET_CS_INTERVAL (0x05) 112 #define SPI_CMD_RX_IGNORE (0x06) 113 #define SPI_CMD_SET_MODE (0x07) 114 #define SPI_CMD_GET_MODE (0x08) 115 #define SPI_CMD_SET_FREQ (0x09) 116 #define SPI_CMD_GET_FREQ (0x0A) 117 #define SPI_CMD_SET_BIT_ORDER (0x0B) 118 #define SPI_CMD_GET_BIT_ORDER (0x0C) 119 #define SPI_CMD_SET_BYTE_ORDER (0x0E) 120 #define SPI_CMD_GET_BYTE_ORDER (0x0F) 121 122 /** 123 * @} 124 */ 125 126 /** 127 * @brief SPI configuration structure 128 * 129 * @param freq SPI frequence, should be less than spi_clk/2 130 * @param role SPI role, use @ref SPI_ROLE 131 * @param mode SPI mode, use @ref SPI_MODE 132 * @param data_width SPI data width, use @ref SPI_DATA_WIDTH 133 * @param bit_order SPI bit order, use @ref SPI_BIT_ORDER 134 * @param byte_order SPI byte order, use @ref SPI_BYTE_ORDER 135 * @param tx_fifo_threshold SPI tx fifo threshold, should be less than 4 136 * @param rx_fifo_threshold SPI rx fifo threshold, should be less than 4 137 */ 138 struct bflb_spi_config_s { 139 uint32_t freq; 140 uint8_t role; 141 uint8_t mode; 142 uint8_t data_width; 143 uint8_t bit_order; 144 uint8_t byte_order; 145 uint8_t tx_fifo_threshold; 146 uint8_t rx_fifo_threshold; 147 }; 148 149 #ifdef __cplusplus 150 extern "C" { 151 #endif 152 153 /** 154 * @brief Initialize spi. 155 * 156 * @param [in] dev device handle 157 * @param [in] config pointer to save spi config 158 */ 159 void bflb_spi_init(struct bflb_device_s *dev, const struct bflb_spi_config_s *config); 160 161 /** 162 * @brief Deinitialize spi. 163 * 164 * @param [in] dev device handle 165 */ 166 void bflb_spi_deinit(struct bflb_device_s *dev); 167 168 /** 169 * @brief Enable spi tx dma. 170 * 171 * @param [in] dev device handle 172 * @param [in] enable true means enable, otherwise disable. 173 */ 174 void bflb_spi_link_txdma(struct bflb_device_s *dev, bool enable); 175 176 /** 177 * @brief Enable spi rx dma. 178 * 179 * @param [in] dev device handle 180 * @param [in] enable true means enable, otherwise disable. 181 */ 182 void bflb_spi_link_rxdma(struct bflb_device_s *dev, bool enable); 183 184 /** 185 * @brief Send and receive one data on spi. 186 * 187 * @param [in] dev device handle 188 * @param [in] data data to send 189 * @return receive data 190 */ 191 uint32_t bflb_spi_poll_send(struct bflb_device_s *dev, uint32_t data); 192 193 /** 194 * @brief Send and receive a block of data on spi. 195 * 196 * @param [in] dev device handle 197 * @param [in] txbuffer pointer to send buffer 198 * @param [in] rxbuffer pointer to receive buffer 199 * @param [in] nbytes bytes to send 200 * @return A negated errno value on failure. 201 */ 202 int bflb_spi_poll_exchange(struct bflb_device_s *dev, const void *txbuffer, void *rxbuffer, size_t nbytes); 203 204 /** 205 * @brief Check if spi is busy. 206 * 207 * @param [in] dev device handle 208 * @return true means busy, otherwise not. 209 */ 210 bool bflb_spi_isbusy(struct bflb_device_s *dev); 211 212 /** 213 * @brief Enable or disable spi rx fifo threhold interrupt. 214 * 215 * @param [in] dev device handle 216 * @param [in] mask true means disable, false means enable 217 */ 218 void bflb_spi_txint_mask(struct bflb_device_s *dev, bool mask); 219 220 /** 221 * @brief Enable or disable spi rx fifo threhold interrupt. 222 * 223 * @param [in] dev device handle 224 * @param [in] mask true means disable, false means enable 225 */ 226 void bflb_spi_rxint_mask(struct bflb_device_s *dev, bool mask); 227 228 /** 229 * @brief Enable or disable spi transfer done interrupt. 230 * 231 * @param [in] dev device handle 232 * @param [in] mask true means disable, false means enable 233 */ 234 void bflb_spi_tcint_mask(struct bflb_device_s *dev, bool mask); 235 236 /** 237 * @brief Enable or disable spi error interrupt. 238 * 239 * @param [in] dev device handle 240 * @param [in] mask true means disable, false means enable 241 */ 242 void bflb_spi_errint_mask(struct bflb_device_s *dev, bool mask); 243 244 /** 245 * @brief Get spi interrupt status. 246 * 247 * @param [in] dev device handle 248 * @return interrupt status, use @ref SPI_INTSTS 249 */ 250 uint32_t bflb_spi_get_intstatus(struct bflb_device_s *dev); 251 252 /** 253 * @brief Clear spi interrupt status. 254 * 255 * @param [in] dev device handle 256 * @param [in] int_clear clear value, use @ref SPI_INTCLR 257 */ 258 void bflb_spi_int_clear(struct bflb_device_s *dev, uint32_t int_clear); 259 260 /** 261 * @brief Control spi feature. 262 * 263 * @param [in] dev device handle 264 * @param [in] cmd feature command, use @ref SPI_CMD 265 * @param [in] arg user data 266 * @return A negated errno value on failure. 267 */ 268 int bflb_spi_feature_control(struct bflb_device_s *dev, int cmd, size_t arg); 269 270 #ifdef __cplusplus 271 } 272 #endif 273 274 /** 275 * @} 276 */ 277 278 /** 279 * @} 280 */ 281 282 #endif 283