1 #ifndef _BFLB_UART_H 2 #define _BFLB_UART_H 3 4 #include "bflb_core.h" 5 6 /** @addtogroup LHAL 7 * @{ 8 */ 9 10 /** @addtogroup UART 11 * @{ 12 */ 13 14 /** @defgroup UART_DIRECTION uart direction enable definition 15 * @{ 16 */ 17 #define UART_DIRECTION_TX (1 << 0) 18 #define UART_DIRECTION_RX (1 << 1) 19 #define UART_DIRECTION_TXRX (UART_DIRECTION_TX | UART_DIRECTION_RX) 20 #define UART_DIRECTION_MASK UART_DIRECTION_TXRX 21 /** 22 * @} 23 */ 24 25 /** @defgroup UART_DATABITS uart data bits definition 26 * @{ 27 */ 28 #define UART_DATA_BITS_5 0 29 #define UART_DATA_BITS_6 1 30 #define UART_DATA_BITS_7 2 31 #define UART_DATA_BITS_8 3 32 /** 33 * @} 34 */ 35 36 /** @defgroup UART_STOPBITS uart stop bits definition 37 * @{ 38 */ 39 #define UART_STOP_BITS_0_5 0 40 #define UART_STOP_BITS_1 1 41 #define UART_STOP_BITS_1_5 2 42 #define UART_STOP_BITS_2 3 43 /** 44 * @} 45 */ 46 47 /** @defgroup UART_PARITY uart parity definition 48 * @{ 49 */ 50 #define UART_PARITY_NONE 0 51 #define UART_PARITY_ODD 1 52 #define UART_PARITY_EVEN 2 53 #define UART_PARITY_MARK 3 54 #define UART_PARITY_SPACE 4 55 /** 56 * @} 57 */ 58 59 /** @defgroup UART_BITORDER uart bitorder definition 60 * @{ 61 */ 62 #define UART_LSB_FIRST 0 63 #define UART_MSB_FIRST 1 64 /** 65 * @} 66 */ 67 68 /** @defgroup UART_FLOWCTRL uart flow ctrl definition 69 * @{ 70 */ 71 #define UART_FLOWCTRL_NONE 0 72 #define UART_FLOWCTRL_RTS (1 << 0) 73 #define UART_FLOWCTRL_CTS (1 << 1) 74 #define UART_FLOWCTRL_RTS_CTS (UART_FLOWCTRL_RTS | UART_FLOWCTRL_CTS) 75 /** 76 * @} 77 */ 78 79 /** @defgroup UART_INTSTS uart interrupt status definition 80 * @{ 81 */ 82 #define UART_INTSTS_TX_END (1 << 0) 83 #define UART_INTSTS_RX_END (1 << 1) 84 #define UART_INTSTS_TX_FIFO (1 << 2) 85 #define UART_INTSTS_RX_FIFO (1 << 3) 86 #define UART_INTSTS_RTO (1 << 4) 87 #define UART_INTSTS_PCE (1 << 5) 88 #define UART_INTSTS_TX_FER (1 << 6) 89 #define UART_INTSTS_RX_FER (1 << 7) 90 #if !defined(BL602) 91 #define UART_INTSTS_RX_LSE (1 << 8) 92 #endif 93 #if !defined(BL602) && !defined(BL702) 94 #define UART_INTSTS_RX_BCR (1 << 9) 95 #define UART_INTSTS_RX_ADS (1 << 10) 96 #define UART_INTSTS_RX_AD5 (1 << 11) 97 #endif 98 /** 99 * @} 100 */ 101 102 /** @defgroup UART_INTCLR uart interrupt clear definition 103 * @{ 104 */ 105 #define UART_INTCLR_TX_END (1 << 0) 106 #define UART_INTCLR_RX_END (1 << 1) 107 #define UART_INTCLR_RTO (1 << 4) 108 #define UART_INTCLR_PCE (1 << 5) 109 #if !defined(BL602) 110 #define UART_INTCLR_RX_LSE (1 << 8) 111 #endif 112 #if !defined(BL602) && !defined(BL702) 113 #define UART_INTCLR_RX_BCR (1 << 9) 114 #define UART_INTCLR_RX_ADS (1 << 10) 115 #define UART_INTCLR_RX_AD5 (1 << 11) 116 #endif 117 /** 118 * @} 119 */ 120 121 /** @defgroup UART_CMD uart feature control cmd definition 122 * @{ 123 */ 124 #define UART_CMD_SET_BAUD_RATE (0x01) 125 #define UART_CMD_SET_DATA_BITS (0x02) 126 #define UART_CMD_SET_STOP_BITS (0x03) 127 #define UART_CMD_SET_PARITY_BITS (0x04) 128 #define UART_CMD_CLR_TX_FIFO (0x05) 129 #define UART_CMD_CLR_RX_FIFO (0x06) 130 #define UART_CMD_SET_RTO_VALUE (0x07) 131 #define UART_CMD_SET_RTS_VALUE (0x08) 132 #define UART_CMD_GET_TX_FIFO_CNT (0x09) 133 #define UART_CMD_GET_RX_FIFO_CNT (0x0a) 134 #define UART_CMD_SET_AUTO_BAUD (0x0b) 135 #define UART_CMD_GET_AUTO_BAUD (0x0c) 136 #define UART_CMD_SET_BREAK_VALUE (0x0d) 137 #define UART_CMD_SET_TX_LIN_VALUE (0x0e) 138 #define UART_CMD_SET_RX_LIN_VALUE (0x0f) 139 #define UART_CMD_SET_GLITCH_VALUE (0x10) 140 #define UART_CMD_SET_TX_RS485_EN (0x11) 141 #define UART_CMD_SET_TX_RS485_POLARITY (0x12) 142 #define UART_CMD_SET_ABR_ALLOWABLE_ERROR (0x13) 143 #define UART_CMD_SET_SW_RTS_CONTROL (0x14) 144 #define UART_CMD_IR_CONFIG (0x15) 145 #define UART_CMD_SET_TX_FREERUN (0x16) 146 #define UART_CMD_SET_TX_END_INTERRUPT (0x17) 147 #define UART_CMD_SET_RX_END_INTERRUPT (0x18) 148 #define UART_CMD_SET_TX_TRANSFER_LEN (0x19) 149 #define UART_CMD_SET_RX_TRANSFER_LEN (0x20) 150 #define UART_CMD_SET_TX_EN (0x21) 151 #define UART_CMD_SET_BCR_END_INTERRUPT (0x22) 152 #define UART_CMD_GET_BCR_COUNT (0x23) 153 #define UART_CMD_SET_CTS_EN (0x24) 154 #define UART_CMD_SET_TX_FIFO_THREHOLD (0x25) 155 #define UART_CMD_SET_RX_FIFO_THREHOLD (0x26) 156 157 /** 158 * @} 159 */ 160 161 #define UART_AUTO_BAUD_START 0 162 #define UART_AUTO_BAUD_0X55 1 163 164 struct bflb_uart_ir_config_s { 165 bool tx_en; 166 bool rx_en; 167 bool tx_inverse; 168 bool rx_inverse; 169 uint16_t tx_pluse_start; 170 uint16_t tx_pluse_stop; 171 uint16_t rx_pluse_start; 172 }; 173 174 /** 175 * @brief UART configuration structure 176 * 177 * @param baudrate UART baudrate setting in bps,should be less than uart_clk/2 178 * @param direction UART direction, use @ref UART_DIRECTION 179 * @param data_bits UART data bits, use @ref UART_DATABITS 180 * @param stop_bits UART stop bits, use @ref UART_STOPBITS 181 * @param parity UART parity bit, use @ref UART_PARITY 182 * @param bit_order UART bit first, use @ref UART_BITORDER 183 * @param flow_ctrl UART flow control setting, use @ref UART_FLOWCTRL 184 * @param tx_fifo_threshold UART tx fifo threshold, should be less than 32. 185 * @param rx_fifo_threshold UART rx fifo threshold, should be less than 32. 186 */ 187 struct bflb_uart_config_s { 188 uint32_t baudrate; 189 uint8_t direction; 190 uint8_t data_bits; 191 uint8_t stop_bits; 192 uint8_t parity; 193 uint8_t bit_order; 194 uint8_t flow_ctrl; 195 uint8_t tx_fifo_threshold; 196 uint8_t rx_fifo_threshold; 197 }; 198 199 #ifdef __cplusplus 200 extern "C" { 201 #endif 202 203 /** 204 * @brief Initialize uart. 205 * 206 * @param [in] dev device handle 207 * @param [in] config pointer to save uart config 208 */ 209 void bflb_uart_init(struct bflb_device_s *dev, const struct bflb_uart_config_s *config); 210 211 /** 212 * @brief Deinitialize uart. 213 * 214 * @param [in] dev device handle 215 */ 216 void bflb_uart_deinit(struct bflb_device_s *dev); 217 218 /** 219 * @brief Enable uart. 220 * 221 * @param [in] dev device handle 222 */ 223 void bflb_uart_enable(struct bflb_device_s *dev); 224 225 /** 226 * @brief Disable uart. 227 * 228 * @param [in] dev device handle 229 */ 230 void bflb_uart_disable(struct bflb_device_s *dev); 231 232 /** 233 * @brief Enable uart tx dma. 234 * 235 * @param [in] dev device handle 236 * @param [in] enable true means enable, otherwise disable. 237 */ 238 void bflb_uart_link_txdma(struct bflb_device_s *dev, bool enable); 239 240 /** 241 * @brief Enable uart rx dma. 242 * 243 * @param [in] dev device handle 244 * @param [in] enable true means enable, otherwise disable. 245 */ 246 void bflb_uart_link_rxdma(struct bflb_device_s *dev, bool enable); 247 248 /** 249 * @brief Put one char on uart. 250 * 251 * @param [in] dev device handle 252 * @param [in] ch char 253 * @return A negated errno value on failure. 254 */ 255 int bflb_uart_putchar(struct bflb_device_s *dev, int ch); 256 257 /** 258 * @brief Get char from uart. 259 * 260 * @param [in] dev device handle 261 * @return A negated errno value on failure, otherwise received char. 262 */ 263 int bflb_uart_getchar(struct bflb_device_s *dev); 264 265 /** 266 * @brief Put a block of data on uart.This is a poll api. 267 * 268 * @param [in] dev device handle 269 * @param [in] data pointer to save send data 270 * @param [in] len length to send 271 * @return A negated errno value on failure. 272 */ 273 int bflb_uart_put(struct bflb_device_s *dev, uint8_t *data, uint32_t len); 274 275 /** 276 * @brief Get a block of data from uart. This is a asynchronous api. 277 * 278 * @param [in] dev device handle 279 * @param [in] data pointer to save received data 280 * @param [in] len max length wants to receive 281 * @return actual received length 282 */ 283 int bflb_uart_get(struct bflb_device_s *dev, uint8_t *data, uint32_t len); 284 285 /** 286 * @brief Check if there is free space in tx fifo. 287 * 288 * @param [in] dev device handle 289 * @return Return true if the tranmsit hardware is ready to send another byte 290 */ 291 bool bflb_uart_txready(struct bflb_device_s *dev); 292 293 /** 294 * @brief Check if there is no data in tx fifo. 295 * 296 * @param [in] dev device handle 297 * @return Return true if all characters have been sent 298 */ 299 bool bflb_uart_txempty(struct bflb_device_s *dev); 300 301 /** 302 * @brief Check if there is data in rx fifo. 303 * 304 * @param [in] dev device handle 305 * @return true means yes.Otherwise there is no data in rx fifo 306 */ 307 bool bflb_uart_rxavailable(struct bflb_device_s *dev); 308 309 /** 310 * @brief Enable or disable uart tx fifo threhold interrupt. 311 * 312 * @param [in] dev device handle 313 * @param [in] mask true means disable, false means enable 314 */ 315 void bflb_uart_txint_mask(struct bflb_device_s *dev, bool mask); 316 317 /** 318 * @brief Enable or disable uart rx fifo threhold interrupt. 319 * 320 * @param [in] dev device handle 321 * @param [in] mask true means disable, false means enable 322 */ 323 void bflb_uart_rxint_mask(struct bflb_device_s *dev, bool mask); 324 325 /** 326 * @brief Enable or disable uart error interrupt. 327 * 328 * @param [in] dev device handle 329 * @param [in] mask true means disable, false means enable 330 */ 331 void bflb_uart_errint_mask(struct bflb_device_s *dev, bool mask); 332 333 /** 334 * @brief Get uart interrupt status. 335 * 336 * @param [in] dev device handle 337 * @return interrupt status, use @ref UART_INTSTS 338 */ 339 uint32_t bflb_uart_get_intstatus(struct bflb_device_s *dev); 340 341 /** 342 * @brief Clear uart interrupt status. 343 * 344 * @param [in] dev device handle 345 * @param [in] int_clear clear value, use @ref UART_INTCLR 346 */ 347 void bflb_uart_int_clear(struct bflb_device_s *dev, uint32_t int_clear); 348 349 /** 350 * @brief Control uart feature. 351 * 352 * @param [in] dev device handle 353 * @param [in] cmd feature command, use @ref UART_CMD 354 * @param [in] arg user data 355 * @return A negated errno value on failure. 356 */ 357 int bflb_uart_feature_control(struct bflb_device_s *dev, int cmd, size_t arg); 358 359 #ifdef __cplusplus 360 } 361 #endif 362 363 /** 364 * @} 365 */ 366 367 /** 368 * @} 369 */ 370 371 #endif 372