1 /* 2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /****************************************************************************** 18 * @file pn_name.h 19 * @brief header file for the pin_name 20 * @version V1.0 21 * @date 02. June 2017 22 ******************************************************************************/ 23 #ifndef _PINNAMES_H 24 #define _PINNAMES_H 25 26 #ifdef __cplusplus 27 extern "C" { 28 #endif 29 30 typedef enum 31 { 32 PA0_TXD0_PWM0_XX_SIROUT0 = 0, 33 PA1_RXD0_PWM1_XX_SIRIN0, 34 PA2_CTS0_PWM2_SPI0CLK_XX, 35 PA3_RTS0_PWM3_SPI0TX_XX, 36 PA4_SCL0_PWM4_SPI0RX_XX, 37 PA5_SDA0_PWM5_SPI0CS_XX, 38 PA6_SPI0CLK_PWMTRIG0_SCL0_XX, 39 PA7_SPI0TX_PWMTRIG1_SDA0_XX, 40 PA8_SPI0RX_TRIGFAULT_SCL1_XX, 41 PA9_SPI0CS_PWM0_SDA1_XX, 42 PA10_TXD1_PWM1_XX_SIROUT1, 43 PA11_RXD1_PWM2_XX_SIRIN1, 44 PA12_CTS1_PWM3_SPI1CLK_XX, 45 PA13_RTS1_PWM4_SPI1TX_XX, 46 PA14_SCL1_PWM5_SPI1RX_XX, 47 PA15_SDA1_PWMTRIG0_SPI1CS0_XX, 48 PA16_SPI1CLK_PWMTRIG1_XX_XX, 49 PA17_SPI1TX_PWMFAULT_XX_XX, 50 PA18_SPI1RX_PWM0_XX_XX, 51 PA19_SPI1CS0_PWM1_XX_XX, 52 PA20_SPI1CS1_PWM2_XX_XX, 53 PA21_SPI1CS2_PWM3_XX_XX, 54 PA22_RXD2_PWM4_XX_SIRIN2, 55 PA23_TXD2_PWM5_XX_SIROUT2, 56 PA24_CTS2_PWMTRIG0_SPI1CS1_XX, 57 PA25_XX_PWMTRIG1_SPI1CS2_XX, 58 PA26_TXD3_PWMFAULT_XX_SIROUT3, 59 PA27_RXD3_PWM0_XX_SIRIN3, 60 PA28_I2SMCLK_PWM1_XX_XX, 61 PA29_I2SSCLK_PWM2_XX_XX, 62 PA30_I2SWSCLK_PWM3_XX_XX, 63 PA31_I2SSDA__SCL0_PWM4_XX, 64 PB0_ADC0_SDA0_PWM5_XX, 65 PB1_ADC1_SCL1_USISCLK_XX, 66 PB2_ADC2_SDA1_USISD0_XX, 67 PB3_ADC3_SPI1CLK_USISD1_XX, 68 PB4_ADC4_SPI1TX_USINSS_XX, 69 PB5_ADC5_SPI1RX_USISCLK_XX, 70 PB6_ADC6_SPI1CS0_USISD0_XX, 71 PB7_ADC7_SPI1CS1_USISD1_XX, 72 PB8_PWMTRIG0_SPI1CS2_USINSS_XX, 73 PB9_PWMTRIG1_CTS3_XX_XX, 74 PB10_PWMFAULT_RTS3_XX_XX 75 } 76 pin_name_t; 77 78 typedef enum 79 { 80 PORTA = 0, 81 PORTB = 1 82 } port_name_t; 83 84 #ifdef __cplusplus 85 } 86 #endif 87 88 #endif 89