1 /*
2  * Copyright (c) 2006-2024, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2024/04/05     flyingcys    first version
9  */
10 #ifndef __DRV_SDHCI_H__
11 #define __DRV_SDHCI_H__
12 
13 #include "mmio.h"
14 #include "dw_sdmmc.h"
15 #include "dw_mmc_reg.h"
16 
17 #ifndef BIT
18 #define BIT(nr)      (UINT64_C(1) << (nr))
19 #endif
20 
21 typedef enum {
22     SDIF_CHAIN_DMA_MODE = 0x01U, ///< one descriptor with one buffer,but one descriptor point to another
23     SDIF_DUAL_DMA_MODE  = 0x02U,  ///< dual mode is one descriptor with two buffer
24 } sdhci_dma_mode_e;
25 
26 typedef struct {
27     bool            enable_fix_burst_len;           ///< fix burst len enable/disable flag,When set, the AHB will
28     ///  use only SINGLE, INCR4, INCR8 or INCR16 during start of
29     ///  normal burst transfers. When reset, the AHB will use SINGLE
30     ///  and INCR burst transfer operations
31 
32     sdhci_dma_mode_e mode;                           ///< define the DMA mode */
33 
34 
35     rt_ubase_t      dma_des_buffer_start_addr;     ///< internal DMA descriptor start address
36     uint32_t        dma_des_buffer_len;             ///  internal DMA buffer descriptor buffer len ,user need to pay attention to the
37     ///  dma descriptor buffer length if it is bigger enough for your transfer
38     uint8_t         dma_dws_skip_len;               ///< define the descriptor skip length ,the length between two descriptor
39     ///  this field is special for dual DMA mode
40 } sdhci_dma_config_t;
41 
42 #endif /* __DRV_SDHCI_H__ */
43