1 /*
2  * Copyright (c) 2006-2024, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2023/06/25     flyingcys    first version
9  */
10 #include <rthw.h>
11 #include <rtthread.h>
12 #include <rtdevice.h>
13 
14 #include "board.h"
15 #include "drv_uart.h"
16 #include "drv_pinmux.h"
17 #include "drv_ioremap.h"
18 
19 #define DBG_TAG "DRV.UART"
20 #define DBG_LVL DBG_WARNING
21 #include <rtdbg.h>
22 
23 /*
24  * Divide positive or negative dividend by positive divisor and round
25  * to closest integer. Result is undefined for negative divisors and
26  * for negative dividends if the divisor variable type is unsigned.
27  */
28 #define DIV_ROUND_CLOSEST(x, divisor)(          \
29 {                           \
30     typeof(x) __x = x;              \
31     typeof(divisor) __d = divisor;          \
32     (((typeof(x))-1) > 0 ||             \
33      ((typeof(divisor))-1) > 0 || (__x) > 0) ?  \
34         (((__x) + ((__d) / 2)) / (__d)) :   \
35         (((__x) - ((__d) / 2)) / (__d));    \
36 }                           \
37 )
38 
39 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
40 
41 struct hw_uart_device
42 {
43     rt_ubase_t hw_base;
44     rt_uint32_t irqno;
45 };
46 
47 #define BSP_DEFINE_UART_DEVICE(no)                  \
48 static struct hw_uart_device _uart##no##_device =   \
49 {                                                   \
50     UART##no##_BASE,                           \
51     UART##no##_IRQ                                  \
52 };                                                  \
53 static struct rt_serial_device _serial##no;
54 
55 #ifdef BSP_USING_UART0
56 BSP_DEFINE_UART_DEVICE(0);
57 #endif
58 
59 #ifdef BSP_USING_UART1
60 BSP_DEFINE_UART_DEVICE(1);
61 #endif
62 
63 #ifdef BSP_USING_UART2
64 BSP_DEFINE_UART_DEVICE(2);
65 #endif
66 
67 #ifdef BSP_USING_UART3
68 BSP_DEFINE_UART_DEVICE(3);
69 #endif
70 
dw8250_read32(rt_ubase_t addr,rt_ubase_t offset)71 rt_inline rt_uint32_t dw8250_read32(rt_ubase_t addr, rt_ubase_t offset)
72 {
73     return *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT)));
74 }
75 
dw8250_write32(rt_ubase_t addr,rt_ubase_t offset,rt_uint32_t value)76 rt_inline void dw8250_write32(rt_ubase_t addr, rt_ubase_t offset, rt_uint32_t value)
77 {
78     *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
79 
80     if (offset == UART_LCR)
81     {
82         int tries = 1000;
83 
84         /* Make sure LCR write wasn't ignored */
85         while (tries--)
86         {
87             unsigned int lcr = dw8250_read32(addr, UART_LCR);
88 
89             if ((value & ~UART_LCR_STKP) == (lcr & ~UART_LCR_STKP))
90             {
91                 return;
92             }
93 
94             dw8250_write32(addr, UART_FCR, UART_FCR_DEFVAL);
95             dw8250_read32(addr, UART_RX);
96 
97             *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
98         }
99     }
100 }
101 
dw8250_uart_setbrg(rt_ubase_t addr,int baud_divisor)102 static void dw8250_uart_setbrg(rt_ubase_t addr, int baud_divisor)
103 {
104     /* to keep serial format, read lcr before writing BKSE */
105     int lcr_val = dw8250_read32(addr, UART_LCR) & ~UART_LCR_BKSE;
106 
107     dw8250_write32(addr, UART_LCR, UART_LCR_BKSE | lcr_val);
108     dw8250_write32(addr, UART_DLL, baud_divisor & 0xff);
109 
110     dw8250_write32(addr, UART_DLM, (baud_divisor >> 8) & 0xff);
111     dw8250_write32(addr, UART_LCR, lcr_val);
112 }
113 
dw8250_uart_configure(struct rt_serial_device * serial,struct serial_configure * cfg)114 static rt_err_t dw8250_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
115 {
116     rt_base_t base;
117     struct hw_uart_device *uart;
118     int clock_divisor;
119     int last_ier_state;
120 
121     RT_ASSERT(serial != RT_NULL);
122     uart = (struct hw_uart_device *)serial->parent.user_data;
123     base = uart->hw_base;
124 
125     while (!(dw8250_read32(base, UART_LSR) & UART_LSR_TEMT));
126 
127     last_ier_state = dw8250_read32(base, UART_IER);
128     dw8250_write32(base, UART_IER, 0);
129     dw8250_write32(base, UART_MCR, UART_MCRVAL);
130     dw8250_write32(base, UART_FCR, UART_FCR_DEFVAL);
131 
132     /* initialize serial config to 8N1 before writing baudrate */
133     dw8250_write32(base, UART_LCR, UART_LCR_8N1);
134 
135     clock_divisor = DIV_ROUND_CLOSEST(UART_INPUT_CLK, 16 * serial->config.baud_rate);
136     dw8250_uart_setbrg(base, clock_divisor);
137 
138     dw8250_write32(base, UART_IER, last_ier_state);
139 
140     return RT_EOK;
141 }
142 
dw8250_uart_control(struct rt_serial_device * serial,int cmd,void * arg)143 static rt_err_t dw8250_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
144 {
145     struct hw_uart_device *uart;
146 
147     RT_ASSERT(serial != RT_NULL);
148     uart = (struct hw_uart_device *)serial->parent.user_data;
149 
150     switch (cmd)
151     {
152         case RT_DEVICE_CTRL_CLR_INT:
153             /* Disable rx irq */
154             dw8250_write32(uart->hw_base, UART_IER, !UART_IER_RDI);
155             rt_hw_interrupt_mask(uart->irqno);
156             break;
157 
158         case RT_DEVICE_CTRL_SET_INT:
159             /* Enable rx irq */
160             dw8250_write32(uart->hw_base, UART_IER, UART_IER_RDI);
161             rt_hw_interrupt_umask(uart->irqno);
162             break;
163     }
164 
165     return RT_EOK;
166 }
167 
dw8250_uart_putc(struct rt_serial_device * serial,char c)168 static int dw8250_uart_putc(struct rt_serial_device *serial, char c)
169 {
170     rt_base_t base;
171     struct hw_uart_device *uart;
172 
173     RT_ASSERT(serial != RT_NULL);
174     uart = (struct hw_uart_device *)serial->parent.user_data;
175     base = uart->hw_base;
176 
177     while ((dw8250_read32(base, UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY);
178 
179     dw8250_write32(base, UART_TX, c);
180 
181     return 1;
182 }
183 
dw8250_uart_getc(struct rt_serial_device * serial)184 static int dw8250_uart_getc(struct rt_serial_device *serial)
185 {
186     int ch = -1;
187     rt_base_t base;
188     struct hw_uart_device *uart;
189 
190     RT_ASSERT(serial != RT_NULL);
191     uart = (struct hw_uart_device *)serial->parent.user_data;
192     base = uart->hw_base;
193 
194     if (dw8250_read32(base, UART_LSR) & UART_LSR_DR)
195     {
196         ch = dw8250_read32(base, UART_RX) & 0xff;
197     }
198 
199     return ch;
200 }
201 
202 static const struct rt_uart_ops _uart_ops =
203 {
204     dw8250_uart_configure,
205     dw8250_uart_control,
206     dw8250_uart_putc,
207     dw8250_uart_getc,
208 };
209 
rt_hw_uart_isr(int irqno,void * param)210 static void rt_hw_uart_isr(int irqno, void *param)
211 {
212     unsigned int iir, status;
213     struct rt_serial_device *serial = (struct rt_serial_device *)param;
214     struct hw_uart_device *uart = (struct hw_uart_device *)serial->parent.user_data;
215 
216     iir = dw8250_read32(uart->hw_base, UART_IIR);
217 
218     /* If don't do this in non-DMA mode then the "RX TIMEOUT" interrupt will fire forever. */
219     if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)
220     {
221         status = dw8250_read32(uart->hw_base, UART_LSR);
222 
223         if (!(status & (UART_LSR_DR | UART_LSR_BI)))
224         {
225             dw8250_read32(uart->hw_base, UART_RX);
226         }
227     }
228 
229     if (!(iir & UART_IIR_NO_INT))
230     {
231         rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
232     }
233 
234     if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY)
235     {
236         /* Clear the USR */
237         dw8250_read32(uart->hw_base, UART_USR);
238 
239         return;
240     }
241 }
242 
243 #if defined(BOARD_TYPE_MILKV_DUO)
244 
245 #ifdef BSP_USING_UART0
246 static const char *pinname_whitelist_uart0_rx[] = {
247     "UART0_RX",
248     NULL,
249 };
250 static const char *pinname_whitelist_uart0_tx[] = {
251     "UART0_TX",
252     NULL,
253 };
254 #endif
255 
256 #ifdef BSP_USING_UART1
257 static const char *pinname_whitelist_uart1_rx[] = {
258     "IIC0_SDA",
259     "UART0_RX",
260     NULL,
261 };
262 static const char *pinname_whitelist_uart1_tx[] = {
263     "IIC0_SCL",
264     "UART0_TX",
265     NULL,
266 };
267 #endif
268 
269 #ifdef BSP_USING_UART2
270 static const char *pinname_whitelist_uart2_rx[] = {
271     "IIC0_SDA",
272     "SD1_D1",
273     NULL,
274 };
275 static const char *pinname_whitelist_uart2_tx[] = {
276     "IIC0_SCL",
277     "SD1_D2",
278     NULL,
279 };
280 #endif
281 
282 #ifdef BSP_USING_UART3
283 static const char *pinname_whitelist_uart3_rx[] = {
284     "SD1_D1",
285     NULL,
286 };
287 static const char *pinname_whitelist_uart3_tx[] = {
288     "SD1_D2",
289     NULL,
290 };
291 #endif
292 
293 #ifdef BSP_USING_UART4
294 static const char *pinname_whitelist_uart4_rx[] = {
295     "SD1_GPIO0",
296     NULL,
297 };
298 static const char *pinname_whitelist_uart4_tx[] = {
299     "SD1_GPIO1",
300     NULL,
301 };
302 #endif
303 
304 #elif defined(BOARD_TYPE_MILKV_DUO256M)
305 
306 #ifdef BSP_USING_UART0
307 static const char *pinname_whitelist_uart0_rx[] = {
308     "UART0_RX",
309     NULL,
310 };
311 static const char *pinname_whitelist_uart0_tx[] = {
312     "UART0_TX",
313     NULL,
314 };
315 #endif
316 
317 #ifdef BSP_USING_UART1
318 static const char *pinname_whitelist_uart1_rx[] = {
319     "IIC0_SDA",
320     "JTAG_CPU_TCK",
321     "UART0_RX",
322     NULL,
323 };
324 static const char *pinname_whitelist_uart1_tx[] = {
325     "IIC0_SCL",
326     "JTAG_CPU_TMS",
327     "UART0_TX",
328     NULL,
329 };
330 #endif
331 
332 #ifdef BSP_USING_UART2
333 static const char *pinname_whitelist_uart2_rx[] = {
334     "IIC0_SDA",
335     "SD1_D1",
336     NULL,
337 };
338 static const char *pinname_whitelist_uart2_tx[] = {
339     "IIC0_SCL",
340     "SD1_D2",
341     NULL,
342 };
343 #endif
344 
345 #ifdef BSP_USING_UART3
346 static const char *pinname_whitelist_uart3_rx[] = {
347     "SD1_D1",
348     NULL,
349 };
350 static const char *pinname_whitelist_uart3_tx[] = {
351     "SD1_D2",
352     NULL,
353 };
354 #endif
355 
356 #ifdef BSP_USING_UART4
357 static const char *pinname_whitelist_uart4_rx[] = {
358     NULL,
359 };
360 static const char *pinname_whitelist_uart4_tx[] = {
361     NULL,
362 };
363 #endif
364 
365 #elif defined(BOARD_TYPE_MILKV_DUOS)
366 
367 #ifdef BSP_USING_UART0
368 static const char *pinname_whitelist_uart0_rx[] = {
369     "UART0_RX",
370     NULL,
371 };
372 static const char *pinname_whitelist_uart0_tx[] = {
373     "UART0_TX",
374     NULL,
375 };
376 #endif
377 
378 #ifdef BSP_USING_UART1
379 static const char *pinname_whitelist_uart1_rx[] = {
380     "JTAG_CPU_TCK",
381     "UART0_RX",
382     NULL,
383 };
384 static const char *pinname_whitelist_uart1_tx[] = {
385     "JTAG_CPU_TMS",
386     "UART0_TX",
387     "IIC0_SCL",
388     NULL,
389 };
390 #endif
391 
392 #ifdef BSP_USING_UART2
393 static const char *pinname_whitelist_uart2_rx[] = {
394     "VIVO_D9",
395     "VIVO_D5",
396     "VIVO_CLK",
397     "PWR_GPIO1",
398     NULL,
399 };
400 static const char *pinname_whitelist_uart2_tx[] = {
401     "VIVO_D10",
402     "VIVO_D6",
403     "VIVO_D2",
404     "IIC0_SCL",
405     "PWR_GPIO0",
406     NULL,
407 };
408 #endif
409 
410 #ifdef BSP_USING_UART3
411 static const char *pinname_whitelist_uart3_rx[] = {
412     "ADC2",
413     NULL,
414 };
415 static const char *pinname_whitelist_uart3_tx[] = {
416     "ADC3",
417     NULL,
418 };
419 #endif
420 
421 #ifdef BSP_USING_UART4
422 static const char *pinname_whitelist_uart4_rx[] = {
423     NULL,
424 };
425 static const char *pinname_whitelist_uart4_tx[] = {
426     NULL,
427 };
428 #endif
429 
430 #else
431     #error "Unsupported board type!"
432 #endif
433 
rt_hw_uart_init(void)434 int rt_hw_uart_init(void)
435 {
436     struct hw_uart_device* uart;
437     struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
438 
439     config.baud_rate = 115200;
440 
441 #define BSP_INSTALL_UART_DEVICE(no)     \
442     uart = &_uart##no##_device;         \
443     _serial##no.ops    = &_uart_ops;    \
444     _serial##no.config = config;        \
445     rt_hw_serial_register(&_serial##no, "uart" #no, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); \
446     rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial##no, "uart" #no);
447 
448 #ifdef BSP_USING_UART0
449     pinmux_config(BSP_UART0_RX_PINNAME, UART0_RX, pinname_whitelist_uart0_rx);
450     pinmux_config(BSP_UART0_TX_PINNAME, UART0_TX, pinname_whitelist_uart0_tx);
451     BSP_INSTALL_UART_DEVICE(0);
452 
453     uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
454 #endif
455 
456 #ifdef BSP_USING_UART1
457     pinmux_config(BSP_UART1_RX_PINNAME, UART1_RX, pinname_whitelist_uart1_rx);
458     pinmux_config(BSP_UART1_TX_PINNAME, UART1_TX, pinname_whitelist_uart1_tx);
459     BSP_INSTALL_UART_DEVICE(1);
460 
461     uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
462 #endif
463 
464 #ifdef BSP_USING_UART2
465     pinmux_config(BSP_UART2_RX_PINNAME, UART2_RX, pinname_whitelist_uart2_rx);
466     pinmux_config(BSP_UART2_TX_PINNAME, UART2_TX, pinname_whitelist_uart2_tx);
467     BSP_INSTALL_UART_DEVICE(2);
468 
469     uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
470 #endif
471 
472 #ifdef BSP_USING_UART3
473     pinmux_config(BSP_UART3_RX_PINNAME, UART3_RX, pinname_whitelist_uart3_rx);
474     pinmux_config(BSP_UART3_TX_PINNAME, UART3_TX, pinname_whitelist_uart3_tx);
475     BSP_INSTALL_UART_DEVICE(3);
476 
477     uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
478 #endif
479 
480 #ifdef BSP_USING_UART4
481     pinmux_config(BSP_UART4_RX_PINNAME, UART4_RX, pinname_whitelist_uart4_rx);
482     pinmux_config(BSP_UART4_TX_PINNAME, UART4_TX, pinname_whitelist_uart4_tx);
483     BSP_INSTALL_UART_DEVICE(4);
484 
485     uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
486 #endif
487 
488     return 0;
489 }
490