1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author        Notes
8  * 2011-01-13     weety     first version
9  */
10 
11 #ifndef __DAVINCI_SPI_H
12 #define __DAVINCI_SPI_H
13 
14 typedef unsigned long  u32;
15 typedef unsigned short u16;
16 typedef unsigned char  u8;
17 typedef unsigned int   bool;
18 
19 #define SPI_INTERN_CS   0xFF
20 
21 enum {
22     SPI_VERSION_1, /* For DM355/DM365/DM6467 */
23     SPI_VERSION_2, /* For DA8xx */
24 };
25 
26 /**
27  * davinci_spi_config - Per-chip-select configuration for SPI slave devices
28  *
29  * @wdelay: amount of delay between transmissions. Measured in number of
30  *      SPI module clocks.
31  * @odd_parity: polarity of parity flag at the end of transmit data stream.
32  *      0 - odd parity, 1 - even parity.
33  * @parity_enable: enable transmission of parity at end of each transmit
34  *      data stream.
35  * @io_type:    type of IO transfer. Choose between polled, interrupt and DMA.
36  * @timer_disable: disable chip-select timers (setup and hold)
37  * @c2tdelay:   chip-select setup time. Measured in number of SPI module clocks.
38  * @t2cdelay:   chip-select hold time. Measured in number of SPI module clocks.
39  * @t2edelay:   transmit data finished to SPI ENAn pin inactive time. Measured
40  *      in number of SPI clocks.
41  * @c2edelay:   chip-select active to SPI ENAn signal active time. Measured in
42  *      number of SPI clocks.
43  */
44 struct davinci_spi_config {
45     u8  wdelay;
46     u8  odd_parity;
47     u8  parity_enable;
48 #define SPI_IO_TYPE_INTR    0
49 #define SPI_IO_TYPE_POLL    1
50 #define SPI_IO_TYPE_DMA     2
51     u8  io_type;
52     u8  timer_disable;
53     u8  c2tdelay;
54     u8  t2cdelay;
55     u8  t2edelay;
56     u8  c2edelay;
57 };
58 
59 extern int rt_hw_spi_init(void);
60 
61 #endif  /* __DAVINCI_SPI_H */
62