1 /**************************************************************************//** 2 * @file 3 * @brief efm32g_pcnt Register and Bit Field definitions 4 * @author Energy Micro AS 5 * @version 3.0.0 6 ****************************************************************************** 7 * @section License 8 * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b> 9 ****************************************************************************** 10 * 11 * Permission is granted to anyone to use this software for any purpose, 12 * including commercial applications, and to alter it and redistribute it 13 * freely, subject to the following restrictions: 14 * 15 * 1. The origin of this software must not be misrepresented; you must not 16 * claim that you wrote the original software. 17 * 2. Altered source versions must be plainly marked as such, and must not be 18 * misrepresented as being the original software. 19 * 3. This notice may not be removed or altered from any source distribution. 20 * 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no 22 * obligation to support this Software. Energy Micro AS is providing the 23 * Software "AS IS", with no express or implied warranties of any kind, 24 * including, but not limited to, any implied warranties of merchantability 25 * or fitness for any particular purpose or warranties against infringement 26 * of any proprietary rights of a third party. 27 * 28 * Energy Micro AS will not be liable for any consequential, incidental, or 29 * special damages, or any other relief, or for any claim by any third party, 30 * arising from your use of this Software. 31 * 32 *****************************************************************************/ 33 /**************************************************************************//** 34 * @defgroup EFM32G_PCNT 35 * @{ 36 * @brief EFM32G_PCNT Register Declaration 37 *****************************************************************************/ 38 typedef struct 39 { 40 __IO uint32_t CTRL; /**< Control Register */ 41 __IO uint32_t CMD; /**< Command Register */ 42 __I uint32_t STATUS; /**< Status Register */ 43 __I uint32_t CNT; /**< Counter Value Register */ 44 __I uint32_t TOP; /**< Top Value Register */ 45 __IO uint32_t TOPB; /**< Top Value Buffer Register */ 46 __I uint32_t IF; /**< Interrupt Flag Register */ 47 __IO uint32_t IFS; /**< Interrupt Flag Set Register */ 48 __IO uint32_t IFC; /**< Interrupt Flag Clear Register */ 49 __IO uint32_t IEN; /**< Interrupt Enable Register */ 50 __IO uint32_t ROUTE; /**< I/O Routing Register */ 51 52 __IO uint32_t FREEZE; /**< Freeze Register */ 53 __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */ 54 } PCNT_TypeDef; /** @} */ 55 56 /**************************************************************************//** 57 * @defgroup EFM32G_PCNT_BitFields 58 * @{ 59 *****************************************************************************/ 60 61 /* Bit fields for PCNT CTRL */ 62 #define _PCNT_CTRL_RESETVALUE 0x00000000UL /**< Default value for PCNT_CTRL */ 63 #define _PCNT_CTRL_MASK 0x0000003FUL /**< Mask for PCNT_CTRL */ 64 #define _PCNT_CTRL_MODE_SHIFT 0 /**< Shift value for PCNT_MODE */ 65 #define _PCNT_CTRL_MODE_MASK 0x3UL /**< Bit mask for PCNT_MODE */ 66 #define _PCNT_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ 67 #define _PCNT_CTRL_MODE_DISABLE 0x00000000UL /**< Mode DISABLE for PCNT_CTRL */ 68 #define _PCNT_CTRL_MODE_OVSSINGLE 0x00000001UL /**< Mode OVSSINGLE for PCNT_CTRL */ 69 #define _PCNT_CTRL_MODE_EXTCLKSINGLE 0x00000002UL /**< Mode EXTCLKSINGLE for PCNT_CTRL */ 70 #define _PCNT_CTRL_MODE_EXTCLKQUAD 0x00000003UL /**< Mode EXTCLKQUAD for PCNT_CTRL */ 71 #define PCNT_CTRL_MODE_DEFAULT (_PCNT_CTRL_MODE_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CTRL */ 72 #define PCNT_CTRL_MODE_DISABLE (_PCNT_CTRL_MODE_DISABLE << 0) /**< Shifted mode DISABLE for PCNT_CTRL */ 73 #define PCNT_CTRL_MODE_OVSSINGLE (_PCNT_CTRL_MODE_OVSSINGLE << 0) /**< Shifted mode OVSSINGLE for PCNT_CTRL */ 74 #define PCNT_CTRL_MODE_EXTCLKSINGLE (_PCNT_CTRL_MODE_EXTCLKSINGLE << 0) /**< Shifted mode EXTCLKSINGLE for PCNT_CTRL */ 75 #define PCNT_CTRL_MODE_EXTCLKQUAD (_PCNT_CTRL_MODE_EXTCLKQUAD << 0) /**< Shifted mode EXTCLKQUAD for PCNT_CTRL */ 76 #define PCNT_CTRL_CNTDIR (0x1UL << 2) /**< Non-Quadrature Mode Counter Direction Control */ 77 #define _PCNT_CTRL_CNTDIR_SHIFT 2 /**< Shift value for PCNT_CNTDIR */ 78 #define _PCNT_CTRL_CNTDIR_MASK 0x4UL /**< Bit mask for PCNT_CNTDIR */ 79 #define _PCNT_CTRL_CNTDIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ 80 #define _PCNT_CTRL_CNTDIR_UP 0x00000000UL /**< Mode UP for PCNT_CTRL */ 81 #define _PCNT_CTRL_CNTDIR_DOWN 0x00000001UL /**< Mode DOWN for PCNT_CTRL */ 82 #define PCNT_CTRL_CNTDIR_DEFAULT (_PCNT_CTRL_CNTDIR_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_CTRL */ 83 #define PCNT_CTRL_CNTDIR_UP (_PCNT_CTRL_CNTDIR_UP << 2) /**< Shifted mode UP for PCNT_CTRL */ 84 #define PCNT_CTRL_CNTDIR_DOWN (_PCNT_CTRL_CNTDIR_DOWN << 2) /**< Shifted mode DOWN for PCNT_CTRL */ 85 #define PCNT_CTRL_EDGE (0x1UL << 3) /**< Edge Select */ 86 #define _PCNT_CTRL_EDGE_SHIFT 3 /**< Shift value for PCNT_EDGE */ 87 #define _PCNT_CTRL_EDGE_MASK 0x8UL /**< Bit mask for PCNT_EDGE */ 88 #define _PCNT_CTRL_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ 89 #define _PCNT_CTRL_EDGE_POS 0x00000000UL /**< Mode POS for PCNT_CTRL */ 90 #define _PCNT_CTRL_EDGE_NEG 0x00000001UL /**< Mode NEG for PCNT_CTRL */ 91 #define PCNT_CTRL_EDGE_DEFAULT (_PCNT_CTRL_EDGE_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_CTRL */ 92 #define PCNT_CTRL_EDGE_POS (_PCNT_CTRL_EDGE_POS << 3) /**< Shifted mode POS for PCNT_CTRL */ 93 #define PCNT_CTRL_EDGE_NEG (_PCNT_CTRL_EDGE_NEG << 3) /**< Shifted mode NEG for PCNT_CTRL */ 94 #define PCNT_CTRL_FILT (0x1UL << 4) /**< Enable Digital Pulse Width Filter */ 95 #define _PCNT_CTRL_FILT_SHIFT 4 /**< Shift value for PCNT_FILT */ 96 #define _PCNT_CTRL_FILT_MASK 0x10UL /**< Bit mask for PCNT_FILT */ 97 #define _PCNT_CTRL_FILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ 98 #define PCNT_CTRL_FILT_DEFAULT (_PCNT_CTRL_FILT_DEFAULT << 4) /**< Shifted mode DEFAULT for PCNT_CTRL */ 99 #define PCNT_CTRL_RSTEN (0x1UL << 5) /**< Enable PCNT Clock Domain Reset */ 100 #define _PCNT_CTRL_RSTEN_SHIFT 5 /**< Shift value for PCNT_RSTEN */ 101 #define _PCNT_CTRL_RSTEN_MASK 0x20UL /**< Bit mask for PCNT_RSTEN */ 102 #define _PCNT_CTRL_RSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ 103 #define PCNT_CTRL_RSTEN_DEFAULT (_PCNT_CTRL_RSTEN_DEFAULT << 5) /**< Shifted mode DEFAULT for PCNT_CTRL */ 104 105 /* Bit fields for PCNT CMD */ 106 #define _PCNT_CMD_RESETVALUE 0x00000000UL /**< Default value for PCNT_CMD */ 107 #define _PCNT_CMD_MASK 0x00000003UL /**< Mask for PCNT_CMD */ 108 #define PCNT_CMD_LCNTIM (0x1UL << 0) /**< Load CNT Immediately */ 109 #define _PCNT_CMD_LCNTIM_SHIFT 0 /**< Shift value for PCNT_LCNTIM */ 110 #define _PCNT_CMD_LCNTIM_MASK 0x1UL /**< Bit mask for PCNT_LCNTIM */ 111 #define _PCNT_CMD_LCNTIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CMD */ 112 #define PCNT_CMD_LCNTIM_DEFAULT (_PCNT_CMD_LCNTIM_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CMD */ 113 #define PCNT_CMD_LTOPBIM (0x1UL << 1) /**< Load TOPB Immediately */ 114 #define _PCNT_CMD_LTOPBIM_SHIFT 1 /**< Shift value for PCNT_LTOPBIM */ 115 #define _PCNT_CMD_LTOPBIM_MASK 0x2UL /**< Bit mask for PCNT_LTOPBIM */ 116 #define _PCNT_CMD_LTOPBIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CMD */ 117 #define PCNT_CMD_LTOPBIM_DEFAULT (_PCNT_CMD_LTOPBIM_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_CMD */ 118 119 /* Bit fields for PCNT STATUS */ 120 #define _PCNT_STATUS_RESETVALUE 0x00000000UL /**< Default value for PCNT_STATUS */ 121 #define _PCNT_STATUS_MASK 0x00000001UL /**< Mask for PCNT_STATUS */ 122 #define PCNT_STATUS_DIR (0x1UL << 0) /**< Current Counter Direction */ 123 #define _PCNT_STATUS_DIR_SHIFT 0 /**< Shift value for PCNT_DIR */ 124 #define _PCNT_STATUS_DIR_MASK 0x1UL /**< Bit mask for PCNT_DIR */ 125 #define _PCNT_STATUS_DIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_STATUS */ 126 #define _PCNT_STATUS_DIR_UP 0x00000000UL /**< Mode UP for PCNT_STATUS */ 127 #define _PCNT_STATUS_DIR_DOWN 0x00000001UL /**< Mode DOWN for PCNT_STATUS */ 128 #define PCNT_STATUS_DIR_DEFAULT (_PCNT_STATUS_DIR_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_STATUS */ 129 #define PCNT_STATUS_DIR_UP (_PCNT_STATUS_DIR_UP << 0) /**< Shifted mode UP for PCNT_STATUS */ 130 #define PCNT_STATUS_DIR_DOWN (_PCNT_STATUS_DIR_DOWN << 0) /**< Shifted mode DOWN for PCNT_STATUS */ 131 132 /* Bit fields for PCNT CNT */ 133 #define _PCNT_CNT_RESETVALUE 0x00000000UL /**< Default value for PCNT_CNT */ 134 #define _PCNT_CNT_MASK 0x000000FFUL /**< Mask for PCNT_CNT */ 135 #define _PCNT_CNT_CNT_SHIFT 0 /**< Shift value for PCNT_CNT */ 136 #define _PCNT_CNT_CNT_MASK 0xFFUL /**< Bit mask for PCNT_CNT */ 137 #define _PCNT_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CNT */ 138 #define PCNT_CNT_CNT_DEFAULT (_PCNT_CNT_CNT_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CNT */ 139 140 /* Bit fields for PCNT TOP */ 141 #define _PCNT_TOP_RESETVALUE 0x000000FFUL /**< Default value for PCNT_TOP */ 142 #define _PCNT_TOP_MASK 0x000000FFUL /**< Mask for PCNT_TOP */ 143 #define _PCNT_TOP_TOP_SHIFT 0 /**< Shift value for PCNT_TOP */ 144 #define _PCNT_TOP_TOP_MASK 0xFFUL /**< Bit mask for PCNT_TOP */ 145 #define _PCNT_TOP_TOP_DEFAULT 0x000000FFUL /**< Mode DEFAULT for PCNT_TOP */ 146 #define PCNT_TOP_TOP_DEFAULT (_PCNT_TOP_TOP_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_TOP */ 147 148 /* Bit fields for PCNT TOPB */ 149 #define _PCNT_TOPB_RESETVALUE 0x000000FFUL /**< Default value for PCNT_TOPB */ 150 #define _PCNT_TOPB_MASK 0x000000FFUL /**< Mask for PCNT_TOPB */ 151 #define _PCNT_TOPB_TOPB_SHIFT 0 /**< Shift value for PCNT_TOPB */ 152 #define _PCNT_TOPB_TOPB_MASK 0xFFUL /**< Bit mask for PCNT_TOPB */ 153 #define _PCNT_TOPB_TOPB_DEFAULT 0x000000FFUL /**< Mode DEFAULT for PCNT_TOPB */ 154 #define PCNT_TOPB_TOPB_DEFAULT (_PCNT_TOPB_TOPB_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_TOPB */ 155 156 /* Bit fields for PCNT IF */ 157 #define _PCNT_IF_RESETVALUE 0x00000000UL /**< Default value for PCNT_IF */ 158 #define _PCNT_IF_MASK 0x00000007UL /**< Mask for PCNT_IF */ 159 #define PCNT_IF_UF (0x1UL << 0) /**< Underflow Interrupt Read Flag */ 160 #define _PCNT_IF_UF_SHIFT 0 /**< Shift value for PCNT_UF */ 161 #define _PCNT_IF_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */ 162 #define _PCNT_IF_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ 163 #define PCNT_IF_UF_DEFAULT (_PCNT_IF_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IF */ 164 #define PCNT_IF_OF (0x1UL << 1) /**< Overflow Interrupt Read Flag */ 165 #define _PCNT_IF_OF_SHIFT 1 /**< Shift value for PCNT_OF */ 166 #define _PCNT_IF_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */ 167 #define _PCNT_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ 168 #define PCNT_IF_OF_DEFAULT (_PCNT_IF_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IF */ 169 #define PCNT_IF_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Flag */ 170 #define _PCNT_IF_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */ 171 #define _PCNT_IF_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */ 172 #define _PCNT_IF_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ 173 #define PCNT_IF_DIRCNG_DEFAULT (_PCNT_IF_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IF */ 174 175 /* Bit fields for PCNT IFS */ 176 #define _PCNT_IFS_RESETVALUE 0x00000000UL /**< Default value for PCNT_IFS */ 177 #define _PCNT_IFS_MASK 0x00000007UL /**< Mask for PCNT_IFS */ 178 #define PCNT_IFS_UF (0x1UL << 0) /**< Underflow interrupt set */ 179 #define _PCNT_IFS_UF_SHIFT 0 /**< Shift value for PCNT_UF */ 180 #define _PCNT_IFS_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */ 181 #define _PCNT_IFS_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ 182 #define PCNT_IFS_UF_DEFAULT (_PCNT_IFS_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IFS */ 183 #define PCNT_IFS_OF (0x1UL << 1) /**< Overflow Interrupt Set */ 184 #define _PCNT_IFS_OF_SHIFT 1 /**< Shift value for PCNT_OF */ 185 #define _PCNT_IFS_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */ 186 #define _PCNT_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ 187 #define PCNT_IFS_OF_DEFAULT (_PCNT_IFS_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IFS */ 188 #define PCNT_IFS_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Set */ 189 #define _PCNT_IFS_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */ 190 #define _PCNT_IFS_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */ 191 #define _PCNT_IFS_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ 192 #define PCNT_IFS_DIRCNG_DEFAULT (_PCNT_IFS_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IFS */ 193 194 /* Bit fields for PCNT IFC */ 195 #define _PCNT_IFC_RESETVALUE 0x00000000UL /**< Default value for PCNT_IFC */ 196 #define _PCNT_IFC_MASK 0x00000007UL /**< Mask for PCNT_IFC */ 197 #define PCNT_IFC_UF (0x1UL << 0) /**< Underflow Interrupt Clear */ 198 #define _PCNT_IFC_UF_SHIFT 0 /**< Shift value for PCNT_UF */ 199 #define _PCNT_IFC_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */ 200 #define _PCNT_IFC_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ 201 #define PCNT_IFC_UF_DEFAULT (_PCNT_IFC_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IFC */ 202 #define PCNT_IFC_OF (0x1UL << 1) /**< Overflow Interrupt Clear */ 203 #define _PCNT_IFC_OF_SHIFT 1 /**< Shift value for PCNT_OF */ 204 #define _PCNT_IFC_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */ 205 #define _PCNT_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ 206 #define PCNT_IFC_OF_DEFAULT (_PCNT_IFC_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IFC */ 207 #define PCNT_IFC_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Clear */ 208 #define _PCNT_IFC_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */ 209 #define _PCNT_IFC_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */ 210 #define _PCNT_IFC_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ 211 #define PCNT_IFC_DIRCNG_DEFAULT (_PCNT_IFC_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IFC */ 212 213 /* Bit fields for PCNT IEN */ 214 #define _PCNT_IEN_RESETVALUE 0x00000000UL /**< Default value for PCNT_IEN */ 215 #define _PCNT_IEN_MASK 0x00000007UL /**< Mask for PCNT_IEN */ 216 #define PCNT_IEN_UF (0x1UL << 0) /**< Underflow Interrupt Enable */ 217 #define _PCNT_IEN_UF_SHIFT 0 /**< Shift value for PCNT_UF */ 218 #define _PCNT_IEN_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */ 219 #define _PCNT_IEN_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ 220 #define PCNT_IEN_UF_DEFAULT (_PCNT_IEN_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IEN */ 221 #define PCNT_IEN_OF (0x1UL << 1) /**< Overflow Interrupt Enable */ 222 #define _PCNT_IEN_OF_SHIFT 1 /**< Shift value for PCNT_OF */ 223 #define _PCNT_IEN_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */ 224 #define _PCNT_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ 225 #define PCNT_IEN_OF_DEFAULT (_PCNT_IEN_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IEN */ 226 #define PCNT_IEN_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Enable */ 227 #define _PCNT_IEN_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */ 228 #define _PCNT_IEN_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */ 229 #define _PCNT_IEN_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ 230 #define PCNT_IEN_DIRCNG_DEFAULT (_PCNT_IEN_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IEN */ 231 232 /* Bit fields for PCNT ROUTE */ 233 #define _PCNT_ROUTE_RESETVALUE 0x00000000UL /**< Default value for PCNT_ROUTE */ 234 #define _PCNT_ROUTE_MASK 0x00000300UL /**< Mask for PCNT_ROUTE */ 235 #define _PCNT_ROUTE_LOCATION_SHIFT 8 /**< Shift value for PCNT_LOCATION */ 236 #define _PCNT_ROUTE_LOCATION_MASK 0x300UL /**< Bit mask for PCNT_LOCATION */ 237 #define _PCNT_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_ROUTE */ 238 #define _PCNT_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for PCNT_ROUTE */ 239 #define _PCNT_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for PCNT_ROUTE */ 240 #define _PCNT_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for PCNT_ROUTE */ 241 #define PCNT_ROUTE_LOCATION_DEFAULT (_PCNT_ROUTE_LOCATION_DEFAULT << 8) /**< Shifted mode DEFAULT for PCNT_ROUTE */ 242 #define PCNT_ROUTE_LOCATION_LOC0 (_PCNT_ROUTE_LOCATION_LOC0 << 8) /**< Shifted mode LOC0 for PCNT_ROUTE */ 243 #define PCNT_ROUTE_LOCATION_LOC1 (_PCNT_ROUTE_LOCATION_LOC1 << 8) /**< Shifted mode LOC1 for PCNT_ROUTE */ 244 #define PCNT_ROUTE_LOCATION_LOC2 (_PCNT_ROUTE_LOCATION_LOC2 << 8) /**< Shifted mode LOC2 for PCNT_ROUTE */ 245 246 /* Bit fields for PCNT FREEZE */ 247 #define _PCNT_FREEZE_RESETVALUE 0x00000000UL /**< Default value for PCNT_FREEZE */ 248 #define _PCNT_FREEZE_MASK 0x00000001UL /**< Mask for PCNT_FREEZE */ 249 #define PCNT_FREEZE_REGFREEZE (0x1UL << 0) /**< Register Update Freeze */ 250 #define _PCNT_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for PCNT_REGFREEZE */ 251 #define _PCNT_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for PCNT_REGFREEZE */ 252 #define _PCNT_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_FREEZE */ 253 #define _PCNT_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for PCNT_FREEZE */ 254 #define _PCNT_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for PCNT_FREEZE */ 255 #define PCNT_FREEZE_REGFREEZE_DEFAULT (_PCNT_FREEZE_REGFREEZE_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_FREEZE */ 256 #define PCNT_FREEZE_REGFREEZE_UPDATE (_PCNT_FREEZE_REGFREEZE_UPDATE << 0) /**< Shifted mode UPDATE for PCNT_FREEZE */ 257 #define PCNT_FREEZE_REGFREEZE_FREEZE (_PCNT_FREEZE_REGFREEZE_FREEZE << 0) /**< Shifted mode FREEZE for PCNT_FREEZE */ 258 259 /* Bit fields for PCNT SYNCBUSY */ 260 #define _PCNT_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for PCNT_SYNCBUSY */ 261 #define _PCNT_SYNCBUSY_MASK 0x00000007UL /**< Mask for PCNT_SYNCBUSY */ 262 #define PCNT_SYNCBUSY_CTRL (0x1UL << 0) /**< PCNTn_CTRL Register Busy */ 263 #define _PCNT_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for PCNT_CTRL */ 264 #define _PCNT_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for PCNT_CTRL */ 265 #define _PCNT_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */ 266 #define PCNT_SYNCBUSY_CTRL_DEFAULT (_PCNT_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */ 267 #define PCNT_SYNCBUSY_CMD (0x1UL << 1) /**< PCNTn_CMD Register Busy */ 268 #define _PCNT_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for PCNT_CMD */ 269 #define _PCNT_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for PCNT_CMD */ 270 #define _PCNT_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */ 271 #define PCNT_SYNCBUSY_CMD_DEFAULT (_PCNT_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */ 272 #define PCNT_SYNCBUSY_TOPB (0x1UL << 2) /**< PCNTn_TOPB Register Busy */ 273 #define _PCNT_SYNCBUSY_TOPB_SHIFT 2 /**< Shift value for PCNT_TOPB */ 274 #define _PCNT_SYNCBUSY_TOPB_MASK 0x4UL /**< Bit mask for PCNT_TOPB */ 275 #define _PCNT_SYNCBUSY_TOPB_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */ 276 #define PCNT_SYNCBUSY_TOPB_DEFAULT (_PCNT_SYNCBUSY_TOPB_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */ 277 278 /** @} End of group EFM32G_PCNT */ 279 280 281