1 /***************************************************************************//**
2 * @file
3 * @brief External Bus Iterface (EBI) peripheral API
4 * @author Energy Micro AS
5 * @version 3.0.0
6 *******************************************************************************
7 * @section License
8 * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
9 *******************************************************************************
10 *
11 * Permission is granted to anyone to use this software for any purpose,
12 * including commercial applications, and to alter it and redistribute it
13 * freely, subject to the following restrictions:
14 *
15 * 1. The origin of this software must not be misrepresented; you must not
16 * claim that you wrote the original software.
17 * 2. Altered source versions must be plainly marked as such, and must not be
18 * misrepresented as being the original software.
19 * 3. This notice may not be removed or altered from any source distribution.
20 *
21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
22 * obligation to support this Software. Energy Micro AS is providing the
23 * Software "AS IS", with no express or implied warranties of any kind,
24 * including, but not limited to, any implied warranties of merchantability
25 * or fitness for any particular purpose or warranties against infringement
26 * of any proprietary rights of a third party.
27 *
28 * Energy Micro AS will not be liable for any consequential, incidental, or
29 * special damages, or any other relief, or for any claim by any third party,
30 * arising from your use of this Software.
31 *
32 ******************************************************************************/
33 #ifndef __EM_EBI_H
34 #define __EM_EBI_H
35
36 #include "em_part.h"
37
38 #if defined(EBI_COUNT) && (EBI_COUNT > 0)
39 #include "em_assert.h"
40
41 #include <stdint.h>
42 #include <stdbool.h>
43
44 #ifdef __cplusplus
45 extern "C" {
46 #endif
47
48 /***************************************************************************//**
49 * @addtogroup EM_Library
50 * @{
51 ******************************************************************************/
52
53 /***************************************************************************//**
54 * @addtogroup EBI
55 * @{
56 ******************************************************************************/
57
58 /***************************************************************************//**
59 * @verbatim
60 *
61 * --------- ---------
62 * | EBI | /| |\ | Ext. |
63 * | | / --------- \ | Async |
64 * |(EFM32)| \ --------- / | Device|
65 * | | \| |/ | |
66 * --------- ---------
67 * Parallel interface
68 *
69 * @endverbatim
70 ******************************************************************************/
71
72 /*******************************************************************************
73 ******************************* DEFINES ***********************************
74 ******************************************************************************/
75
76 #define EBI_BANK0 (uint32_t)(1 << 1) /**< EBI address bank 0 */
77 #define EBI_BANK1 (uint32_t)(1 << 2) /**< EBI address bank 1 */
78 #define EBI_BANK2 (uint32_t)(1 << 3) /**< EBI address bank 2 */
79 #define EBI_BANK3 (uint32_t)(1 << 4) /**< EBI address bank 3 */
80
81 #define EBI_CS0 (uint32_t)(1 << 1) /**< EBI chip select line 0 */
82 #define EBI_CS1 (uint32_t)(1 << 2) /**< EBI chip select line 1 */
83 #define EBI_CS2 (uint32_t)(1 << 3) /**< EBI chip select line 2 */
84 #define EBI_CS3 (uint32_t)(1 << 4) /**< EBI chip select line 3 */
85
86 /*******************************************************************************
87 ******************************** ENUMS ************************************
88 ******************************************************************************/
89
90 /** EBI Mode of operation */
91 typedef enum
92 {
93 /** 8 data bits, 8 address bits */
94 ebiModeD8A8 = EBI_CTRL_MODE_D8A8,
95 /** 16 data bits, 16 address bits, using address latch enable */
96 ebiModeD16A16ALE = EBI_CTRL_MODE_D16A16ALE,
97 /** 8 data bits, 24 address bits, using address latch enable */
98 ebiModeD8A24ALE = EBI_CTRL_MODE_D8A24ALE,
99 /** Mode D16 */
100 #if defined(_EFM32_GIANT_FAMILY)
101 ebiModeD16 = EBI_CTRL_MODE_D16,
102 #endif
103 } EBI_Mode_TypeDef;
104
105 /** EBI Polarity configuration */
106 typedef enum
107 {
108 /** Active Low */
109 ebiActiveLow = 0,
110 /** Active High */
111 ebiActiveHigh = 1
112 } EBI_Polarity_TypeDef;
113
114 /** EBI Pin Line types */
115 typedef enum
116 {
117 /** Address Ready line */
118 ebiLineARDY,
119 /** Address Latch Enable line */
120 ebiLineALE,
121 /** Write Enable line */
122 ebiLineWE,
123 /** Read Enable line */
124 ebiLineRE,
125 /** Chip Select line */
126 ebiLineCS,
127 #if defined(_EFM32_GIANT_FAMILY)
128 /** BL line */
129 ebiLineBL,
130 #endif
131 #if defined(_EFM32_GIANT_FAMILY)
132 /** TFT VSYNC line */
133 ebiLineTFTVSync,
134 /** TFT HSYNC line */
135 ebiLineTFTHSync,
136 /** TFT Data enable line */
137 ebiLineTFTDataEn,
138 /** TFT DCLK line */
139 ebiLineTFTDClk,
140 /** TFT Chip select line */
141 ebiLineTFTCS,
142 #endif
143 } EBI_Line_TypeDef;
144
145 #if defined(_EFM32_GIANT_FAMILY)
146 /** Address Pin Enable, lower limit - lower range of pins to enable */
147 typedef enum
148 {
149 /** Adress lines EBI_A[0] and upwards are enabled by APEN */
150 ebiALowA0 = EBI_ROUTE_ALB_A0,
151 /** Adress lines EBI_A[8] and upwards are enabled by APEN */
152 ebiALowA8 = EBI_ROUTE_ALB_A8,
153 /** Adress lines EBI_A[16] and upwards are enabled by APEN */
154 ebiALowA16 = EBI_ROUTE_ALB_A16,
155 /** Adress lines EBI_A[24] and upwards are enabled by APEN */
156 ebiALowA24 = EBI_ROUTE_ALB_A24,
157 } EBI_ALow_TypeDef;
158
159 /** Adress Pin Enable, high limit - higher limit of pins to enable */
160 typedef enum
161 {
162 /** All EBI_A pins are disabled */
163 ebiAHighA0 = EBI_ROUTE_APEN_A0,
164 /** All EBI_A[4:ALow] are enabled */
165 ebiAHighA5 = EBI_ROUTE_APEN_A5,
166 /** All EBI_A[5:ALow] are enabled */
167 ebiAHighA6 = EBI_ROUTE_APEN_A6,
168 /** All EBI_A[6:ALow] are enabled */
169 ebiAHighA7 = EBI_ROUTE_APEN_A7,
170 /** All EBI_A[7:ALow] are enabled */
171 ebiAHighA8 = EBI_ROUTE_APEN_A8,
172 /** All EBI_A[8:ALow] are enabled */
173 ebiAHighA9 = EBI_ROUTE_APEN_A9,
174 /** All EBI_A[9:ALow] are enabled */
175 ebiAHighA10 = EBI_ROUTE_APEN_A10,
176 /** All EBI_A[10:ALow] are enabled */
177 ebiAHighA11 = EBI_ROUTE_APEN_A11,
178 /** All EBI_A[11:ALow] are enabled */
179 ebiAHighA12 = EBI_ROUTE_APEN_A12,
180 /** All EBI_A[12:ALow] are enabled */
181 ebiAHighA13 = EBI_ROUTE_APEN_A13,
182 /** All EBI_A[13:ALow] are enabled */
183 ebiAHighA14 = EBI_ROUTE_APEN_A14,
184 /** All EBI_A[14:ALow] are enabled */
185 ebiAHighA15 = EBI_ROUTE_APEN_A15,
186 /** All EBI_A[15:ALow] are enabled */
187 ebiAHighA16 = EBI_ROUTE_APEN_A16,
188 /** All EBI_A[16:ALow] are enabled */
189 ebiAHighA17 = EBI_ROUTE_APEN_A17,
190 /** All EBI_A[17:ALow] are enabled */
191 ebiAHighA18 = EBI_ROUTE_APEN_A18,
192 /** All EBI_A[18:ALow] are enabled */
193 ebiAHighA19 = EBI_ROUTE_APEN_A19,
194 /** All EBI_A[19:ALow] are enabled */
195 ebiAHighA20 = EBI_ROUTE_APEN_A20,
196 /** All EBI_A[20:ALow] are enabled */
197 ebiAHighA21 = EBI_ROUTE_APEN_A21,
198 /** All EBI_A[21:ALow] are enabled */
199 ebiAHighA22 = EBI_ROUTE_APEN_A22,
200 /** All EBI_A[22:ALow] are enabled */
201 ebiAHighA23 = EBI_ROUTE_APEN_A23,
202 /** All EBI_A[23:ALow] are enabled */
203 ebiAHighA24 = EBI_ROUTE_APEN_A24,
204 /** All EBI_A[24:ALow] are enabled */
205 ebiAHighA25 = EBI_ROUTE_APEN_A25,
206 /** All EBI_A[25:ALow] are enabled */
207 ebiAHighA26 = EBI_ROUTE_APEN_A26,
208 /** All EBI_A[26:ALow] are enabled */
209 ebiAHighA27 = EBI_ROUTE_APEN_A27,
210 /** All EBI_A[27:ALow] are enabled */
211 ebiAHighA28 = EBI_ROUTE_APEN_A28,
212 } EBI_AHigh_TypeDef;
213
214 /** EBI I/O Alternate Pin Location */
215 typedef enum {
216 /** EBI PIN I/O Location 0 */
217 ebiLocation0 = EBI_ROUTE_LOCATION_LOC0,
218 /** EBI PIN I/O Location 1 */
219 ebiLocation1 = EBI_ROUTE_LOCATION_LOC1,
220 /** EBI PIN I/O Location 2 */
221 ebiLocation2 = EBI_ROUTE_LOCATION_LOC2,
222 /** EBI PIN I/O Location 3 */
223 // ebiLocation3 = EBI_ROUTE_LOCATION_LOC3,
224 } EBI_Location_TypeDef;
225 #endif
226
227 /* TFT support */
228 #if defined(_EFM32_GIANT_FAMILY)
229 /** EBI TFT Graphics Bank Select */
230 typedef enum
231 {
232 /** Memory BANK0 contains frame buffer */
233 ebiTFTBank0 = EBI_TFTCTRL_BANKSEL_BANK0,
234 /** Memory BANK1 contains frame buffer */
235 ebiTFTBank1 = EBI_TFTCTRL_BANKSEL_BANK1,
236 /** Memory BANK2 contains frame buffer */
237 ebiTFTBank2 = EBI_TFTCTRL_BANKSEL_BANK2,
238 /** Memory BANK3 contains frame buffer */
239 ebiTFTBank3 = EBI_TFTCTRL_BANKSEL_BANK3
240 } EBI_TFTBank_TypeDef;
241
242 /** Masking and Alpha blending source color*/
243 typedef enum
244 {
245 /** Use memory as source color for masking/alpha blending */
246 ebiTFTColorSrcMem = EBI_TFTCTRL_COLOR1SRC_MEM,
247 /** Use PIXEL1 register as source color for masking/alpha blending */
248 ebiTFTColorSrcPixel1 = EBI_TFTCTRL_COLOR1SRC_PIXEL1,
249 } EBI_TFTColorSrc_TypeDef;
250
251 /** Bus Data Interleave Mode */
252 typedef enum
253 {
254 /** Unlimited interleaved accesses per EBI_DCLK period. Can cause jitter */
255 ebiTFTInterleaveUnlimited = EBI_TFTCTRL_INTERLEAVE_UNLIMITED,
256 /** Allow 1 interleaved access per EBI_DCLK period */
257 ebiTFTInterleaveOnePerDClk = EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK,
258 /** Only allow accesses during porch periods */
259 ebiTFTInterleavePorch = EBI_TFTCTRL_INTERLEAVE_PORCH,
260 } EBI_TFTInterleave_TypeDef;
261
262 /** Control frame base pointer copy */
263 typedef enum
264 {
265 /** Trigger update of frame buffer pointer on vertical sync */
266 ebiTFTFrameBufTriggerVSync = EBI_TFTCTRL_FBCTRIG_VSYNC,
267 /** Trigger update of frame buffer pointer on horizontal sync */
268 ebiTFTFrameBufTriggerHSync = EBI_TFTCTRL_FBCTRIG_HSYNC,
269 } EBI_TFTFrameBufTrigger_TypeDef;
270
271 /** Control of mask and alpha blending mode */
272 typedef enum
273 {
274 /** Masking and blending are disabled */
275 ebiTFTMBDisabled = EBI_TFTCTRL_MASKBLEND_DISABLED,
276 /** Internal masking */
277 ebiTFTMBIMask = EBI_TFTCTRL_MASKBLEND_IMASK,
278 /** Internal alpha blending */
279 ebiTFTMBIAlpha = EBI_TFTCTRL_MASKBLEND_IALPHA,
280 /** Internal masking and alpha blending are enabled */
281 ebiTFTMBIMaskAlpha = EBI_TFTCTRL_MASKBLEND_IMASKIALPHA,
282 /** External masking */
283 ebiTFTMBEMask = EBI_TFTCTRL_MASKBLEND_EMASK,
284 /** External alpha blending */
285 ebiTFTMBEAlpha = EBI_TFTCTRL_MASKBLEND_EALPHA,
286 /** External masking and alpha blending */
287 ebiTFTMBEMaskAlpha = EBI_TFTCTRL_MASKBLEND_EMASKEALPHA,
288 } EBI_TFTMaskBlend_TypeDef;
289
290 /** TFT Direct Drive mode */
291 typedef enum
292 {
293 /** Disabled */
294 ebiTFTDDModeDisabled = EBI_TFTCTRL_DD_DISABLED,
295 /** Direct Drive from internal memory */
296 ebiTFTDDModeInternal = EBI_TFTCTRL_DD_INTERNAL,
297 /** Direct Drive from external memory */
298 ebiTFTDDModeExternal = EBI_TFTCTRL_DD_EXTERNAL,
299 } EBI_TFTDDMode_TypeDef;
300
301 /** TFT Data Increment Width */
302 typedef enum
303 {
304 /** Pixel increments are 1 byte at a time */
305 ebiTFTWidthByte = EBI_TFTCTRL_WIDTH_BYTE,
306 /** Pixel increments are 2 bytes (half word) */
307 ebiTFTWidthHalfWord = EBI_TFTCTRL_WIDTH_HALFWORD,
308 } EBI_TFTWidth_TypeDef;
309
310 #endif
311
312 /*******************************************************************************
313 ******************************* STRUCTS ***********************************
314 ******************************************************************************/
315
316 /** EBI Initialization structure */
317 typedef struct
318 {
319 /** EBI operation mode, data and address limits */
320 EBI_Mode_TypeDef mode;
321 /** Address Ready pin polarity, active high or low */
322 EBI_Polarity_TypeDef ardyPolarity;
323 /** Address Latch Enable pin polarity, active high or low */
324 EBI_Polarity_TypeDef alePolarity;
325 /** Write Enable pin polarity, active high or low */
326 EBI_Polarity_TypeDef wePolarity;
327 /** Read Enable pin polarity, active high or low */
328 EBI_Polarity_TypeDef rePolarity;
329 /** Chip Select pin polarity, active high or low */
330 EBI_Polarity_TypeDef csPolarity;
331 #if defined(_EFM32_GIANT_FAMILY)
332 /** Byte Lane pin polaritym, active high or low */
333 EBI_Polarity_TypeDef blPolarity;
334 /** Flag to enable or disable Byte Lane support */
335 bool blEnable;
336 /** Flag to enable or disable idle state insertion between transfers */
337 bool noIdle;
338 #endif
339 /** Flag to enable or disable Address Ready support */
340 bool ardyEnable;
341 /** Set to turn off 32 cycle timeout ability */
342 bool ardyDisableTimeout;
343 /** Mask of flags which selects address banks to configure EBI_BANK<0-3> */
344 uint32_t banks;
345 /** Mask of flags which selects chip select lines to configure EBI_CS<0-3> */
346 uint32_t csLines;
347 /** Number of cycles address is held after Adress Latch Enable is asserted */
348 int addrSetupCycles;
349 /** Number of cycles address is driven onto the ADDRDAT bus before ALE is asserted */
350 int addrHoldCycles;
351 #if defined(_EFM32_GIANT_FAMILY)
352 /** Enable or disables half cycle duration of the ALE strobe in the last address setup cycle */
353 bool addrHalfALE;
354 #endif
355 /** Number of cycles for address setup before REn is asserted */
356 int readSetupCycles;
357 /** Number of cycles REn is held active */
358 int readStrobeCycles;
359 /** Number of cycles CSn is held active after REn is deasserted */
360 int readHoldCycles;
361 #if defined(_EFM32_GIANT_FAMILY)
362 /** Enable or disable page mode reads */
363 bool readPageMode;
364 /** Enables or disable prefetching from sequential addresses */
365 bool readPrefetch;
366 /** Enabled or disables half cycle duration of the REn signal in the last strobe cycle */
367 bool readHalfRE;
368 #endif
369 /** Number of cycles for address setup before WEn is asserted */
370 int writeSetupCycles;
371 /** Number of cycles WEn is held active */
372 int writeStrobeCycles;
373 /** Number of cycles CSn is held active after WEn is deasserted */
374 int writeHoldCycles;
375 #if defined(_EFM32_GIANT_FAMILY)
376 /** Enable or disable the write buffer */
377 bool writeBufferDisable;
378 /** Enables or disables half cycle duration of the WEn signal in the last strobe cycle */
379 bool writeHalfWE;
380 /** Lower address pin limit to enable */
381 EBI_ALow_TypeDef aLow;
382 /** High address pin limit to enable */
383 EBI_AHigh_TypeDef aHigh;
384 /** Pin Location */
385 EBI_Location_TypeDef location;
386 #endif
387 /** Flag, if EBI should be enabled after configuration */
388 bool enable;
389 } EBI_Init_TypeDef;
390
391 /** Default config for EBI init structures */
392 #if defined(_EFM32_GIANT_FAMILY)
393 #define EBI_INIT_DEFAULT \
394 { ebiModeD8A8, /* 8 bit address, 8 bit data */ \
395 ebiActiveLow, /* ARDY polarity */ \
396 ebiActiveLow, /* ALE polarity */ \
397 ebiActiveLow, /* WE polarity */ \
398 ebiActiveLow, /* RE polarity */ \
399 ebiActiveLow, /* CS polarity */ \
400 ebiActiveLow, /* BL polarity */ \
401 false, /* enable BL */ \
402 false, /* enable NOIDLE */ \
403 false, /* enable ARDY */ \
404 false, /* don't disable ARDY timeout */ \
405 EBI_BANK0, /* enable bank 0 */ \
406 EBI_CS0, /* enable chip select 0 */ \
407 0, /* addr setup cycles */ \
408 1, /* addr hold cycles */ \
409 false, /* do not enable half cycle ALE strobe */ \
410 0, /* read setup cycles */ \
411 0, /* read strobe cycles */ \
412 0, /* read hold cycles */ \
413 false, /* disable page mode */ \
414 false, /* disable prefetch */ \
415 false, /* do not enable half cycle REn strobe */ \
416 0, /* write setup cycles */ \
417 0, /* write strobe cycles */ \
418 1, /* write hold cycles */ \
419 false, /* do not disable the write buffer */ \
420 false, /* do not enable halc cycle WEn strobe */ \
421 ebiALowA0, /* ALB - Low bound, address lines */ \
422 ebiAHighA0, /* APEN - High bound, address lines */ \
423 ebiLocation0, /* Use Location 0 */ \
424 true, /* enable EBI */ \
425 }
426 #else
427 #define EBI_INIT_DEFAULT \
428 { ebiModeD8A8, /* 8 bit address, 8 bit data */ \
429 ebiActiveLow, /* ARDY polarity */ \
430 ebiActiveLow, /* ALE polarity */ \
431 ebiActiveLow, /* WE polarity */ \
432 ebiActiveLow, /* RE polarity */ \
433 ebiActiveLow, /* CS polarity */ \
434 false, /* enable ARDY */ \
435 false, /* don't disable ARDY timeout */ \
436 EBI_BANK0, /* enable bank 0 */ \
437 EBI_CS0, /* enable chip select 0 */ \
438 0, /* addr setup cycles */ \
439 1, /* addr hold cycles */ \
440 0, /* read setup cycles */ \
441 0, /* read strobe cycles */ \
442 0, /* read hold cycles */ \
443 0, /* write setup cycles */ \
444 0, /* write strobe cycles */ \
445 1, /* write hold cycles */ \
446 true, /* enable EBI */ \
447 }
448 #endif
449
450 #if defined(_EFM32_GIANT_FAMILY)
451
452 /** TFT Initialization structure */
453 typedef struct
454 {
455 /** External memory bank for driving display */
456 EBI_TFTBank_TypeDef bank;
457 /** Width */
458 EBI_TFTWidth_TypeDef width;
459 /** Color source for masking and alpha blending */
460 EBI_TFTColorSrc_TypeDef colSrc;
461 /** Bus Interleave mode */
462 EBI_TFTInterleave_TypeDef interleave;
463 /** Trigger for updating frame buffer pointer */
464 EBI_TFTFrameBufTrigger_TypeDef fbTrigger;
465 /** Drive DCLK from negative clock edge of internal clock */
466 bool shiftDClk;
467 /** Masking and alpha blending mode */
468 EBI_TFTMaskBlend_TypeDef maskBlend;
469 /** TFT Direct Drive mode */
470 EBI_TFTDDMode_TypeDef driveMode;
471 /** TFT Polarity for Chip Select (CS) Line */
472 EBI_Polarity_TypeDef csPolarity;
473 /** TFT Polarity for Data Clock (DCLK) Line */
474 EBI_Polarity_TypeDef dclkPolarity;
475 /** TFT Polarity for Data Enable (DATAEN) Line */
476 EBI_Polarity_TypeDef dataenPolarity;
477 /** TFT Polarity for Horizontal Sync (HSYNC) Line */
478 EBI_Polarity_TypeDef hsyncPolarity;
479 /** TFT Polarity for Vertical Sync (VSYNC) Line */
480 EBI_Polarity_TypeDef vsyncPolarity;
481 /** Horizontal size in pixels */
482 int hsize;
483 /** Horizontal Front Porch Size */
484 int hPorchFront;
485 /** Horizontal Back Porch Size */
486 int hPorchBack;
487 /** Horizontal Synchronization Pulse Width */
488 int hPulseWidth;
489 /** Vertical size in pixels */
490 int vsize;
491 /** Vertical Front Porch Size */
492 int vPorchFront;
493 /** Vertical Back Porch Size */
494 int vPorchBack;
495 /** Vertical Synchronization Pulse Width */
496 int vPulseWidth;
497 /** TFT Frame Buffer address, offset to EBI bank base address */
498 uint32_t addressOffset;
499 /** TFT DCLK period in internal cycles */
500 int dclkPeriod;
501 /** Starting position of External Direct Drive relative to DCLK inactive edge */
502 int startPosition;
503 /** Number of cycles RGB data is driven before active edge of DCLK */
504 int setupCycles;
505 /** Number of cycles RGB data is held after active edge of DCLK */
506 int holdCycles;
507 } EBI_TFTInit_TypeDef;
508
509 #define EBI_TFTINIT_DEFAULT \
510 { ebiTFTBank0, /* Select EBI Bank 0 */ \
511 ebiTFTWidthHalfWord, /* Select 2-byte increments */ \
512 ebiTFTColorSrcMem, /* Use memory as source for mask/blending */ \
513 ebiTFTInterleaveUnlimited, /* Unlimited interleaved accesses */ \
514 ebiTFTFrameBufTriggerVSync, /* VSYNC as frame buffer update trigger */ \
515 false, /* Drive DCLK from negative edge of internal clock */ \
516 ebiTFTMBDisabled, /* No masking and alpha blending enabled */ \
517 ebiTFTDDModeExternal, /* Drive from external memory */ \
518 ebiActiveLow, /* CS Active Low polarity */ \
519 ebiActiveLow, /* DCLK Active Low polarity */ \
520 ebiActiveLow, /* DATAEN Active Low polarity */ \
521 ebiActiveLow, /* HSYNC Active Low polarity */ \
522 ebiActiveLow, /* VSYNC Active Low polarity */ \
523 320, /* Horizontal size in pixels */ \
524 1, /* Horizontal Front Porch */ \
525 29, /* Horizontal Back Porch */ \
526 2, /* Horizontal Synchronization Pulse Width */ \
527 240, /* Vertical size in pixels */ \
528 1, /* Vertical Front Porch */ \
529 4, /* Vertical Back Porch */ \
530 2, /* Vertical Synchronization Pulse Width */ \
531 0x0000, /* Address offset to EBI memory base */ \
532 5, /* DCLK Period */ \
533 2, /* DCLK Start */ \
534 1, /* DCLK Setup cycles */ \
535 1, /* DCLK Hold cycles */ \
536 }
537
538 #endif
539 /*******************************************************************************
540 ***************************** PROTOTYPES **********************************
541 ******************************************************************************/
542
543 void EBI_Init(const EBI_Init_TypeDef *ebiInit);
544 void EBI_Disable(void);
545 uint32_t EBI_BankAddress(uint32_t bank);
546 void EBI_BankEnable(uint32_t banks, bool enable);
547
548 #if defined(_EFM32_GIANT_FAMILY)
549 void EBI_TFTInit(const EBI_TFTInit_TypeDef *ebiTFTInit);
550 void EBI_TFTSizeSet(uint32_t horizontal, uint32_t vertical);
551 void EBI_TFTHPorchSet(int front, int back, int pulseWidth);
552 void EBI_TFTVPorchSet(int front, int back, int pulseWidth);
553 void EBI_TFTTimingSet(int dclkPeriod, int start, int setup, int hold);
554 #endif
555
556 #if defined(_EFM32_GIANT_FAMILY)
557 /* This functionality is only available on devices with independent timing support */
558 void EBI_BankReadTimingSet(uint32_t bank, int setupCycles, int strobeCycles, int holdCycles);
559 void EBI_BankReadTimingConfig(uint32_t bank, bool pageMode, bool prefetch, bool halfRE);
560
561 void EBI_BankWriteTimingSet(uint32_t bank, int setupCycles, int strobeCycles, int holdCycles);
562 void EBI_BankWriteTimingConfig(uint32_t bank, bool writeBufDisable, bool halfWE);
563
564 void EBI_BankAddressTimingSet(uint32_t bank, int setupCycles, int holdCycles);
565 void EBI_BankAddressTimingConfig(uint32_t bank, bool halfALE);
566
567 void EBI_BankPolaritySet(uint32_t bank, EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
568 void EBI_BankByteLaneEnable(uint32_t bank, bool enable);
569 void EBI_BankPage(uint32_t bank, bool enable);
570 void EBI_AltMapEnable(bool enable);
571
572 /***************************************************************************//**
573 * @brief
574 * Enable or disable TFT Direct Drive
575 *
576 * @param[in] mode
577 * Drive from Internal or External memory, or Disable Direct Drive
578 ******************************************************************************/
EBI_TFTEnable(EBI_TFTDDMode_TypeDef mode)579 __STATIC_INLINE void EBI_TFTEnable(EBI_TFTDDMode_TypeDef mode)
580 {
581 EBI->TFTCTRL = (EBI->TFTCTRL & ~(_EBI_TFTCTRL_DD_MASK)) | (uint32_t) mode;
582 }
583
584
585 /***************************************************************************//**
586 * @brief
587 * Configure frame buffer pointer
588 *
589 * @param[in] address
590 * Frame pointer address, as offset by EBI base address
591 ******************************************************************************/
EBI_TFTFrameBaseSet(uint32_t address)592 __STATIC_INLINE void EBI_TFTFrameBaseSet(uint32_t address)
593 {
594 EBI->TFTFRAMEBASE = (uint32_t) address;
595 }
596
597
598 /***************************************************************************//**
599 * @brief Set TFT Pixel Color 0 or 1
600 *
601 * @param[in] pixel
602 * Which pixel instance to set
603 * @param[in] color
604 * Color of pixel, 16-bit value
605 ******************************************************************************/
EBI_TFTPixelSet(int pixel,uint32_t color)606 __STATIC_INLINE void EBI_TFTPixelSet(int pixel, uint32_t color)
607 {
608 EFM_ASSERT(pixel == 0 || pixel == 1);
609
610 if (pixel == 0)
611 {
612 EBI->TFTPIXEL0 = color;
613 }
614 if (pixel == 1)
615 {
616 EBI->TFTPIXEL1 = color;
617 }
618 }
619
620
621 /***************************************************************************//**
622 * @brief Masking and Blending Mode Set
623 *
624 * @param[in] alpha
625 * 8-bit value indicating blending factor
626 ******************************************************************************/
EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)627 __STATIC_INLINE void EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)
628 {
629 EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK))|maskBlend;
630 }
631
632
633 /***************************************************************************//**
634 * @brief Set TFT Alpha Blending Factor
635 *
636 * @param[in] alpha
637 * 8-bit value indicating blending factor
638 ******************************************************************************/
EBI_TFTAlphaBlendSet(uint8_t alpha)639 __STATIC_INLINE void EBI_TFTAlphaBlendSet(uint8_t alpha)
640 {
641 EBI->TFTALPHA = alpha;
642 }
643
644
645 /***************************************************************************//**
646 * @brief Set TFT mask value
647 * Data accesses that matches this value are suppressed
648 * @param[in] mask
649 ******************************************************************************/
EBI_TFTMaskSet(uint32_t mask)650 __STATIC_INLINE void EBI_TFTMaskSet(uint32_t mask)
651 {
652 EBI->TFTMASK = mask;
653 }
654
655
656 /***************************************************************************//**
657 * @brief Get current vertical position counter
658 * @return
659 * Returns the current line position for the visible part of a frame
660 ******************************************************************************/
EBI_TFTVCount(void)661 __STATIC_INLINE uint32_t EBI_TFTVCount(void)
662 {
663 return((EBI->TFTSTATUS & _EBI_TFTSTATUS_VCNT_MASK) >> _EBI_TFTSTATUS_VCNT_SHIFT);
664 }
665
666
667 /***************************************************************************//**
668 * @brief Get current horizontal position counter
669 * @return
670 * Returns the current horizontal pixel position within a visible line
671 ******************************************************************************/
EBI_TFTHCount(void)672 __STATIC_INLINE uint32_t EBI_TFTHCount(void)
673 {
674 return((EBI->TFTSTATUS & _EBI_TFTSTATUS_HCNT_MASK) >> _EBI_TFTSTATUS_HCNT_SHIFT);
675 }
676
677
678 /***************************************************************************//**
679 * @brief Set Frame Buffer Trigger
680 * Frame buffer pointer will be updated either on each horizontal line (hsync)
681 * or vertical update (vsync)(
682 ******************************************************************************/
EBI_TFTFBTriggerSet(EBI_TFTFrameBufTrigger_TypeDef sync)683 __STATIC_INLINE void EBI_TFTFBTriggerSet(EBI_TFTFrameBufTrigger_TypeDef sync)
684 {
685 EBI->TFTCTRL = ((EBI->TFTCTRL & ~_EBI_TFTCTRL_FBCTRIG_MASK)|sync);
686 }
687
688
689 /***************************************************************************//**
690 * @brief Set horizontal TFT stride value in number of bytes
691 *
692 * @param[in] nbytes
693 * Number of bytes to add to frame buffer pointer after each horizontal line
694 * update
695 ******************************************************************************/
EBI_TFTHStrideSet(uint32_t nbytes)696 __STATIC_INLINE void EBI_TFTHStrideSet(uint32_t nbytes)
697 {
698 EFM_ASSERT(nbytes < 0x1000);
699
700 EBI->TFTSTRIDE = (EBI->TFTSTRIDE & ~(_EBI_TFTSTRIDE_HSTRIDE_MASK))|
701 (nbytes<<_EBI_TFTSTRIDE_HSTRIDE_SHIFT);
702 }
703
704
705 /***************************************************************************//**
706 * @brief
707 * Clear one or more pending EBI interrupts.
708 * @param[in] flags
709 * Pending EBI interrupt source to clear. Use a logical OR combination
710 * of valid interrupt flags for the EBI module (EBI_IF_nnn).
711 ******************************************************************************/
EBI_IntClear(uint32_t flags)712 __STATIC_INLINE void EBI_IntClear(uint32_t flags)
713 {
714 EBI->IFC = flags;
715 }
716
717
718 /***************************************************************************//**
719 * @brief
720 * Set one or more pending EBI interrupts from SW.
721 *
722 * @param[in] flags
723 * EBI interrupt sources to set to pending. Use a logical OR combination of
724 * valid interrupt flags for the EBI module (EBI_IF_nnn).
725 ******************************************************************************/
EBI_IntSet(uint32_t flags)726 __STATIC_INLINE void EBI_IntSet(uint32_t flags)
727 {
728 EBI->IFS = flags;
729 }
730
731
732 /***************************************************************************//**
733 * @brief
734 * Disable one or more EBI interrupts
735 *
736 * @param[in] flags
737 * EBI interrupt sources to disable. Use logical OR combination of valid
738 * interrupt flags for the EBI module (EBI_IF_nnn)
739 ******************************************************************************/
EBI_IntDisable(uint32_t flags)740 __STATIC_INLINE void EBI_IntDisable(uint32_t flags)
741 {
742 EBI->IEN &= ~(flags);
743 }
744
745
746 /***************************************************************************//**
747 * @brief
748 * Enable one or more EBI interrupts
749 *
750 * @param[in] flags
751 * EBI interrupt sources to enable. Use logical OR combination of valid
752 * interrupt flags for the EBI module (EBI_IF_nnn)
753 ******************************************************************************/
EBI_IntEnable(uint32_t flags)754 __STATIC_INLINE void EBI_IntEnable(uint32_t flags)
755 {
756 EBI->IEN |= flags;
757 }
758
759
760 /***************************************************************************//**
761 * @brief
762 * Get pending EBI interrupt flags
763 *
764 * @note
765 * The event bits are not cleared by the use of this function
766 *
767 * @return
768 * EBI interrupt sources pending, a logical combination of valid EBI
769 * interrupt flags, EBI_IF_nnn
770 ******************************************************************************/
EBI_IntGet(void)771 __STATIC_INLINE uint32_t EBI_IntGet(void)
772 {
773 return(EBI->IF);
774 }
775
776
777 /***************************************************************************//**
778 * @brief
779 * Start ECC generator on NAND flash transfers.
780 ******************************************************************************/
EBI_StartNandEccGen(void)781 __STATIC_INLINE void EBI_StartNandEccGen(void)
782 {
783 EBI->CMD = EBI_CMD_ECCSTART | EBI_CMD_ECCCLEAR;
784 }
785
786
787 /***************************************************************************//**
788 * @brief
789 * Stop NAND flash ECC generator and return generated ECC.
790 *
791 * @return
792 * The generated ECC.
793 ******************************************************************************/
EBI_StopNandEccGen(void)794 __STATIC_INLINE uint32_t EBI_StopNandEccGen( void )
795 {
796 EBI->CMD = EBI_CMD_ECCSTOP;
797 return EBI->ECCPARITY;
798 }
799 #endif
800
801 void EBI_ChipSelectEnable(uint32_t banks, bool enable);
802 void EBI_ReadTimingSet(int setupCycles, int strobeCycles, int holdCycles);
803 void EBI_WriteTimingSet(int setupCycles, int strobeCycles, int holdCycles);
804 void EBI_AddressTimingSet(int setupCycles, int holdCycles);
805 void EBI_PolaritySet(EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
806
807 /** @} (end addtogroup EBI) */
808 /** @} (end addtogroup EM_Library) */
809
810 #ifdef __cplusplus
811 }
812 #endif
813
814 #endif /* defined(EBI_COUNT) && (EBI_COUNT > 0) */
815
816 #endif /* __EM_EBI_H */
817