1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2011-07-13 onelife Initial creation for using EFM32 ADC module to 9 * interface the Freescale MMA7361L 10 * 2011-08-02 onelife Add digital interface support of using EFM32 IIC 11 * module for the Freescale MMA7455L 12 */ 13 14 #ifndef __DEV_ACCEL_H__ 15 #define __DEV_ACCEL_H__ 16 17 /* Includes ------------------------------------------------------------------*/ 18 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) 19 #include "mma7455l.h" 20 #endif 21 22 /* Exported types ------------------------------------------------------------*/ 23 struct efm32_accel_result_t 24 { 25 rt_int32_t x; 26 rt_int32_t y; 27 rt_int32_t z; 28 }; 29 30 /* Exported constants --------------------------------------------------------*/ 31 /* Exported macro ------------------------------------------------------------*/ 32 /* MMA7361LC 33 g-Select g-Range Sensitivity 34 0 1.5 g 800 mV/g 35 1 6 g 206 mV/g 36 37 MMA7455L 38 g-Select g-Range Sensitivity 39 0 2 g 64 LSB/g 40 1 4 g 32 LSB/g 41 2 8 g 16 LSB/g 42 */ 43 #define ACCEL_G_SELECT (0) 44 45 #define ACCEL_CAL_SAMPLES (4) /* Must be multiple of 2 */ 46 #define ACCEL_CAL_ROUND (50) 47 #define ACCEL_CAL_SIMPLE (0) 48 #define ACCEL_CAL_INTERACT (1) 49 50 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) 51 /* Reading_at_1g = Sensitivity * Max_reading / Refference_voltage */ 52 #define ACCEL_CAL_1G_VALUE {993, 256} 53 54 #define ACCEL_X_ADC_CH ADC_SCANCTRL_INPUTMASK_CH2 55 #define ACCEL_Y_ADC_CH ADC_SCANCTRL_INPUTMASK_CH3 56 #define ACCEL_Z_ADC_CH ADC_SCANCTRL_INPUTMASK_CH4 57 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) 58 #define ACCEL_CAL_1G_VALUE {0x3f, 0x1f, 0x0f} 59 #define ACCEL_IIC_SLAVE_ADDRESS (0x1d) 60 61 #define ACCEL_INT1_PORT (gpioPortD) 62 #define ACCEL_INT1_PIN (13) 63 #define ACCEL_INT2_PORT (gpioPortD) 64 #define ACCEL_INT2_PIN (12) 65 66 #define ACCEL_MODE_STANDBY (1 << 0) 67 #define ACCEL_MODE_MEASUREMENT (1 << 1) 68 #define ACCEL_MODE_LEVEL (1 << 2) 69 #define ACCEL_MODE_PULSE (1 << 3) 70 #define ACCEL_RANGE_8G (1 << 4) 71 #define ACCEL_RANGE_4G (1 << 5) 72 #define ACCEL_RANGE_2G (1 << 6) 73 #define ACCEL_INTPIN_INVERSE (1 << 7) 74 #define ACCEL_INT_LEVEL_PULSE (1 << 8) 75 #define ACCEL_INT_PULSE_LEVEL (1 << 9) 76 #define ACCEL_INT_SINGLE_DOUBLE (1 << 10) 77 #define ACCEL_DISABLE_X (1 << 11) 78 #define ACCEL_DISABLE_Y (1 << 12) 79 #define ACCEL_DISABLE_Z (1 << 13) 80 #define ACCEL_THRESHOLD_INTEGER (1 << 14) /* For level detection only */ 81 #define ACCEL_BANDWIDTH_125HZ (1 << 15) 82 #define ACCEL_LEVEL_AND (1 << 16) 83 #define ACCEL_PULSE_AND (1 << 17) 84 #define ACCEL_DRIVE_STRONG (1 << 18) 85 #define ACCEL_SOURCE_LEVEL_X (1 << 19) 86 #define ACCEL_SOURCE_LEVEL_Y (1 << 20) 87 #define ACCEL_SOURCE_LEVEL_Z (1 << 21) 88 #define ACCEL_SOURCE_PULSE_X (1 << 22) 89 #define ACCEL_SOURCE_PULSE_Y (1 << 23) 90 #define ACCEL_SOURCE_PULSE_Z (1 << 24) 91 92 #define ACCEL_SHIFT_MODE (0) 93 #define ACCEL_SHIFT_RANGE (4) 94 #define ACCEL_SHIFT_INT (8) 95 #define ACCEL_SHIFT_DISABLE (11) 96 #define ACCEL_SHIFT_SOURCE (19) 97 98 #define ACCEL_MASK_MODE (0X0000000f << ACCEL_SHIFT_MODE) 99 #define ACCEL_MASK_RANGE (0X00000007 << ACCEL_SHIFT_RANGE) 100 #define ACCEL_MASK_INT (0X00000007 << ACCEL_SHIFT_INT) 101 #define ACCEL_MASK_DISABLE (0X00000007 << ACCEL_SHIFT_DISABLE) 102 #define ACCEL_MASK_SOURCE (0X0000003f << ACCEL_SHIFT_SOURCE) 103 #endif 104 105 /* Exported functions ------------------------------------------------------- */ 106 rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data, 107 rt_bool_t lowResolution); 108 rt_err_t efm_accel_config(rt_uint32_t config, 109 rt_uint8_t level_threshold, 110 rt_uint8_t pulse_threshold, 111 rt_uint8_t pulse_duration, 112 rt_uint8_t pulse_latency, 113 rt_uint8_t pulse_duration2); 114 rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period); 115 rt_err_t efm_accel_init(void); 116 117 #endif /*__DEV_ACCEL_H__ */ 118