1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 */ 9 10 #ifndef __RTTHREAD_CFG_H__ 11 #define __RTTHREAD_CFG_H__ 12 13 /* Includes ------------------------------------------------------------------*/ 14 /* Exported types ------------------------------------------------------------*/ 15 /* Exported constants --------------------------------------------------------*/ 16 /* Exported macro ------------------------------------------------------------*/ 17 /* EFM32_BOARD */ 18 //#define EFM32_G8XX_STK 19 //#define EFM32_GXXX_DK 20 #define EFM32GG_DK3750 21 22 /* RT_NAME_MAX */ 23 #define RT_NAME_MAX (8) 24 25 /* RT_ALIGN_SIZE */ 26 #define RT_ALIGN_SIZE (8) 27 28 /* PRIORITY_MAX */ 29 #define RT_THREAD_PRIORITY_MAX (32) 30 31 /* Tick per Second */ 32 #define RT_TICK_PER_SECOND (100) 33 34 /* SECTION: RT_DEBUG */ 35 #define RT_DEBUG 36 #define RT_DEBUG_COLOR 37 #define RT_LWIP_DEBUG 38 39 //#define RT_IRQHDL_DEBUG 40 //#define RT_USART_DEBUG 41 //#define RT_LEUART_DEBUG 42 //#define RT_IIC_DEBUG 43 //#define RT_MISC_DEBUG 44 //#define RT_ADC_DEBUG 45 //#define RT_ACMP_DEBUG 46 //#define RT_TIMER_DEBUG 47 //#define RT_RTC_DEBUG 48 49 #define EFM32_DEBUG 50 #define EFM32_EMU_DEBUG 51 #define EFM32_ACCEL_DEBUG 52 #define EFM32_SFLASH_DEBUG 53 //#define EFM32_SDCARD_DEBUG 54 #define EFM32_ETHERNET_DEBUG 55 #define EFM32_LCD_DEBUG 56 #define EFM32_KEYS_DEBUG 57 58 /* Using Hook */ 59 //#define RT_USING_HOOK 60 61 /* Using Software Timer */ 62 /* #define RT_USING_TIMER_SOFT */ 63 #define RT_TIMER_THREAD_PRIO (4) 64 #define RT_TIMER_THREAD_STACK_SIZE (512) 65 #define RT_TICK_PER_SECOND (10) 66 67 /* SECTION: IPC */ 68 /* Using Semaphore*/ 69 #define RT_USING_SEMAPHORE /* Required by DFS and lwIP */ 70 /* Using Mutex */ 71 #define RT_USING_MUTEX /* Required by DFS */ 72 /* Using Event */ 73 //#define RT_USING_EVENT 74 /* Using MailBox */ 75 #define RT_USING_MAILBOX /* Required by lwIP */ 76 /* Using Message Queue */ 77 #define RT_USING_MESSAGEQUEUE /* Required by RTGUI */ 78 /* SECTION: Memory Management */ 79 /* Using Memory Pool Management*/ 80 //#define RT_USING_MEMPOOL 81 82 /* Using Dynamic Heap Management */ 83 #define RT_USING_HEAP 84 85 /* Using Small MM */ 86 #define RT_USING_SMALL_MEM 87 88 /* SECTION: Device System */ 89 /* Using Device System */ 90 #define RT_USING_DEVICE 91 92 /* SECTION: UART options */ 93 /* USART/UART/LEUART Device for Console */ 94 #if defined(EFM32_G8XX_STK) 95 #define RT_USING_USART1 (0x1UL) 96 #define RT_USART1_NAME "debug" 97 //#define RT_USART1_USING_DMA (0x0UL) 98 #elif defined(EFM32_GXXX_DK) 99 #define RT_USING_USART1 (0x0UL) 100 #define RT_USART1_NAME "debug" 101 //#define RT_USART1_USING_DMA (0x0UL) 102 #elif defined(EFM32GG_DK3750) 103 #define EFM32GG_DK3750_USING_LEUART1 104 #if defined(EFM32GG_DK3750_USING_LEUART1) 105 #define RT_USING_LEUART1 (0x0UL) 106 #define RT_LEUART1_NAME "debug0" 107 //#define RT_LEUART1_USING_DMA (0x0UL) 108 #else 109 #define RT_USING_UART1 (0x2UL) 110 #define RT_UART1_NAME "debug" 111 //#define RT_UART1_USING_DMA (0x0UL) 112 #endif 113 #endif 114 115 /* SECTION: SPI options */ 116 #define EFM32_SPI_MASTER (1 << 0) /* Master mode */ 117 #define EFM32_SPI_AUTOCS (1 << 1) /* Auto chip select */ 118 #define EFM32_SPI_9BIT (1 << 2) /* 9-bit data */ 119 /* 120 0: Clock idle low, sample on rising edge 121 1: Clock idle low, sample on falling edge 122 2: Clock idle high, sample on falling edge 123 3: Clock idle high, sample on rising edge. 124 */ 125 #define EFM32_SPI_CLK_MODE(mode) (mode << 3) /* clock mode */ 126 127 #if defined(EFM32_G8XX_STK) 128 //#define RT_USING_USART0 (0x0UL) 129 //#define RT_USART0_SYNC_MODE (EFM32_SPI_MASTER) 130 //#define RT_USART0_NAME "spi0" 131 //#define RT_USART0_USING_DMA (0x1UL) 132 #elif defined(EFM32_GXXX_DK) 133 #define RT_USING_USART0 (0x2UL) 134 #define RT_USART0_SYNC_MODE (EFM32_SPI_MASTER | EFM32_SPI_AUTOCS | \ 135 EFM32_SPI_CLK_MODE(0)) 136 #define RT_USART0_NAME "spi0" 137 #define RT_USART0_USING_DMA (0x1UL) 138 139 #define RT_USING_USART2 (0x1UL) 140 #define RT_USART2_SYNC_MODE (EFM32_SPI_MASTER | EFM32_SPI_CLK_MODE(0)) 141 #define RT_USART2_NAME "spi2" 142 #define RT_USART2_USING_DMA (0x2UL) 143 144 #elif defined(EFM32GG_DK3750) 145 #define RT_USING_USART0 (0x1UL) 146 #define RT_USART0_SYNC_MODE (EFM32_SPI_MASTER | EFM32_SPI_AUTOCS | \ 147 EFM32_SPI_CLK_MODE(0)) 148 #define RT_USART0_NAME "spi0" 149 #define RT_USART0_USING_DMA (0x1UL) 150 151 #define RT_USING_USART1 (0x1UL) 152 #define RT_USART1_SYNC_MODE (EFM32_SPI_MASTER | EFM32_SPI_AUTOCS | \ 153 EFM32_SPI_9BIT | EFM32_SPI_CLK_MODE(3)) 154 #define RT_USART1_NAME "spi1" 155 #define RT_USART1_USING_DMA (0x2UL) 156 #endif 157 158 /* SECTION: IIC options */ 159 //#define RT_USING_IIC0 0x3UL 160 #define RT_IIC0_NAME "iic0" 161 162 /* SECTION: ACMP options */ 163 //#define RT_USING_ACMP0 164 #define RT_ACMP0_NAME "acmp0" 165 166 /* SECTION: ADC options */ 167 #define RT_USING_ADC0 168 #define RT_ADC0_NAME "adc0" 169 #if defined(RT_USING_ADC0) 170 #define RT_USING_MISC 171 #endif 172 173 /* SECTION: TIMER options */ 174 //#define RT_USING_TIMER2 (0x00) /* Continuous mode */ 175 #define RT_TIMER2_NAME "tmr2" 176 177 /* SECTION: RTC options */ 178 #if (defined(EFM32_G8XX_STK) || defined(EFM32_GXXX_DK) || defined(EFM32GG_DK3750)) 179 #define RT_USING_RTC 180 #define RT_RTC_NAME "rtc" 181 #endif 182 183 /* SECTION: Serial options */ 184 #define EFM_USART0 (0x00UL) 185 #define EFM_USART1 (0x01UL) 186 #define EFM_USART2 (0x02UL) 187 #define EFM_UART0 (0x10UL) 188 #define EFM_UART1 (0x11UL) 189 #define EFM_LEUART0 (0x20UL) 190 #define EFM_LEUART1 (0x21UL) 191 192 #if defined(EFM32_G8XX_STK) 193 #define RT_CONSOLE_DEVICE (EFM_USART1) 194 #elif defined(EFM32_GXXX_DK) 195 #define RT_CONSOLE_DEVICE (EFM_USART1) 196 #elif defined(EFM32GG_DK3750) 197 #if defined(EFM32GG_DK3750_USING_LEUART1) 198 #define RT_CONSOLE_DEVICE (EFM_LEUART1) 199 #else 200 #define RT_CONSOLE_DEVICE (EFM_UART1) 201 #endif 202 #endif 203 204 /* SECTION: Runtime library */ 205 #define RT_LIBC_USING_TIME 206 207 /* SECTION: Console options */ 208 #define RT_USING_CONSOLE 209 /* the buffer size of console*/ 210 #define RT_CONSOLEBUF_SIZE (128) 211 212 /* SECTION: finsh, a C-Express shell */ 213 #define RT_USING_FINSH 214 /* Using symbol table */ 215 #define FINSH_USING_SYMTAB 216 #define FINSH_USING_DESCRIPTION 217 218 /* SECTION: Peripheral devices */ 219 #define EFM32_INTERFACE_ADC (0) 220 #define EFM32_INTERFACE_IIC (1) 221 #define EFM32_INTERFACE_SPI (2) 222 #if (defined(EFM32_GXXX_DK) || defined(EFM32GG_DK3750)) 223 //#define EFM32_USING_ACCEL EFM32_INTERFACE_IIC /* Three axis accelerometer */ 224 //#define EFM32_USING_SFLASH /* SPI Flash */ 225 #define EFM32_USING_SPISD /* MicroSD card */ 226 //#define EFM32_USING_ETHERNET /* Ethernet controller */ 227 //#define EFM32_USING_LCD /* TFT LCD */ 228 //#define EFM32_USING_KEYS /* Keys and joystick */ 229 #endif 230 231 #if defined(EFM32_USING_ACCEL) 232 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC) 233 #define ACCEL_USING_DEVICE_NAME RT_ADC0_NAME 234 #define ACCEL_USING_DMA (0x3UL) /* For multiple channels scan mode */ 235 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC) 236 #define ACCEL_USING_DEVICE_NAME RT_IIC0_NAME 237 #endif 238 #endif 239 240 #if defined(EFM32_USING_SFLASH) 241 #define SFLASH_USING_DEVICE_NAME RT_USART0_NAME 242 #endif 243 244 #if defined(EFM32_USING_SPISD) 245 #define SPISD_USING_DEVICE_NAME RT_USART0_NAME 246 #define SPISD_DEVICE_NAME "spiSd" 247 #endif 248 249 #if defined(EFM32_USING_ETHERNET) 250 #if defined(EFM32_GXXX_DK) 251 #define ETH_USING_DEVICE_NAME RT_USART2_NAME 252 #elif defined(EFM32GG_DK3750) 253 #define ETH_USING_DEVICE_NAME RT_USART1_NAME 254 #endif 255 #define ETH_DEVICE_NAME "spiEth" 256 #define ETH_ADDR_DEFAULT {0x00, 0x01, 0x02, 0x03, 0x04, 0x05} 257 #endif 258 259 /* SECTION: device filesystem */ 260 #ifdef EFM32_USING_SPISD 261 #define RT_USING_DFS 262 /* the max number of mounted filesystem */ 263 #define DFS_FILESYSTEMS_MAX (2) 264 /* the max number of opened files */ 265 #define DFS_FD_MAX (4) 266 /* the max number of cached sector */ 267 #define DFS_CACHE_MAX_NUM (4) 268 #endif /* EFM32_USING_SPISD */ 269 #if defined(EFM32_USING_SPISD) 270 #define RT_USING_DFS_ELMFAT 271 #define DFS_ELMFAT_INTERFACE_EFM 272 #endif /* defined(EFM32_USING_SPISD) */ 273 #define RT_USING_DFS_DEVFS 274 275 /* SECTION: lwip, a lighwight TCP/IP protocol stack */ 276 #if defined(EFM32_USING_ETHERNET) 277 #define EFM32_USING_ETH_HTTPD 278 //#define EFM32_USING_ETH_UTILS 279 //#define hostName "onelife.dyndns.org" 280 //#define userPwdB64 "dXNlcjpwYXNzd2Q=" 281 282 //#define RT_USING_LWIP 283 //#define RT_USING_NETUTILS 284 //#define RT_LWIP_DHCP 285 /* Enable ICMP protocol*/ 286 #define RT_LWIP_ICMP 287 /* Enable ICMP protocol*/ 288 //#define RT_LWIP_IGMP 289 /* Enable UDP protocol*/ 290 #define RT_LWIP_UDP 291 /* Enable TCP protocol*/ 292 #define RT_LWIP_TCP 293 /* Enable DHCP */ 294 //#define RT_LWIP_DHCP 295 /* Enable DNS */ 296 //#define RT_LWIP_DNS 297 298 /* the number of simulatenously active TCP connections*/ 299 #define RT_LWIP_TCP_PCB_NUM (2) 300 301 /* ip address of target*/ 302 #define RT_LWIP_IPADDR0 (192) 303 #define RT_LWIP_IPADDR1 (168) 304 #define RT_LWIP_IPADDR2 (1) 305 #define RT_LWIP_IPADDR3 (118) 306 /* gateway address of target*/ 307 #define RT_LWIP_GWADDR0 (192) 308 #define RT_LWIP_GWADDR1 (168) 309 #define RT_LWIP_GWADDR2 (1) 310 #define RT_LWIP_GWADDR3 (1) 311 /* mask address of target*/ 312 #define RT_LWIP_MSKADDR0 (255) 313 #define RT_LWIP_MSKADDR1 (255) 314 #define RT_LWIP_MSKADDR2 (255) 315 #define RT_LWIP_MSKADDR3 (0) 316 317 /* tcp thread options */ 318 #define RT_LWIP_TCPTHREAD_PRIORITY (12) 319 #define RT_LWIP_TCPTHREAD_MBOX_SIZE (4) 320 #define RT_LWIP_TCPTHREAD_STACKSIZE (1024) 321 /* ethernet if thread options */ 322 #define RT_LWIP_ETHTHREAD_PRIORITY (15) 323 #define RT_LWIP_ETHTHREAD_MBOX_SIZE (4) 324 #define RT_LWIP_ETHTHREAD_STACKSIZE (512) 325 #endif /* defined(EFM32_USING_ETHERNET) */ 326 327 /* SECTION: RTGUI support */ 328 #if defined(EFM32_USING_LCD) 329 #define LCD_USING_DEVICE_NAME RT_USART1_NAME 330 #define LCD_DEVICE_NAME "lcd" 331 /* using RTGUI support */ 332 // #define RT_USING_RTGUI 333 334 /* name length of RTGUI object */ 335 #define RTGUI_NAME_MAX (16) 336 /* support 16 weight font */ 337 #define RTGUI_USING_FONT16 338 /* support 12 weight font */ 339 #define RTGUI_USING_FONT12 340 /* support Chinese font */ 341 #define RTGUI_USING_FONTHZ 342 /* use DFS as file interface */ 343 #define RTGUI_USING_DFS_FILERW 344 /* use font file as Chinese font */ 345 /* #define RTGUI_USING_HZ_FILE */ 346 /* use Chinese bitmap font */ 347 #define RTGUI_USING_HZ_BMP 348 /* use small size in RTGUI */ 349 /* #define RTGUI_USING_SMALL_SIZE */ 350 /* use mouse cursor */ 351 #define RTGUI_USING_MOUSE_CURSOR 352 /* RTGUI image options */ 353 #define RTGUI_IMAGE_XPM 354 //#define RTGUI_IMAGE_JPEG 355 #define RTGUI_IMAGE_TJPGD 356 //#define RTGUI_IMAGE_PNG 357 #define RTGUI_IMAGE_BMP 358 #endif /* defined(EFM32_USING_LCD) */ 359 360 /* Exported functions ------------------------------------------------------- */ 361 362 #endif /* __RTTHREAD_CFG_H__ */ 363