1 /*
2  * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the License); you may
7  * not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  * www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  *
18  * Change Logs:
19  * Date           Author       Notes
20  * 2019-3-19      wangyq       the first version
21  * 2019-11-01     wangyq        update libraries
22  * 2021-04-20     liuhy         the second version
23  */
24 
25 #include <rthw.h>
26 #include <rtthread.h>
27 #include <rtdevice.h>
28 #include <drv_hwtimer.h>
29 #include <board.h>
30 
31 
32 #ifdef RT_USING_HWTIMER
33 
34 struct es32f0_hwtimer_dev
35 {
36     rt_hwtimer_t parent;
37     timer_handle_t *hwtimer_periph;
38     IRQn_Type IRQn;
39 };
40 
41 #ifdef BSP_USING_AD16C4T0_HWTIMER
42 static struct es32f0_hwtimer_dev ad16c4t0_hwtimer;
43 
44 static struct rt_hwtimer_info ad16c4t0_info =
45 {
46     ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */
47     (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16),        /* minimum count frequency */
48     0xFFFF,    /* counter maximum value */
49     ES_AD16C4T0_HWTIMER_MODE
50 };
51 
AD16C4T0_BRK_UP_TRIG_COM_Handler(void)52 void AD16C4T0_BRK_UP_TRIG_COM_Handler(void)
53 {
54     ald_timer_clear_flag_status(ad16c4t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE);
55     rt_device_hwtimer_isr(&ad16c4t0_hwtimer.parent);
56 }
57 
58 #endif
59 
60 #ifdef BSP_USING_GP16C4T0_HWTIMER
61 
62 static struct es32f0_hwtimer_dev gp16c4t0_hwtimer;
63 
64 static struct rt_hwtimer_info gp16c4t0_info =
65 {
66     ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */
67     (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16),        /* minimum count frequency */
68     0xFFFF,    /* counter maximum value */
69     ES_GP16C4T0_HWTIMER_MODE
70 };
71 
GP16C4T0_LCD_Handler(void)72 void GP16C4T0_LCD_Handler(void)
73 {
74     ald_timer_clear_flag_status(gp16c4t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE);
75     rt_device_hwtimer_isr(&gp16c4t0_hwtimer.parent);
76 }
77 
78 #endif
79 
80 #ifdef BSP_USING_GP16C2T0_HWTIMER
81 
82 static struct es32f0_hwtimer_dev gp16c2t0_hwtimer;
83 
84 static struct rt_hwtimer_info gp16c2t0_info =
85 {
86     ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */
87     (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16),        /* minimum count frequency */
88     0xFFFF,    /* counter maximum value */
89     ES_GP16C2T0_HWTIMER_MODE
90 };
91 
GP16C2T0_Handler(void)92 void GP16C2T0_Handler(void)
93 {
94     ald_timer_clear_flag_status(gp16c2t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE);
95     rt_device_hwtimer_isr(&gp16c2t0_hwtimer.parent);
96 }
97 
98 #endif
99 
100 #ifdef BSP_USING_GP16C2T1_HWTIMER
101 
102 static struct es32f0_hwtimer_dev gp16c2t1_hwtimer;
103 
104 static struct rt_hwtimer_info gp16c2t1_info =
105 {
106     ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */
107     (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16),        /* minimum count frequency */
108     0xFFFF,    /* counter maximum value */
109     ES_GP16C2T1_HWTIMER_MODE
110 };
111 
GP16C2T1_Handler(void)112 void GP16C2T1_Handler(void)
113 {
114     ald_timer_clear_flag_status(gp16c2t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE);
115     rt_device_hwtimer_isr(&gp16c2t1_hwtimer.parent);
116 }
117 
118 #endif
119 
120 #ifdef BSP_USING_BS16T0_HWTIMER
121 
122 static struct es32f0_hwtimer_dev bs16t0_hwtimer;
123 
124 static struct rt_hwtimer_info bs16t0_info =
125 {
126     ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */
127     (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16),        /* minimum count frequency */
128     0xFFFF,    /* counter maximum value */
129     ES_BS16T0_HWTIMER_MODE
130 };
131 
BS16T0_Handler(void)132 void BS16T0_Handler(void)
133 {
134     ald_timer_clear_flag_status(bs16t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE);
135     rt_device_hwtimer_isr(&bs16t0_hwtimer.parent);
136 }
137 
138 #endif
139 
140 #ifdef BSP_USING_BS16T1_HWTIMER
141 
142 static struct es32f0_hwtimer_dev bs16t1_hwtimer;
143 
144 static struct rt_hwtimer_info bs16t1_info =
145 {
146     ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */
147     (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16),        /* minimum count frequency */
148     0xFFFF,    /* counter maximum value */
149     ES_BS16T1_HWTIMER_MODE
150 };
151 
BS16T1_UART2_Handler(void)152 void BS16T1_UART2_Handler(void)
153 {
154     ald_timer_clear_flag_status(bs16t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE);
155     rt_device_hwtimer_isr(&bs16t1_hwtimer.parent);
156 }
157 
158 #endif
159 
160 #ifdef BSP_USING_BS16T2_HWTIMER
161 
162 static struct es32f0_hwtimer_dev bs16t2_hwtimer;
163 
164 static struct rt_hwtimer_info bs16t2_info =
165 {
166     ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */
167     (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16),        /* minimum count frequency */
168     0xFFFF,    /* counter maximum value */
169     ES_BS16T2_HWTIMER_MODE
170 };
171 
BS16T2_UART3_Handler(void)172 void BS16T2_UART3_Handler(void)
173 {
174     ald_timer_clear_flag_status(bs16t2_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE);
175     rt_device_hwtimer_isr(&bs16t2_hwtimer.parent);
176 }
177 
178 #endif
179 
180 #ifdef BSP_USING_BS16T3_HWTIMER
181 
182 static struct es32f0_hwtimer_dev bs16t3_hwtimer;
183 
184 static struct rt_hwtimer_info bs16t3_info =
185 {
186     ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */
187     (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16),        /* minimum count frequency */
188     0xFFFF,    /* counter maximum value */
189     ES_BS16T3_HWTIMER_MODE
190 };
191 
BS16T3_DAC0_Handler(void)192 void BS16T3_DAC0_Handler(void)
193 {
194     ald_timer_clear_flag_status(bs16t3_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE);
195     rt_device_hwtimer_isr(&bs16t3_hwtimer.parent);
196 }
197 
198 #endif
199 
es32f0_hwtimer_init(rt_hwtimer_t * timer,rt_uint32_t state)200 static void es32f0_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
201 {
202     struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
203 
204     struct rt_hwtimer_info *hwtimer_info = (struct rt_hwtimer_info *)timer->info;
205 
206 
207     RT_ASSERT(hwtimer != RT_NULL);
208 
209     if (1 == state)
210     {
211         ald_timer_base_init(hwtimer->hwtimer_periph);
212         ald_timer_interrupt_config(hwtimer->hwtimer_periph, TIMER_IT_UPDATE, ENABLE);
213         NVIC_EnableIRQ(hwtimer->IRQn);
214     }
215 
216     hwtimer->parent.freq = ald_cmu_get_pclk1_clock()/((hwtimer->hwtimer_periph->perh->PRES & 0xFFFF)+1);
217     hwtimer_info->maxfreq = hwtimer->parent.freq;
218     hwtimer_info->minfreq = (hwtimer->parent.freq)/0xFFFF;
219 }
220 
es32f0_hwtimer_start(rt_hwtimer_t * timer,rt_uint32_t cnt,rt_hwtimer_mode_t mode)221 static rt_err_t es32f0_hwtimer_start(rt_hwtimer_t *timer,
222                                      rt_uint32_t cnt,
223                                      rt_hwtimer_mode_t mode)
224 {
225     struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
226 
227     RT_ASSERT(hwtimer != RT_NULL);
228 
229     WRITE_REG(hwtimer->hwtimer_periph->perh->AR, cnt);
230     ald_timer_base_start(hwtimer->hwtimer_periph);
231 
232     return RT_EOK;
233 }
234 
es32f0_hwtimer_stop(rt_hwtimer_t * timer)235 static void es32f0_hwtimer_stop(rt_hwtimer_t *timer)
236 {
237     struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
238 
239     RT_ASSERT(hwtimer != RT_NULL);
240 
241     ald_timer_base_stop(hwtimer->hwtimer_periph);
242 }
243 
es32f0_hwtimer_count_get(rt_hwtimer_t * timer)244 static rt_uint32_t es32f0_hwtimer_count_get(rt_hwtimer_t *timer)
245 {
246     struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
247     uint32_t hwtimer_count = 0;
248 
249     RT_ASSERT(hwtimer != RT_NULL);
250 
251     hwtimer_count = READ_REG(hwtimer->hwtimer_periph->perh->COUNT);
252 
253     return hwtimer_count;
254 }
255 
es32f0_hwtimer_control(rt_hwtimer_t * timer,rt_uint32_t cmd,void * args)256 static rt_err_t es32f0_hwtimer_control(rt_hwtimer_t *timer,
257                                        rt_uint32_t cmd,
258                                        void *args)
259 {
260     rt_err_t ret = RT_EOK;
261     rt_uint32_t freq = 0;
262     struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
263 
264     RT_ASSERT(hwtimer != RT_NULL);
265 
266     switch (cmd)
267     {
268     case HWTIMER_CTRL_FREQ_SET:
269         freq = *(rt_uint32_t *)args;
270 
271         ret = -RT_ERROR;
272 
273         if(freq)
274         {
275             double temp,target;
276             temp = (double)ald_cmu_get_pclk1_clock();
277             target = temp/freq;
278 
279             if(target < 0x10001)   /*最大分频 = max(PRES)+1*/
280             {
281                 temp = target - (int)(target);
282 
283                 if((temp > 0.998)&&(target < 0x10000))
284                 {
285                     hwtimer->hwtimer_periph->perh->PRES = (uint32_t)target;
286                     ret = RT_EOK;
287                 }
288                 if((temp < 0.002)&&(target >= 0x1))
289                 {
290                     hwtimer->hwtimer_periph->perh->PRES = (uint32_t)target - 1;
291                     ret = RT_EOK;
292                 }
293 
294             }
295 
296             if(ret == RT_EOK)     /*更新信息*/
297                 hwtimer->parent.freq = ald_cmu_get_pclk1_clock()/((hwtimer->hwtimer_periph->perh->PRES & 0xFFFF)+1);
298 
299         }
300 
301         break;
302 
303     case HWTIMER_CTRL_STOP:
304         ald_timer_base_stop(hwtimer->hwtimer_periph);
305         break;
306 
307     default:
308         ret = -RT_EINVAL;
309         break;
310     }
311 
312     return ret;
313 }
314 
315 static struct rt_hwtimer_ops es32f0_hwtimer_ops =
316 {
317     es32f0_hwtimer_init,
318     es32f0_hwtimer_start,
319     es32f0_hwtimer_stop,
320     es32f0_hwtimer_count_get,
321     es32f0_hwtimer_control
322 };
323 
rt_hw_hwtimer_init(void)324 int rt_hw_hwtimer_init(void)
325 {
326     rt_err_t ret = RT_EOK;
327 
328 #ifdef BSP_USING_AD16C4T0_HWTIMER
329     static timer_handle_t ad16c4t0_hwtimer_periph;
330 
331     ad16c4t0_hwtimer_periph.perh = AD16C4T0;
332     ad16c4t0_hwtimer.IRQn = AD16C4T0_BRK_UP_TRIG_COM_IRQn;
333 
334     ad16c4t0_hwtimer_periph.init.prescaler = ES_AD16C4T0_HWTIMER_PRES - 1;
335     ad16c4t0_hwtimer_periph.init.mode = ( ES_AD16C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN;
336     ad16c4t0_hwtimer.hwtimer_periph = &ad16c4t0_hwtimer_periph;
337 
338     ad16c4t0_hwtimer.parent.info = &ad16c4t0_info;
339     ad16c4t0_hwtimer.parent.ops = &es32f0_hwtimer_ops;
340     ret = rt_device_hwtimer_register(&ad16c4t0_hwtimer.parent, ES_DEVICE_NAME_AD16C4T0_HWTIMER, &ad16c4t0_hwtimer);
341 #endif
342 
343 #ifdef BSP_USING_GP16C4T0_HWTIMER
344     static timer_handle_t gp16c4t0_hwtimer_periph;
345 
346     gp16c4t0_hwtimer_periph.perh = GP16C4T0;
347     gp16c4t0_hwtimer.IRQn = GP16C4T0_LCD_IRQn;
348 
349     gp16c4t0_hwtimer_periph.init.prescaler = ES_GP16C4T0_HWTIMER_PRES - 1;
350     gp16c4t0_hwtimer_periph.init.mode = ( ES_GP16C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN;
351     gp16c4t0_hwtimer.hwtimer_periph = &gp16c4t0_hwtimer_periph;
352 
353     gp16c4t0_hwtimer.parent.info = &gp16c4t0_info;
354     gp16c4t0_hwtimer.parent.ops = &es32f0_hwtimer_ops;
355     ret = rt_device_hwtimer_register(&gp16c4t0_hwtimer.parent, ES_DEVICE_NAME_GP16C4T0_HWTIMER, &gp16c4t0_hwtimer);
356 #endif
357 
358 #ifdef BSP_USING_GP16C2T0_HWTIMER
359     static timer_handle_t gp16c2t0_hwtimer_periph;
360 
361     gp16c2t0_hwtimer_periph.perh = GP16C2T0;
362     gp16c2t0_hwtimer.IRQn = GP16C2T0_IRQn;
363 
364     gp16c2t0_hwtimer_periph.init.prescaler = ES_GP16C2T0_HWTIMER_PRES - 1;
365     gp16c2t0_hwtimer_periph.init.mode = ( ES_GP16C2T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN;
366     gp16c2t0_hwtimer.hwtimer_periph = &gp16c2t0_hwtimer_periph;
367 
368     gp16c2t0_hwtimer.parent.info = &gp16c2t0_info;
369     gp16c2t0_hwtimer.parent.ops = &es32f0_hwtimer_ops;
370     ret = rt_device_hwtimer_register(&gp16c2t0_hwtimer.parent, ES_DEVICE_NAME_GP16C2T0_HWTIMER, &gp16c2t0_hwtimer);
371 #endif
372 
373 #ifdef BSP_USING_GP16C2T1_HWTIMER
374     static timer_handle_t gp16c2t1_hwtimer_periph;
375 
376     gp16c2t1_hwtimer_periph.perh = GP16C2T1;
377     gp16c2t1_hwtimer.IRQn = GP16C2T1_IRQn;
378 
379     gp16c2t1_hwtimer_periph.init.prescaler = ES_GP16C2T1_HWTIMER_PRES - 1;
380     gp16c2t1_hwtimer_periph.init.mode = ( ES_GP16C2T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN;
381     gp16c2t1_hwtimer.hwtimer_periph = &gp16c2t1_hwtimer_periph;
382 
383     gp16c2t1_hwtimer.parent.info = &gp16c2t1_info;
384     gp16c2t1_hwtimer.parent.ops = &es32f0_hwtimer_ops;
385     ret = rt_device_hwtimer_register(&gp16c2t1_hwtimer.parent, ES_DEVICE_NAME_GP16C2T1_HWTIMER, &gp16c2t1_hwtimer);
386 #endif
387 
388 #ifdef BSP_USING_BS16T0_HWTIMER
389     static timer_handle_t bs16t0_hwtimer_periph;
390 
391     bs16t0_hwtimer_periph.perh = BS16T0;
392     bs16t0_hwtimer.IRQn = BS16T0_IRQn;
393 
394     bs16t0_hwtimer_periph.init.prescaler = ES_BS16T0_HWTIMER_PRES - 1;
395     bs16t0_hwtimer_periph.init.mode = ( ES_BS16T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN;
396     bs16t0_hwtimer.hwtimer_periph = &bs16t0_hwtimer_periph;
397 
398     bs16t0_hwtimer.parent.info = &bs16t0_info;
399     bs16t0_hwtimer.parent.ops = &es32f0_hwtimer_ops;
400     ret = rt_device_hwtimer_register(&bs16t0_hwtimer.parent, ES_DEVICE_NAME_BS16T0_HWTIMER, &bs16t0_hwtimer);
401 #endif
402 
403 #ifdef BSP_USING_BS16T1_HWTIMER
404     static timer_handle_t bs16t1_hwtimer_periph;
405 
406     bs16t1_hwtimer_periph.perh = BS16T1;
407     bs16t1_hwtimer.IRQn = BS16T1_UART2_IRQn;
408 
409     bs16t1_hwtimer_periph.init.prescaler = ES_BS16T1_HWTIMER_PRES - 1;
410     bs16t1_hwtimer_periph.init.mode = ( ES_BS16T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN;
411     bs16t1_hwtimer.hwtimer_periph = &bs16t1_hwtimer_periph;
412 
413     bs16t1_hwtimer.parent.info = &bs16t1_info;
414     bs16t1_hwtimer.parent.ops = &es32f0_hwtimer_ops;
415     ret = rt_device_hwtimer_register(&bs16t1_hwtimer.parent, ES_DEVICE_NAME_BS16T1_HWTIMER, &bs16t1_hwtimer);
416 #endif
417 
418 #ifdef BSP_USING_BS16T2_HWTIMER
419     static timer_handle_t bs16t2_hwtimer_periph;
420 
421     bs16t2_hwtimer_periph.perh = BS16T2;
422     bs16t2_hwtimer.IRQn = BS16T2_UART3_IRQn;
423 
424     bs16t2_hwtimer_periph.init.prescaler = ES_BS16T2_HWTIMER_PRES - 1;
425     bs16t2_hwtimer_periph.init.mode = ( ES_BS16T2_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN;
426     bs16t2_hwtimer.hwtimer_periph = &bs16t2_hwtimer_periph;
427 
428     bs16t2_hwtimer.parent.info = &bs16t2_info;
429     bs16t2_hwtimer.parent.ops = &es32f0_hwtimer_ops;
430     ret = rt_device_hwtimer_register(&bs16t2_hwtimer.parent, ES_DEVICE_NAME_BS16T2_HWTIMER, &bs16t2_hwtimer);
431 #endif
432 
433 #ifdef BSP_USING_BS16T3_HWTIMER
434     static timer_handle_t bs16t3_hwtimer_periph;
435 
436     bs16t3_hwtimer_periph.perh = BS16T3;
437     bs16t3_hwtimer.IRQn = BS16T3_DAC0_IRQn;
438 
439     bs16t3_hwtimer_periph.init.prescaler = ES_BS16T3_HWTIMER_PRES - 1;
440     bs16t3_hwtimer_periph.init.mode = ( ES_BS16T3_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN;
441     bs16t3_hwtimer.hwtimer_periph = &bs16t3_hwtimer_periph;
442 
443     bs16t3_hwtimer.parent.info = &bs16t3_info;
444     bs16t3_hwtimer.parent.ops = &es32f0_hwtimer_ops;
445     ret = rt_device_hwtimer_register(&bs16t3_hwtimer.parent, ES_DEVICE_NAME_BS16T3_HWTIMER, &bs16t3_hwtimer);
446 #endif
447 
448 
449     return ret;
450 }
451 INIT_BOARD_EXPORT(rt_hw_hwtimer_init);
452 
453 #endif
454