1 /*
2  * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the License); you may
7  * not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  * www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  *
18  * Change Logs:
19  * Date           Author        Notes
20  * 2019-04-03     wangyq        the first version
21  * 2019-11-01     wangyq        update libraries
22  * 2021-04-20     liuhy         the second version
23  */
24 
25 #include <rthw.h>
26 #include <rtthread.h>
27 #include <rtdevice.h>
28 #include "board.h"
29 #include "drv_adc.h"
30 
31 #ifdef RT_USING_ADC
32 
33 /* define adc instance */
34 
35 #ifdef BSP_USING_ADC0
36 static struct rt_adc_device _device_adc0;
37 #endif /*BSP_USING_ADC0*/
38 
39 #ifdef BSP_USING_ADC1
40 static struct rt_adc_device _device_adc1;
41 #endif /*BSP_USING_ADC1*/
42 
43 /* enable or disable adc */
es32f3_adc_enabled(struct rt_adc_device * device,rt_uint32_t channel,rt_bool_t enabled)44 static rt_err_t es32f3_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
45 {
46     adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
47 
48     RT_ASSERT(device != RT_NULL);
49 
50     if (enabled)
51     {
52         ADC_ENABLE(_hadc); ;
53     }
54     else
55     {
56         ADC_DISABLE(_hadc);
57     }
58 
59     return RT_EOK;
60 }
61 
es32f3_adc_get_channel(rt_uint32_t channel)62 static adc_channel_t es32f3_adc_get_channel(rt_uint32_t channel)
63 {
64     adc_channel_t es32f3_channel;
65     gpio_init_t gpio_initstruct;
66 
67     /* Initialize ADC pin */
68     gpio_initstruct.mode = GPIO_MODE_INPUT;
69     gpio_initstruct.pupd = GPIO_FLOATING;
70     gpio_initstruct.odos = GPIO_OPEN_DRAIN;
71     gpio_initstruct.podrv = GPIO_OUT_DRIVE_6;
72     gpio_initstruct.nodrv = GPIO_OUT_DRIVE_6;
73     gpio_initstruct.flt  = GPIO_FILTER_DISABLE;
74     gpio_initstruct.type = GPIO_TYPE_CMOS;
75     gpio_initstruct.func = GPIO_FUNC_0;
76 
77     /* select gpio pin as adc function */
78     switch (channel)
79     {
80     case  0:
81         es32f3_channel = ADC_CHANNEL_0;
82         ald_gpio_init(ES_GPIO_ADC_CH0_GPIO, ES_GPIO_ADC_CH0_PIN, &gpio_initstruct);
83         break;
84     case  1:
85         es32f3_channel = ADC_CHANNEL_1;
86         ald_gpio_init(ES_GPIO_ADC_CH1_GPIO, ES_GPIO_ADC_CH1_PIN, &gpio_initstruct);
87         break;
88     case  2:
89         es32f3_channel = ADC_CHANNEL_2;
90         ald_gpio_init(ES_GPIO_ADC_CH2_GPIO, ES_GPIO_ADC_CH2_PIN, &gpio_initstruct);
91         break;
92     case  3:
93         es32f3_channel = ADC_CHANNEL_3;
94         ald_gpio_init(ES_GPIO_ADC_CH3_GPIO, ES_GPIO_ADC_CH3_PIN, &gpio_initstruct);
95         break;
96     case  4:
97         es32f3_channel = ADC_CHANNEL_4;
98         ald_gpio_init(ES_GPIO_ADC_CH4_GPIO, ES_GPIO_ADC_CH4_PIN, &gpio_initstruct);
99         break;
100     case  5:
101         es32f3_channel = ADC_CHANNEL_5;
102         ald_gpio_init(ES_GPIO_ADC_CH5_GPIO, ES_GPIO_ADC_CH5_PIN, &gpio_initstruct);
103         break;
104     case  6:
105         es32f3_channel = ADC_CHANNEL_6;
106         ald_gpio_init(ES_GPIO_ADC_CH6_GPIO, ES_GPIO_ADC_CH6_PIN, &gpio_initstruct);
107         break;
108     case  7:
109         es32f3_channel = ADC_CHANNEL_7;
110         ald_gpio_init(ES_GPIO_ADC_CH7_GPIO, ES_GPIO_ADC_CH7_PIN, &gpio_initstruct);
111         break;
112     case  8:
113         es32f3_channel = ADC_CHANNEL_8;
114         ald_gpio_init(ES_GPIO_ADC_CH8_GPIO, ES_GPIO_ADC_CH8_PIN, &gpio_initstruct);
115         break;
116     case  9:
117         es32f3_channel = ADC_CHANNEL_9;
118         ald_gpio_init(ES_GPIO_ADC_CH9_GPIO, ES_GPIO_ADC_CH9_PIN, &gpio_initstruct);
119         break;
120     case 10:
121         es32f3_channel = ADC_CHANNEL_10;
122         ald_gpio_init(ES_GPIO_ADC_CH10_GPIO, ES_GPIO_ADC_CH10_PIN, &gpio_initstruct);
123         break;
124     case 11:
125         es32f3_channel = ADC_CHANNEL_11;
126         ald_gpio_init(ES_GPIO_ADC_CH11_GPIO, ES_GPIO_ADC_CH11_PIN, &gpio_initstruct);
127         break;
128     case 12:
129         es32f3_channel = ADC_CHANNEL_12;
130         ald_gpio_init(ES_GPIO_ADC_CH12_GPIO, ES_GPIO_ADC_CH12_PIN, &gpio_initstruct);
131         break;
132     case 13:
133         es32f3_channel = ADC_CHANNEL_13;
134         ald_gpio_init(ES_GPIO_ADC_CH13_GPIO, ES_GPIO_ADC_CH13_PIN, &gpio_initstruct);
135         break;
136     case 14:
137         es32f3_channel = ADC_CHANNEL_14;
138         ald_gpio_init(ES_GPIO_ADC_CH14_GPIO, ES_GPIO_ADC_CH14_PIN, &gpio_initstruct);
139         break;
140     case 15:
141         es32f3_channel = ADC_CHANNEL_15;
142         ald_gpio_init(ES_GPIO_ADC_CH15_GPIO, ES_GPIO_ADC_CH15_PIN, &gpio_initstruct);
143         break;
144 
145     default:
146         break;
147     }
148 
149     return es32f3_channel;
150 }
151 
es32f3_get_adc_value(struct rt_adc_device * device,rt_uint32_t channel,rt_uint32_t * value)152 static rt_err_t es32f3_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
153 {
154     adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
155     adc_nch_conf_t nm_config;
156 
157     RT_ASSERT(device != RT_NULL);
158     RT_ASSERT(value != RT_NULL);
159 
160     /* config adc channel */
161     nm_config.ch       = es32f3_adc_get_channel(channel);
162     nm_config.idx          = ADC_NCH_IDX_1;
163     nm_config.samp = ES_ADC0_NCH_SAMPLETIME;
164     ald_adc_normal_channel_config(_hadc, &nm_config);
165 
166     ald_adc_normal_start(_hadc);
167 
168     if (ald_adc_normal_poll_for_conversion(_hadc, 5000) == OK)
169         *value = ald_adc_normal_get_value(_hadc);
170 
171     return RT_EOK;
172 }
173 
174 static const struct rt_adc_ops es32f3_adc_ops =
175 {
176     es32f3_adc_enabled,
177     es32f3_get_adc_value,
178 };
179 
rt_hw_adc_init(void)180 int rt_hw_adc_init(void)
181 {
182     int result = RT_EOK;
183     adc_handle_t _h_adc;
184 
185     /* adc function initialization */
186     _h_adc.init.scan = DISABLE;
187     _h_adc.init.cont = DISABLE;
188     _h_adc.init.disc = ADC_ALL_DISABLE;
189     _h_adc.init.disc_nr = ADC_DISC_NR_1;
190     _h_adc.init.nch_nr = ADC_NCH_NR_16;
191     _h_adc.init.nche_sel = ADC_NCHESEL_MODE_ALL;
192     _h_adc.init.cont = DISABLE;
193     _h_adc.init.n_ref = ADC_NEG_REF_VSS;
194     _h_adc.init.p_ref = ADC_POS_REF_VDD;
195 
196 #ifdef BSP_USING_ADC0
197 
198     static adc_handle_t _h_adc0;
199 
200     _h_adc0.init = _h_adc.init;
201 
202     _h_adc0.perh = ADC0;
203     _h_adc0.init.align = ES_ADC0_ALIGN;
204     _h_adc0.init.data_bit = ES_ADC0_DATA_BIT;
205     _h_adc0.init.div = ES_ADC0_CLK_DIV;
206     ald_adc_init(&_h_adc0);
207 
208     rt_hw_adc_register(&_device_adc0, ES_DEVICE_NAME_ADC0, &es32f3_adc_ops, &_h_adc0);
209 
210 #endif /*BSP_USING_ADC0*/
211 
212 #ifdef BSP_USING_ADC1
213 
214     static adc_handle_t _h_adc1;
215 
216     _h_adc1.init = _h_adc.init;
217 
218     _h_adc1.perh = ADC1;
219     _h_adc1.init.align = ES_ADC1_ALIGN;
220     _h_adc1.init.data_bit = ES_ADC1_DATA_BIT;
221     _h_adc1.init.div = ES_ADC1_CLK_DIV;
222     ald_adc_init(&_h_adc1);
223 
224     rt_hw_adc_register(&_device_adc1, ES_DEVICE_NAME_ADC1, &es32f3_adc_ops, &_h_adc1);
225 
226 #endif /*BSP_USING_ADC1*/
227 
228 
229     return result;
230 }
231 INIT_BOARD_EXPORT(rt_hw_adc_init);
232 
233 #endif
234