1 /*
2  *
3  * SPDX-License-Identifier: Apache-2.0
4  *
5  * Licensed under the Apache License, Version 2.0 (the License); you may
6  * not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  * www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
13  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  *
17  * Change Logs:
18  * Date           Author        Notes
19  * 2019-11-01     wangyq        update libraries
20  * 2020-01-14     wangyq        the first version
21  * 2021-04-20     liuhy         the second version
22  * 2022-07-11     shiwa         Support for RT_NO_START/RT_NO_STOP
23  */
24 
25 #include <rthw.h>
26 #include <rtthread.h>
27 #include <rtdevice.h>
28 #include "board.h"
29 #include "drv_i2c.h"
30 
31 
32 #ifdef RT_USING_I2C
33 
34 #define TIMEOUT 0x0FFF
35 
36 /* I2C struct definition */
37 #ifdef BSP_USING_I2C0
38     static i2c_handle_t _h_i2c0;
39 #endif
40 
41 #ifdef BSP_USING_I2C1
42     static i2c_handle_t _h_i2c1;
43 #endif
44 
_i2c_init(void)45 static void _i2c_init(void)
46 {
47     gpio_init_t gpio_instruct;
48 
49     /* Initialize I2C Pin */
50     gpio_instruct.mode = GPIO_MODE_OUTPUT;
51     gpio_instruct.odos = GPIO_OPEN_DRAIN;
52     gpio_instruct.pupd = GPIO_PUSH_UP;
53     gpio_instruct.podrv = GPIO_OUT_DRIVE_6;
54     gpio_instruct.nodrv = GPIO_OUT_DRIVE_6;
55     gpio_instruct.flt  = GPIO_FILTER_DISABLE;
56     gpio_instruct.type = GPIO_TYPE_CMOS;
57 
58 
59 #ifdef BSP_USING_I2C0
60 
61 #if  defined(ES_I2C0_SCL_GPIO_FUNC)&&defined(ES_I2C0_SCL_GPIO_PORT)&&defined(ES_I2C0_SCL_GPIO_PIN)
62     gpio_instruct.func = ES_I2C0_SCL_GPIO_FUNC;
63     ald_gpio_init(ES_I2C0_SCL_GPIO_PORT, ES_I2C0_SCL_GPIO_PIN, &gpio_instruct);
64 #endif
65 
66 #if  defined(ES_I2C0_SDA_GPIO_FUNC)&&defined(ES_I2C0_SDA_GPIO_PORT)&&defined(ES_I2C0_SDA_GPIO_PIN)
67     gpio_instruct.func = ES_I2C0_SDA_GPIO_FUNC;
68     ald_gpio_init(ES_I2C0_SDA_GPIO_PORT, ES_I2C0_SDA_GPIO_PIN, &gpio_instruct);
69 #endif
70 
71     /* Initialize I2C Function */
72     _h_i2c0.perh = I2C0;
73     _h_i2c0.init.module       = I2C_MODULE_MASTER;
74     _h_i2c0.init.clk_speed    = ES_I2C0_CLK_SPEED;
75     _h_i2c0.init.own_addr1    = ES_I2C0_OWN_ADDR1;
76     _h_i2c0.init.addr_mode    = ES_I2C0_ADDR_MODE;
77     _h_i2c0.init.general_call = ES_I2C0_GENERAL_CALL;
78     _h_i2c0.init.no_stretch   = ES_I2C0_STRETCH;
79 
80     ald_i2c_reset(&_h_i2c0);
81     ald_i2c_init(&_h_i2c0);
82 
83 #endif
84 
85 #ifdef BSP_USING_I2C1
86 
87 #if  defined(ES_I2C1_SCL_GPIO_FUNC)&&defined(ES_I2C1_SCL_GPIO_PORT)&&defined(ES_I2C1_SCL_GPIO_PIN)
88     gpio_instruct.func = ES_I2C1_SCL_GPIO_FUNC;
89     ald_gpio_init(ES_I2C1_SCL_GPIO_PORT, ES_I2C1_SCL_GPIO_PIN, &gpio_instruct);
90 #endif
91 
92 #if  defined(ES_I2C1_SDA_GPIO_FUNC)&&defined(ES_I2C1_SDA_GPIO_PORT)&&defined(ES_I2C1_SDA_GPIO_PIN)
93     gpio_instruct.func = ES_I2C1_SDA_GPIO_FUNC;
94     ald_gpio_init(ES_I2C1_SDA_GPIO_PORT, ES_I2C1_SDA_GPIO_PIN, &gpio_instruct);
95 #endif
96 
97     /* Initialize i2c function */
98     _h_i2c1.perh = I2C1;
99     _h_i2c1.init.module       = I2C_MODULE_MASTER;
100     _h_i2c1.init.clk_speed    = ES_I2C1_CLK_SPEED;
101     _h_i2c1.init.own_addr1    = ES_I2C1_OWN_ADDR1;
102     _h_i2c1.init.addr_mode    = ES_I2C1_ADDR_MODE;
103     _h_i2c1.init.general_call = ES_I2C1_GENERAL_CALL;
104     _h_i2c1.init.no_stretch   = ES_I2C1_STRETCH;
105 
106     ald_i2c_reset(&_h_i2c1);
107     ald_i2c_init(&_h_i2c1);
108 
109 #endif
110 }
111 #define _I2C_NO_START 0x1
112 #define _I2C_NO_STOP  0x2
_i2c_master_req(i2c_handle_t * hperh,uint16_t dev_addr,uint32_t timeout,uint32_t req_write)113 int _i2c_master_req(i2c_handle_t *hperh, uint16_t dev_addr, uint32_t timeout,uint32_t req_write)
114 {
115     if (hperh->init.addr_mode == I2C_ADDR_7BIT) {
116         CLEAR_BIT(hperh->perh->CON2, I2C_CON2_ADD10_MSK);
117     }
118     else {
119         SET_BIT(hperh->perh->CON2, I2C_CON2_ADD10_MSK);
120     }
121 
122     MODIFY_REG(hperh->perh->CON2, I2C_CON2_SADD_MSK, dev_addr << I2C_CON2_SADD_POSS);
123     if (req_write)
124         CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
125     else
126         SET_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
127 
128     return OK;
129 }
_i2c_wait_flag(i2c_handle_t * hperh,uint32_t flag,flag_status_t status,uint32_t timeout)130 int _i2c_wait_flag(i2c_handle_t *hperh, uint32_t flag, flag_status_t status, uint32_t timeout)
131 {
132     uint32_t tickstart = 0;
133 
134         tickstart = ald_get_tick();
135             while (I2C_GET_FLAG(hperh, flag) == status) {
136                 if ((timeout == 0) || ((ald_get_tick() - tickstart ) > timeout)) {
137                     hperh->error_code |= I2C_ERROR_TIMEOUT;
138                     return TIMEOUT;
139                 }
140             }
141 
142         return OK;
143 }
_i2c_wait_txe(i2c_handle_t * hperh,uint32_t timeout)144 int _i2c_wait_txe(i2c_handle_t *hperh, uint32_t timeout)
145 {
146     uint32_t tickstart = ald_get_tick();
147 
148     while (I2C_GET_FLAG(hperh, I2C_STAT_THTH) == RESET) {
149         if (I2C_GET_IT_FLAG(hperh, I2C_IT_ARLO)) {
150             hperh->error_code |= I2C_ERROR_ARLO;
151             return ERROR;
152         }
153 
154         if (I2C_GET_IT_FLAG(hperh, I2C_IT_NACK) == SET) {
155             hperh->error_code |= I2C_ERROR_AF;
156             return ERROR;
157         }
158 
159         if ((timeout == 0) || ((ald_get_tick() - tickstart) > timeout)) {
160             hperh->error_code |= I2C_ERROR_TIMEOUT;
161             return ERROR;
162         }
163     }
164 
165     return OK;
166 }
_i2c_master_send(i2c_handle_t * hperh,uint16_t dev_addr,uint8_t * buf,uint32_t size,uint32_t timeout,uint32_t flag)167 int _i2c_master_send(i2c_handle_t *hperh, uint16_t dev_addr, uint8_t *buf,
168                                  uint32_t size, uint32_t timeout,uint32_t flag)
169 {
170     if (hperh->state != I2C_STATE_READY)
171         return BUSY;
172 
173     if ((buf == NULL) || (size == 0))
174         return  ERROR;
175     if ((flag&_I2C_NO_START)==0x0) //NOSTART==0
176     {
177         if (_i2c_wait_flag(hperh, I2C_STAT_BUSY, SET, 100) != OK)
178             return BUSY;
179         _i2c_master_req(hperh, dev_addr, timeout,1);
180     }
181     assert_param(IS_I2C_TYPE(hperh->perh));
182     __LOCK(hperh);
183 
184     hperh->state      = I2C_STATE_BUSY_TX;
185     hperh->mode       = I2C_MODE_MASTER;
186     hperh->error_code = I2C_ERROR_NONE;
187     hperh->p_buff     = buf;
188     hperh->xfer_size  = size;
189     hperh->xfer_count = 0;
190 
191     if ((flag&_I2C_NO_STOP)!=0)  //NOSTOP==1
192         SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
193     else
194         CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
195 
196     if (size <= 0xFF) {
197         MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
198     }
199     else {
200         MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
201         SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
202     }
203 
204 
205     SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
206     if ((flag&_I2C_NO_START)==0x0) //NOSTART=0
207         SET_BIT(hperh->perh->CON2, I2C_CON2_START_MSK);
208 
209     while (size > 0) {
210         hperh->perh->TXDATA  = (*buf++);
211         size--;
212         hperh->xfer_count++;
213 
214         if (_i2c_wait_txe(hperh, timeout) != OK)
215             goto ERROR;
216 
217         if (((hperh->xfer_count % 0xFF) == 0) && (READ_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK))) {
218             if (_i2c_wait_flag(hperh, I2C_STAT_TCR, RESET, 10) == OK) {
219                 if (size > 0xFF) {
220                     MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
221                 }
222                 else {
223                     MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
224                     if ((flag&_I2C_NO_STOP)==0)
225                         CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
226                 }
227             }
228             else {
229                 goto ERROR;
230             }
231         }
232     }
233 
234     if (READ_BIT(hperh->perh->CON2, I2C_CON2_AUTOEND_MSK) == SET)
235         goto SUCCESS;
236 
237     //NOSTOP==1
238     if ((flag&_I2C_NO_STOP)!=0&&_i2c_wait_flag(hperh, I2C_STAT_TCR, RESET, 10) == OK)
239     {
240         goto SUCCESS;
241     }
242 
243     if (_i2c_wait_flag(hperh, I2C_STAT_TC, RESET, 10) == OK) {
244         if ((flag&_I2C_NO_STOP)==0x0)      //NOSTOP==0
245             SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
246         goto SUCCESS;
247     }
248     else {
249         goto ERROR;
250     }
251 
252 ERROR:
253     SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
254     hperh->state = I2C_STATE_READY;
255     hperh->mode  = I2C_MODE_NONE;
256     __UNLOCK(hperh);
257 
258     return ERROR;
259 
260 SUCCESS:
261     hperh->state = I2C_STATE_READY;
262     hperh->mode  = I2C_MODE_NONE;
263     __UNLOCK(hperh);
264 
265     return OK;
266 }
267 
es32f3_master_xfer(struct rt_i2c_bus_device * bus,struct rt_i2c_msg msgs[],rt_uint32_t num)268 static rt_ssize_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
269                                     struct rt_i2c_msg msgs[],
270                                     rt_uint32_t num)
271 {
272     struct rt_i2c_msg *msg;
273     rt_uint32_t i;
274     rt_err_t ret = -RT_ERROR;
275 
276     for (i = 0; i < num; i++)
277     {
278         msg = &msgs[i];
279         if (msg->buf==NULL||msg->len==0)
280         {
281             continue;
282         }
283         if (msg->flags & RT_I2C_RD)
284         {
285             if (ald_i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
286             {
287                 LOG_E("i2c bus write failed,i2c bus stop!\n");
288                 goto out;
289             }
290         }
291         else
292         {
293             uint32_t f=((msg->flags&RT_I2C_NO_START)?0x1:0)|((msg->flags&RT_I2C_NO_STOP)?0x2:0);
294             if (I2C_GET_FLAG((i2c_handle_t *)bus->priv, I2C_STAT_BUSY) == RESET)
295             {
296                 f=f&(~_I2C_NO_START);
297             }
298             if (_i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT,f) != 0)
299             {
300                 LOG_E("i2c bus write failed,i2c bus stop!\n");
301                 goto out;
302             }
303         }
304     }
305 
306     ret = i;
307 
308 out:
309     LOG_D("send stop condition\n");
310 
311     return ret;
312 }
313 
314 const struct rt_i2c_bus_device_ops es32f3_i2c_ops =
315 {
316     es32f3_master_xfer,
317     RT_NULL,
318     RT_NULL,
319 };
320 
rt_hw_i2c_init(void)321 int rt_hw_i2c_init(void)
322 {
323     int result = RT_EOK;
324 
325     _i2c_init();
326 
327 #ifdef BSP_USING_I2C0
328     /* define i2c Instance */
329     static struct rt_i2c_bus_device _i2c_device0;
330     rt_memset((void *)&_i2c_device0, 0, sizeof(struct rt_i2c_bus_device));
331 
332     _i2c_device0.ops = &es32f3_i2c_ops;
333     _i2c_device0.priv = &_h_i2c0;
334     result = rt_i2c_bus_device_register(&_i2c_device0, ES_DEVICE_NAME_I2C0);
335     if (result != RT_EOK)
336     {
337         return result;
338     }
339 #endif
340 
341 #ifdef BSP_USING_I2C1
342     /* define i2c Instance */
343     static struct rt_i2c_bus_device _i2c_device1;
344     rt_memset((void *)&_i2c_device1, 0, sizeof(struct rt_i2c_bus_device));
345 
346     _i2c_device1.ops = &es32f3_i2c_ops;
347     _i2c_device1.priv = &_h_i2c1;
348     rt_i2c_bus_device_register(&_i2c_device1, ES_DEVICE_NAME_I2C1);
349     if (result != RT_EOK)
350     {
351         return result;
352     }
353 #endif
354 
355     return RT_EOK;
356 }
357 INIT_DEVICE_EXPORT(rt_hw_i2c_init);
358 
359 #endif
360